diff --git a/audio/tegu/audio-tables.mk b/audio/tegu/audio-tables.mk
index cc06ff9..3b2d324 100644
--- a/audio/tegu/audio-tables.mk
+++ b/audio/tegu/audio-tables.mk
@@ -66,4 +66,8 @@ PRODUCT_COPY_FILES += \
     device/google/tegu/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/tests/test_config.ini:$(TARGET_COPY_OUT_VENDOR)/etc/test_config.ini \
     device/google/tegu/audio/$(AUDIO_TABLE_FOLDER)/tuning/waves/tests/test_preset.mps:$(TARGET_COPY_OUT_VENDOR)/etc/test_preset.mps
 
+# Mixer Path Configuration for Audio Speaker Calibration Tool pixel_ti_cal
+PRODUCT_COPY_FILES += \
+    device/google/tegu/audio/$(AUDIO_TABLE_FOLDER)/tas2572/ti_cal_mixer_paths.xml:$(TARGET_COPY_OUT_VENDOR)/etc/ti_cal_mixer_paths.xml
+
 endif
diff --git a/audio/tegu/config/audio_platform_configuration.xml b/audio/tegu/config/audio_platform_configuration.xml
index dee8e62..d5c6a03 100644
--- a/audio/tegu/config/audio_platform_configuration.xml
+++ b/audio/tegu/config/audio_platform_configuration.xml
@@ -294,9 +294,10 @@
     </device_handle>
 
     <external_module>
-        <module libname="audio_spk_35l41.so" argu="AcousticShockProtection"/>
+        <module libname="audio_spk_tas25xx.so" argu="AcousticShockProtection"/>
         <module libname="audio_waves_aoc.so" argu="Sink=SPK:1"/>
         <module libname="audio_fortemedia_aoc.so" argu="DL_CH=y VoIP_DLCHs=SPK:2,USB:2 VoIP_Rate=32000"/>
+        <module libname="audio_sounddose_aoc.so"/>
         <module libname="liboffloadeffect.so"/>
         <module libname="audio_amcs_ext.so"/>
         <module libname="audio_bluenote_aoc.so"/>
diff --git a/audio/tegu/config/mixer_paths.xml b/audio/tegu/config/mixer_paths.xml
index d636a6e..ccf0fcb 100644
--- a/audio/tegu/config/mixer_paths.xml
+++ b/audio/tegu/config/mixer_paths.xml
@@ -36,10 +36,10 @@
     <!-- TDM 0 setting -->
     <ctl name="TDM_0_RX Chan" value="Four"/>
     <ctl name="TDM_0_RX Format" value="S32_LE"/>
-    <ctl name="TDM_0_RX Sample Rate" value="SR_96K" />
+    <ctl name="TDM_0_RX Sample Rate" value="SR_48K" />
     <ctl name="TDM_0_TX Chan" value="Four"/>
     <ctl name="TDM_0_TX Format" value="S32_LE"/>
-    <ctl name="TDM_0_TX Sample Rate" value="SR_96K" />
+    <ctl name="TDM_0_TX Sample Rate" value="SR_48K" />
 
     <!-- Haptic setting -->
     <ctl name="Haptics Source" value="PCM"/>
@@ -50,67 +50,11 @@
     <ctl name="RX Slots" id="0" value="3"/>
     <ctl name="RX Slots" id="1" value="3"/>
 
-    <!-- Cirrus default 96K -->
-    <ctl name="Default 96K" value="1"/>
-    <ctl name="R Default 96K" value="1"/>
-
-    <!-- Cirrus Booster Amp TDM slot assignment-->
-    <!-- RX slot -->
-    <ctl name="ASPRX1 Slot Position" value="0"/>
-    <ctl name="ASPRX2 Slot Position" value="1"/>
-    <ctl name="R ASPRX1 Slot Position" value="1"/>
-    <ctl name="R ASPRX2 Slot Position" value="0"/>
-    <!-- TX slot -->
-    <ctl name="ASPTX1 Slot Position" value="0"/>
-    <ctl name="R ASPTX1 Slot Position" value="1"/>
-    <ctl name="ASPTX2 Slot Position" value="2"/>
-    <ctl name="R ASPTX2 Slot Position" value="3"/>
-    <ctl name="ASPTX3 Slot Position" value="4"/>
-    <ctl name="R ASPTX3 Slot Position" value="5"/>
-    <ctl name="ASPTX4 Slot Position" value="6"/>
-    <ctl name="R ASPTX4 Slot Position" value="7"/>
-
-    <!-- Cirrus Booster Amp DRE and VBST config-->
-    <ctl name="DRE DRE Switch" value="1"/>
-    <ctl name="R DRE DRE Switch" value="1"/>
-
-    <!-- Cirrus Booster Amp Output Gain -->
-    <ctl name="AMP PCM Gain" value="17"/>
-    <ctl name="R AMP PCM Gain" value="17"/>
-    <ctl name="Digital PCM Volume" value="817"/>
-    <ctl name="R Digital PCM Volume" value="817"/>
-
-    <!-- Cirrus Booster Amp Power -->
-    <ctl name="Main AMP Enable Switch" value="0"/>
-    <ctl name="R Main AMP Enable Switch" value="0"/>
-
-    <!-- Cirrus Booster mode -->
-    <ctl name="PCM Source" value="DSP"/>
-    <ctl name="R PCM Source" value="DSP"/>
-    <ctl name="DSP1 Firmware" value="Protection"/>
-    <ctl name="R DSP1 Firmware" value="Protection"/>
-    <ctl name="DSP RX1 Source" value="ASPRX1"/>
-    <ctl name="DSP RX2 Source" value="ASPRX1"/>
-    <ctl name="R DSP RX1 Source" value="ASPRX1"/>
-    <ctl name="R DSP RX2 Source" value="ASPRX1"/>
-    <ctl name="Boost Peak Current Limit" value="3.50A"/>
-    <ctl name="R Boost Peak Current Limit" value="3.50A"/>
-
-    <!-- Cirrus ASP TX source -->
-    <ctl name="ASP TX1 Source" value="VMON" />
-    <ctl name="R ASP TX1 Source" value="VMON" />
-    <ctl name="ASP TX2 Source" value="IMON" />
-    <ctl name="R ASP TX2 Source" value="IMON" />
-    <ctl name="ASP TX3 Source" value="Zero" />
-    <ctl name="R ASP TX3 Source" value="Zero" />
-    <ctl name="ASP TX4 Source" value="Zero" />
-    <ctl name="R ASP TX4 Source" value="Zero" />
-
-    <!-- Cirrus fast switch init -->
-    <ctl name="Fast Use Case Switch Enable" value="0" />
-    <ctl name="Fast Use Case Delta File" value="fast_switch2.txt" />
-    <ctl name="R Fast Use Case Switch Enable" value="0" />
-    <ctl name="R Fast Use Case Delta File" value="fast_switch3.txt" />
+    <!-- default Tas2572's control value -->
+    <ctl name="TAS25XX PLAYBACK_VOLUME_LEFT" value="47"/>
+    <ctl name="TAS25XX PLAYBACK_VOLUME_RIGHT" value="47"/>
+    <ctl name="TAS25XX ASI Switch" value="0"/>
+    <ctl name="TAS25XX CODEC PROFILE" value="default"/>
 
     <!-- default EP volume -->
     <ctl name="PCM Playback Switch" value="1"/>
@@ -269,6 +213,32 @@
     <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="2" value="-1"/>
     <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="3" value="-1"/>
 
+    <!-- PDM power -->
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="0" value="0x2c"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="1" value="0xec"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="2" value="0xe0"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="3" value="0x13"/>
+    <!-- PDM0 power -->
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="4" value="0x2c"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="5" value="0xec"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="6" value="0xe0"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="7" value="0x13"/>
+    <!-- PDM2 power -->
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="12" value="0x2c"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="13" value="0xec"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="14" value="0x21"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="15" value="0x14"/>
+
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="8" value="0x2c"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="9" value="0xec"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="10" value="0x21"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="11" value="0x14"/>
+
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="16" value="0xff"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="17" value="0xff"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="18" value="0xff"/>
+    <ctl name="BUILDIN_MIC_POWER_INIT" id="19" value="0xff"/>
+
     <!-- sidetone controls -->
     <ctl name="Sidetone Enable" value="0"/>
     <ctl name="Sidetone Volume" value="-96"/>
@@ -647,16 +617,13 @@
     <!-- codec setting -->>
     <!-- Rx device -->
     <path name="handset">
-        <ctl name="PCM Source" value="ASP"/>
-        <ctl name="AMP PCM Gain" value="6"/>
-        <ctl name="Main AMP Enable Switch" value="1"/>
+        <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_top"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="voice-handset">
-        <ctl name="Boost Peak Current Limit" value="3.50A"/>
-        <ctl name="PCM Source" value="ASP"/>
-        <ctl name="AMP PCM Gain" value="7"/>
-        <ctl name="Main AMP Enable Switch" value="1"/>
+        <ctl name="TAS25XX CODEC PROFILE" value="voice"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="voice-hac">
@@ -667,28 +634,23 @@
     </path>
 
     <path name="speaker">
-        <ctl name="Boost Peak Current Limit" value="3.50A"/>
-        <ctl name="R Boost Peak Current Limit" value="3.50A"/>
-        <ctl name="Main AMP Enable Switch" value="1"/>
-        <ctl name="R Main AMP Enable Switch" value="1"/>
+        <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_stereo"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="speaker-post">
-        <!-- load Bypass FIR -->
-        <ctl name="Fast Use Case Delta File" value="fast_switch3.txt" />
-        <ctl name="Fast Use Case Switch Enable" value="1" />
-        <ctl name="R Fast Use Case Delta File" value="fast_switch4.txt" />
-        <ctl name="R Fast Use Case Switch Enable" value="1" />
+    </path>
+
+    <path name="speaker-cali">
+        <ctl name="TAS25XX CODEC PROFILE" value="default"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
+        <ctl name="TAS25XX PLAYBACK_VOLUME_LEFT" value="55"/>
+        <ctl name="TAS25XX PLAYBACK_VOLUME_RIGHT" value="55"/>
     </path>
 
     <path name="voice-speaker">
-        <ctl name="R Boost Peak Current Limit" value="3.50A"/>
-        <ctl name="Boost Peak Current Limit" value="3.50A"/>
-        <ctl name="ASPTX1 Slot Position" value="1"/>
-        <ctl name="R ASPTX1 Slot Position" value="0"/>
-    <!--<ctl name="R DSP RX2 Source" value="ASPRX2"/>-->
-        <ctl name="R Main AMP Enable Switch" value="1"/>
-        <ctl name="Main AMP Enable Switch" value="1"/>
+        <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_stereo"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="voice-speaker-post">
@@ -701,14 +663,11 @@
     </path>
 
     <path name="speaker-safe">
-        <ctl name="R Boost Peak Current Limit" value="3.50A"/>
-        <ctl name="R Main AMP Enable Switch" value="1"/>
+        <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_bottom"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="speaker-safe-post">
-        <!-- load Bypass FIR -->
-        <!--ctl name="R Fast Use Case Delta File" value="fast_switch4.txt" />
-        <ctl name="R Fast Use Case Switch Enable" value="1" /-->
     </path>
 
     <path name="usb-tty-full">
@@ -724,8 +683,8 @@
     <path name="handset-mic">
         <ctl name="Mic Spatial Module Enable" value="1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="3"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -736,8 +695,8 @@
 
     <path name="voice-handset-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="3"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
         <ctl name="MIC HW Gain At High Power Mode (cB)" value="130"/>
@@ -750,8 +709,8 @@
     <path name="speaker-mic">
         <ctl name="Mic Spatial Module Enable" value="1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="3"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -762,8 +721,8 @@
 
     <path name="voice-speaker-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
         <ctl name="MIC HW Gain At High Power Mode (cB)" value="130"/>
@@ -776,8 +735,8 @@
     <path name="camcorder-mic">
         <ctl name="Mic Spatial Module Enable" value="1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -788,8 +747,8 @@
 
     <path name="voice-recog-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -801,8 +760,8 @@
     <path name="voice-recog-aec-mic">
         <ctl name="Audio Capture Eraser Enable" value="1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
         <ctl name="Audio Capture Mic Source" value="ERASER"/>
@@ -814,8 +773,8 @@
 
     <path name="unprocessed-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -826,8 +785,8 @@
 
     <path name="unprocessed-dual-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -838,8 +797,8 @@
 
     <path name="unprocessed-triple-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="MIC DC Blocker" value="1"/>
     </path>
@@ -850,7 +809,7 @@
 
     <path name="ultrasound-mic">
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="1" value="1"/>
+        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="1" value="2"/>
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="3" value="-1"/>
     </path>
@@ -860,8 +819,8 @@
 
     <path name="bt-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="Audio Capture Mic Source" value="BT_MIC"/>
         <ctl name="Voice Call Mic Source" value="BT_MIC"/>
@@ -873,8 +832,8 @@
 
     <path name="usb-headset-mic">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1"/>
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="2"/>
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1"/>
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1"/>
         <ctl name="Audio Capture Mic Source" value="USB_MIC"/>
         <ctl name="Voice Call Mic Source" value="USB_MIC"/>
@@ -884,19 +843,4 @@
         <ctl name="MIC Record Soft Gain (dB)" value="0"/>
     </path>
 
-    <!-- cs35l41 specific path to load firmware in cs35l41.c -->
-    <path name="cs35l41-load-protection-firmware-start">
-        <!-- Enable it after get the protection firmware -->
-        <ctl name="DSP Booted" value="0" />
-        <ctl name="R DSP Booted" value="0" />
-        <ctl name="DSP1 Preload Switch" value="0" />
-        <ctl name="R DSP1 Preload Switch" value="0" />
-    </path>
-
-    <path name="cs35l41-load-protection-firmware-end">
-        <!-- Enable it after get the protection firmware -->
-        <ctl name="DSP1 Preload Switch" value="1" />
-        <ctl name="R DSP1 Preload Switch" value="1" />
-    </path>
-    <!-- cs35l41 specific path to load firmware in cs35l41.c end-->
 </mixer>
diff --git a/audio/tegu/config/mixer_paths_factory.xml b/audio/tegu/config/mixer_paths_factory.xml
index 2ccf7da..7cc10b1 100644
--- a/audio/tegu/config/mixer_paths_factory.xml
+++ b/audio/tegu/config/mixer_paths_factory.xml
@@ -18,6 +18,13 @@
     <ctl name="TDM_0_RX Mixer US" value="0" />
     <ctl name="US Record Enable" value="0" />
     <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_stereo" />
+    <ctl name="TAS25XX ASI Switch" value="0"/>
+
+    <ctl name="HAC AMP EN" value="0" />
+    <ctl name="USB Card" value="1"/>
+    <ctl name="USB Device" value="0"/>
+    <ctl name="USB Direction" value="0" />
+    <ctl name="USB Memory Config" value="0" />
 
     <path name="mfg-playback">
     </path>
@@ -33,12 +40,14 @@
 
     <path name="mfg-record usb-headset-mic">
         <ctl name="Audio Capture Mic Source" value="USB_MIC"/>
-        <ctl name="USB Card" value="1"/>
-        <ctl name="USB Device" value="0"/>
         <ctl name="USB Playback EP ID v2" value="0" />
         <ctl name="USB Capture EP ID v2" value="1" />
         <ctl name="USB Capture FORMAT v2" value="1" />
         <ctl name="USB Config To AoC v2" value="1"/>
+        <ctl name="USB Card" value="1"/>
+        <ctl name="USB Device" value="0"/>
+        <ctl name="USB Direction" value="1" />
+        <ctl name="USB Memory Config" value="1" />
         <ctl name="EP1 TX Mixer USB_TX" value="1"/>
     </path>
 
@@ -100,7 +109,7 @@
     </path>
 
     <path name="mic2-only">
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="3" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="1" />
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
@@ -108,19 +117,10 @@
         <ctl name="MIC Record Soft Gain (dB)" value="0" />
     </path>
 
-    <path name="mic3-only">
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="2" />
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="-1" />
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
-        <ctl name="MIC2" value="1" />
-        <ctl name="MIC Record Soft Gain (dB)" value="0" />
-    </path>
-
     <path name="mic-all">
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="0" value="0" />
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="3" />
-        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="2" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="1" value="1" />
+        <ctl name="BUILDIN MIC ID CAPTURE LIST" id="2" value="-1" />
         <ctl name="BUILDIN MIC ID CAPTURE LIST" id="3" value="-1" />
         <ctl name="MIC0" value="1" />
         <ctl name="MIC1" value="1" />
@@ -139,7 +139,7 @@
     </path>
 
     <path name="us-mic2-only">
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="0" value="3" />
+        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="0" value="1" />
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="1" value="-1" />
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="2" value="-1" />
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="3" value="-1" />
@@ -147,19 +147,10 @@
         <ctl name="MIC Record Soft Gain (dB)" value="0" />
     </path>
 
-    <path name="us-mic3-only">
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="0" value="2" />
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="1" value="-1" />
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="2" value="-1" />
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="3" value="-1" />
-        <ctl name="MIC2" value="1" />
-        <ctl name="MIC Record Soft Gain (dB)" value="0" />
-    </path>
-
     <path name="us-mic-all">
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="0" value="0" />
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="1" value="3" />
-        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="2" value="2" />
+        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="1" value="1" />
+        <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="2" value="-1" />
         <ctl name="BUILDIN US MIC ID CAPTURE LIST" id="3" value="-1" />
         <ctl name="MIC0" value="1" />
         <ctl name="MIC1" value="1" />
@@ -256,8 +247,6 @@
 
     <path name="mfg-playback usb-headphones">
         <ctl name="USB Dev ID v2" value="2" />
-        <ctl name="USB Card" value="1"/>
-        <ctl name="USB Device" value="0"/>
         <ctl name="USB Playback EP ID v2" value="1" />
         <ctl name="USB Capture EP ID v2" value="0" />
         <ctl name="USB Playback FORMAT v2" value="6" />
@@ -265,15 +254,21 @@
         <ctl name="USB Playback CH v2" value="2" />
         <ctl name="USB Playback BW v2" value="16" />
         <ctl name="USB Config To AoC v2" value="1" />
+        <ctl name="USB Card" value="1"/>
+        <ctl name="USB Device" value="0"/>
+        <ctl name="USB Direction" value="0" />
+        <ctl name="USB Memory Config" value="1" />
         <ctl name="USB_RX Mixer EP3" value="1" />
     </path>
 
     <path name="speaker1-only">
         <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_top" />
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="speaker2-only">
         <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_bottom" />
+        <ctl name="TAS25XX ASI Switch" value="1"/>
     </path>
 
     <path name="headphones">
@@ -290,6 +285,17 @@
 
     <path name="speaker-all">
         <ctl name="TAS25XX CODEC PROFILE" value="music_17dB_stereo" />
+        <ctl name="TAS25XX ASI Switch" value="1"/>
+    </path>
+
+    <path name="mfg-playback hac">
+        <ctl name="AoC Speaker Mixer ASP Mode" value="ASP_BYPASS" />
+        <ctl name="TDM_0_RX Mixer EP3" value="1" />
+    </path>
+
+    <path name="hac">
+        <ctl name="HAC AMP EN" value="1" />
+        <path name="mfg-playback hac" />
     </path>
 
     <path name="loopback-mic-speaker">
diff --git a/audio/tegu/tas2572/ti_cal_mixer_paths.xml b/audio/tegu/tas2572/ti_cal_mixer_paths.xml
new file mode 100644
index 0000000..4042ca9
--- /dev/null
+++ b/audio/tegu/tas2572/ti_cal_mixer_paths.xml
@@ -0,0 +1,46 @@
+<?xml version="1.0" encoding="ISO-8859-1"?>
+<!-- Copyright (c) 2019, The Linux Foundation. All rights reserved.         -->
+<!--                                                                        -->
+<!-- Redistribution and use in source and binary forms, with or without     -->
+<!-- modification, are permitted provided that the following conditions are -->
+<!-- met:                                                                   -->
+<!--     * Redistributions of source code must retain the above copyright   -->
+<!--       notice, this list of conditions and the following disclaimer.    -->
+<!--     * Redistributions in binary form must reproduce the above          -->
+<!--       copyright notice, this list of conditions and the following      -->
+<!--       disclaimer in the documentation and/or other materials provided  -->
+<!--       with the distribution.                                           -->
+<!--     * Neither the name of The Linux Foundation nor the names of its    -->
+<!--       contributors may be used to endorse or promote products derived  -->
+<!--       from this software without specific prior written permission.    -->
+<!--                                                                        -->
+<!-- THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED           -->
+<!-- WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF   -->
+<!-- MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT -->
+<!-- ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS -->
+<!-- BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR -->
+<!-- CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF   -->
+<!-- SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR        -->
+<!-- BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,  -->
+<!-- OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN -->
+<!-- IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                          -->
+<mixer>
+    <ctl name="TDM_0_RX Mixer EP6" value="0"/>
+    <ctl name="TAS25XX ASI Switch" value="0"/>
+    <ctl name="TAS25XX PLAYBACK_VOLUME_LEFT" value="47"/>
+    <ctl name="TAS25XX PLAYBACK_VOLUME_RIGHT" value="47"/>
+    <ctl name="TAS25XX CODEC PROFILE" value="default"/>
+
+    <path name="ti-speaker">
+        <ctl name="TAS25XX CODEC PROFILE" value="default"/>
+        <ctl name="TAS25XX ASI Switch" value="1"/>
+        <ctl name="TAS25XX PLAYBACK_VOLUME_LEFT" value="55"/>
+        <ctl name="TAS25XX PLAYBACK_VOLUME_RIGHT" value="55"/>
+    </path>
+
+    <path name="deep-buffer playback">
+        <ctl name="TDM_0_RX Mixer EP6" value="1"/>
+    </path>
+
+</mixer>
+
diff --git a/audio/tegu/tas2572/tismartpa_driver_tuning.bin b/audio/tegu/tas2572/tismartpa_driver_tuning.bin
index 727b5bc..6ecf65c 100644
Binary files a/audio/tegu/tas2572/tismartpa_driver_tuning.bin and b/audio/tegu/tas2572/tismartpa_driver_tuning.bin differ
diff --git a/audio/tegu/tuning/bluenote/recording.gatf b/audio/tegu/tuning/bluenote/recording.gatf
index 10719f8..fe4ec7b 100644
Binary files a/audio/tegu/tuning/bluenote/recording.gatf and b/audio/tegu/tuning/bluenote/recording.gatf differ
diff --git a/audio/tegu/tuning/bluenote/template.xml b/audio/tegu/tuning/bluenote/template.xml
index cf00533..54eba56 100644
--- a/audio/tegu/tuning/bluenote/template.xml
+++ b/audio/tegu/tuning/bluenote/template.xml
@@ -43,6 +43,7 @@
       <param default="0" id="27" name="ch0_assignFrom" type="int32"/>
       <param default="1" id="28" name="ch1_assignFrom" type="int32"/>
       <param default="2" id="29" name="ch2_assignFrom" type="int32"/>
+      <param default="0.333" id="30" max="1" min="0.01" name="alphaEnhancedRate" type="float"/>
     </module>
     <module id="7" name="Multi Channel IIR 2">
       <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
@@ -58,64 +59,6 @@
         <param default="4" name="type" size="60" type="int32"/>
       </struct>
     </module>
-    <module id="8" name="Multi Band DRC">
-      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
-      <param default="48000" id="1" name="fs_" type="uint32"/>
-      <param default="2" id="2" name="numCh_" type="uint32"/>
-      <param default="3" id="3" name="chMask_" type="uint32"/>
-      <struct id="16">
-        <param default="1" max="3" min="1" name="numBand" type="uint32"/>
-        <param name="IIR_LowPass1" size="5" type="float"/>
-        <param name="IIR_HighPass1" size="5" type="float"/>
-        <param name="IIR_LowPass2" size="5" type="float"/>
-        <param name="IIR_HighPass2" size="5" type="float"/>
-      </struct>
-      <struct id="17">
-        <param max="20" min="0" name="band0_delay_ms" type="float"/>
-        <param default="5" max="20" min="0" minInclusive="false" name="band0_rms_ms" type="float"/>
-        <param max="30" min="0" name="band0_gain_dB" type="float"/>
-        <param max="30" min="-30" name="band0_Min_Gain_dB" type="float"/>
-        <param default="1" max="3" min="1" name="band0_numOfKnee" type="uint32"/>
-        <param name="band0_threadhold_dB" size="3" type="float"/>
-        <param name="band0_compressRatio" size="4" type="float"/>
-        <param name="band0_kneeWidth" size="3" type="float"/>
-        <param name="band0_attackTime_ms" size="4" type="float"/>
-        <param name="band0_releaseTime_ms" size="4" type="float"/>
-        <param name="band0_hysteresis" size="4" type="float"/>
-        <param max="20" min="0" name="band1_delay_ms" type="float"/>
-        <param default="5" max="20" min="0" minInclusive="false" name="band1_rms_ms" type="float"/>
-        <param max="30" min="0" name="band1_gain_dB" type="float"/>
-        <param max="30" min="-30" name="band1_Min_Gain_dB" type="float"/>
-        <param default="1" max="3" min="1" name="band1_numOfKnee" type="uint32"/>
-        <param name="band1_threadhold_dB" size="3" type="float"/>
-        <param name="band1_compressRatio" size="4" type="float"/>
-        <param name="band1_kneeWidth" size="3" type="float"/>
-        <param name="band1_attackTime_ms" size="4" type="float"/>
-        <param name="band1_releaseTime_ms" size="4" type="float"/>
-        <param name="band1_hysteresis" size="4" type="float"/>
-        <param max="20" min="0" name="band2_delay_ms" type="float"/>
-        <param default="5" max="20" min="0" minInclusive="false" name="band2_rms_ms" type="float"/>
-        <param max="30" min="0" name="band2_gain_dB" type="float"/>
-        <param max="30" min="-30" name="band2_Min_Gain_dB" type="float"/>
-        <param default="1" max="3" min="1" name="band2_numOfKnee" type="uint32"/>
-        <param name="band2_threadhold_dB" size="3" type="float"/>
-        <param name="band2_compressRatio" size="4" type="float"/>
-        <param name="band2_kneeWidth" size="3" type="float"/>
-        <param name="band2_attackTime_ms" size="4" type="float"/>
-        <param name="band2_releaseTime_ms" size="4" type="float"/>
-        <param name="band2_hysteresis" size="4" type="float"/>
-      </struct>
-      <struct id="18">
-        <param max="30" min="-30" name="limiter_gain_dB" type="float"/>
-        <param max="0" min="-30" name="limiter_threadhold_dB" type="float"/>
-        <param max="100" min="0" name="limiter_attackTime_ms" type="float"/>
-        <param max="100" min="0" name="limiter_releaseTime_ms" type="float"/>
-      </struct>
-      <struct id="19">
-        <param name="frequency0" type="uint32"/>
-        <param name="frequency1" type="uint32"/>
-      </struct>
-    </module>
     <module id="11" name="Stationary Noise Suppression">
       <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
       <param default="48000" id="1" name="fs_" type="uint32"/>
@@ -124,10 +67,11 @@
       <param default="1" id="16" name="strength level" type="uint32"/>
       <param id="17" name="POWER_TIME_SMOOTH" type="float"/>
       <param id="18" name="RMS_TIME_SMOOTH" type="float"/>
-      <param id="19" name="LOWER_BAND_THRESHOLD" size="129" type="float"/>
+      <param id="19" name="LOWER_BAND_THRESHOLD" size="257" type="float"/>
       <param id="20" name="UPPER_BAND_THRESHOLD" size="3" type="float"/>
       <param id="21" name="ATTACK_TIME" type="float"/>
       <param id="22" name="RELEASE_TIME" type="float"/>
+      <param id="23" name="BIN_THRESHOLD" size="5" type="uint32"/>
     </module>
     <module id="14" name="Linear Gain">
       <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
@@ -135,6 +79,9 @@
       <param default="1" id="2" name="numCh_" type="uint32"/>
       <param default="1" id="3" name="chMask_" type="uint32"/>
       <param id="16" name="Simple_gain" type="float"/>
+      <param default="0" id="17" name="ch0_assignFrom" type="int32"/>
+      <param default="1" id="18" name="ch1_assignFrom" type="int32"/>
+      <param default="2" id="19" name="ch2_assignFrom" type="int32"/>
     </module>
     <module id="17" name="Wind Noise Reduction">
       <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
@@ -199,6 +146,13 @@
       <param default="450" id="71" name="SSC_SOFT_DECISION_MAX_FREQ" type="int32"/>
       <param default="5" id="72" name="SSC_KEEP_SAVED_PROB_SMOOTH_SIZE" type="int32"/>
       <param default="1000" id="73" name="GAIN_BOOSTING_COST" type="int32"/>
+      <param default="450" id="74" name="GAIN_SMOOTHING_FACTOR" type="int32"/>
+      <param default="150" id="75" name="FINAL_GAIN_SMOOTHING_OFFSET_FACTOR" type="int32"/>
+      <param default="1" id="76" name="MUL_CH_SPEC_DIFF_ENABLE" type="int32"/>
+      <param default="4" id="77" name="MUL_CH_SPEC_DIFF_CENTER_SPEC_SEL" type="int32"/>
+      <param default="1000" id="78" name="MUL_CH_SPEC_DIFF_WIENER_OVERDRIVE" type="int32"/>
+      <param default="2" id="79" name="MUL_CH_SPEC_DIFF_GAIN_COMB" type="int32"/>
+      <param default="900" id="80" name="MUL_CH_SPEC_DIFF_TIME_SMOOTH" type="int32"/>
     </module>
     <module id="18" name="Multi Channel IIR 1">
       <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
@@ -231,6 +185,8 @@
         <param name="attackTime_ms" size="4" type="float"/>
         <param name="releaseTime_ms" size="4" type="float"/>
         <param name="hysteresis" size="4" type="float"/>
+        <param default="0" max="1" min="0" name="rms_manual_enable" type="uint32"/>
+        <param default="0" max="2" min="0" name="rms_channel" type="uint32"/>
       </struct>
       <struct id="17">
         <param max="30" min="-30" name="limiter_gain_dB" type="float"/>
@@ -239,6 +195,171 @@
         <param max="100" min="0" name="limiter_releaseTime_ms" type="uint32"/>
       </struct>
     </module>
+    <module id="40" name="Pixel Gain Controller">
+      <param default="0" id="0" max="3" name="opMode_" type="uint32"/>
+      <param default="48000" id="1" name="fs_" type="uint32"/>
+      <param default="2" id="2" name="numCh_" type="uint32"/>
+      <param default="3" id="3" name="chMask_" type="uint32"/>
+      <struct id="16">
+        <param name="crossover_iir_lp1" size="5" type="float"/>
+        <param name="crossover_iir_hp1" size="5" type="float"/>
+        <param name="crossover_iir_lp2" size="5" type="float"/>
+        <param name="crossover_iir_hp2" size="5" type="float"/>
+        <param default="250" max="1000" min="5" name="environment_rms_window_ms" type="int32"/>
+        <param default="-40" max="0" name="environment_rms_threshold_db" type="float"/>
+        <param default="10000" min="0" name="environment_rms_attack_release_ms" type="int32"/>
+        <param default="1" min="0" name="environment_loudness_ratio_band0" type="float"/>
+        <param default="1" min="0" name="environment_loudness_ratio_band1" type="float"/>
+        <param default="1" min="0" name="environment_loudness_ratio_band2" type="float"/>
+        <param default="100" max="1000" min="5" name="drc_window_ms_lowaop_band0" type="int32"/>
+        <param default="28" name="drc_gain_db_lowaop_band0" type="float"/>
+        <param default="-20" name="drc_min_gain_db_lowaop_band0" type="float"/>
+        <param default="-70" name="drc_thres_db_expander_lowaop_band0" type="float"/>
+        <param default="-40" name="drc_thres_db_upward_compressor_lowaop_band0" type="float"/>
+        <param default="-36" name="drc_thres_db_downward_compressor_lowaop_band0" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_expander_lowaop_band0" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_upward_compressor_lowaop_band0" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_downward_compressor_lowaop_band0" type="float"/>
+        <param default="2.0" min="0" name="drc_ratio_expander_lowaop_band0" type="float"/>
+        <param default="1.5" min="0" name="drc_ratio_upward_compressor_lowaop_band0" type="float"/>
+        <param default="1.0" min="0" name="drc_ratio_linear_lowaop_band0" type="float"/>
+        <param default="9.0" min="0" name="drc_ratio_downward_compressor_lowaop_band0" type="float"/>
+        <param default="350" min="0" name="drc_attack_ms_expander_lowaop_band0" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_upward_compressor_lowaop_band0" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_linear_lowaop_band0" type="float"/>
+        <param default="350" min="0" name="drc_attack_ms_downward_compressor_lowaop_band0" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_expander_lowaop_band0" type="float"/>
+        <param default="12000" min="0" name="drc_release_ms_upward_compressor_lowaop_band0" type="float"/>
+        <param default="12000" min="0" name="drc_release_ms_linear_lowaop_band0" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_downward_compressor_lowaop_band0" type="float"/>
+        <param default="100" max="1000" min="5" name="drc_window_ms_lowaop_band1" type="int32"/>
+        <param default="28" name="drc_gain_db_lowaop_band1" type="float"/>
+        <param default="-20" name="drc_min_gain_db_lowaop_band1" type="float"/>
+        <param default="-70" name="drc_thres_db_expander_lowaop_band1" type="float"/>
+        <param default="-40" name="drc_thres_db_upward_compressor_lowaop_band1" type="float"/>
+        <param default="-36" name="drc_thres_db_downward_compressor_lowaop_band1" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_expander_lowaop_band1" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_upward_compressor_lowaop_band1" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_downward_compressor_lowaop_band1" type="float"/>
+        <param default="2.0" min="0" name="drc_ratio_expander_lowaop_band1" type="float"/>
+        <param default="1.5" min="0" name="drc_ratio_upward_compressor_lowaop_band1" type="float"/>
+        <param default="1.0" min="0" name="drc_ratio_linear_lowaop_band1" type="float"/>
+        <param default="9.0" min="0" name="drc_ratio_downward_compressor_lowaop_band1" type="float"/>
+        <param default="350" min="0" name="drc_attack_ms_expander_lowaop_band1" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_upward_compressor_lowaop_band1" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_linear_lowaop_band1" type="float"/>
+        <param default="350" min="0" name="drc_attack_ms_downward_compressor_lowaop_band1" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_expander_lowaop_band1" type="float"/>
+        <param default="12000" min="0" name="drc_release_ms_upward_compressor_lowaop_band1" type="float"/>
+        <param default="12000" min="0" name="drc_release_ms_linear_lowaop_band1" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_downward_compressor_lowaop_band1" type="float"/>
+        <param default="100" max="1000" min="5" name="drc_window_ms_lowaop_band2" type="int32"/>
+        <param default="28" name="drc_gain_db_lowaop_band2" type="float"/>
+        <param default="-20" name="drc_min_gain_db_lowaop_band2" type="float"/>
+        <param default="-70" name="drc_thres_db_expander_lowaop_band2" type="float"/>
+        <param default="-40" name="drc_thres_db_upward_compressor_lowaop_band2" type="float"/>
+        <param default="-36" name="drc_thres_db_downward_compressor_lowaop_band2" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_expander_lowaop_band2" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_upward_compressor_lowaop_band2" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_downward_compressor_lowaop_band2" type="float"/>
+        <param default="2.0" min="0" name="drc_ratio_expander_lowaop_band2" type="float"/>
+        <param default="1.5" min="0" name="drc_ratio_upward_compressor_lowaop_band2" type="float"/>
+        <param default="1.0" min="0" name="drc_ratio_linear_lowaop_band2" type="float"/>
+        <param default="9.0" min="0" name="drc_ratio_downward_compressor_lowaop_band2" type="float"/>
+        <param default="350" min="0" name="drc_attack_ms_expander_lowaop_band2" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_upward_compressor_lowaop_band2" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_linear_lowaop_band2" type="float"/>
+        <param default="350" min="0" name="drc_attack_ms_downward_compressor_lowaop_band2" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_expander_lowaop_band2" type="float"/>
+        <param default="12000" min="0" name="drc_release_ms_upward_compressor_lowaop_band2" type="float"/>
+        <param default="12000" min="0" name="drc_release_ms_linear_lowaop_band2" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_downward_compressor_lowaop_band2" type="float"/>
+        <param default="100" max="1000" min="5" name="drc_window_ms_highaop_band0" type="int32"/>
+        <param default="28" name="drc_gain_db_highaop_band0" type="float"/>
+        <param default="-20" name="drc_min_gain_db_highaop_band0" type="float"/>
+        <param default="-70" name="drc_thres_db_expander_highaop_band0" type="float"/>
+        <param default="-40" name="drc_thres_db_upward_compressor_highaop_band0" type="float"/>
+        <param default="-36" name="drc_thres_db_downward_compressor_highaop_band0" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_expander_highaop_band0" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_upward_compressor_highaop_band0" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_downward_compressor_highaop_band0" type="float"/>
+        <param default="2.5" min="0" name="drc_ratio_expander_highaop_band0" type="float"/>
+        <param default="1.5" min="0" name="drc_ratio_upward_compressor_highaop_band0" type="float"/>
+        <param default="1.0" min="0" name="drc_ratio_linear_highaop_band0" type="float"/>
+        <param default="9.0" min="0" name="drc_ratio_downward_compressor_highaop_band0" type="float"/>
+        <param default="80" min="0" name="drc_attack_ms_expander_highaop_band0" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_upward_compressor_highaop_band0" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_linear_highaop_band0" type="float"/>
+        <param default="80" min="0" name="drc_attack_ms_downward_compressor_highaop_band0" type="float"/>
+        <param default="8000" min="0" name="drc_release_ms_expander_highaop_band0" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_upward_compressor_highaop_band0" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_linear_highaop_band0" type="float"/>
+        <param default="8000" min="0" name="drc_release_ms_downward_compressor_highaop_band0" type="float"/>
+        <param default="100" max="1000" min="5" name="drc_window_ms_highaop_band1" type="int32"/>
+        <param default="28" name="drc_gain_db_highaop_band1" type="float"/>
+        <param default="-20" name="drc_min_gain_db_highaop_band1" type="float"/>
+        <param default="-70" name="drc_thres_db_expander_highaop_band1" type="float"/>
+        <param default="-40" name="drc_thres_db_upward_compressor_highaop_band1" type="float"/>
+        <param default="-36" name="drc_thres_db_downward_compressor_highaop_band1" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_expander_highaop_band1" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_upward_compressor_highaop_band1" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_downward_compressor_highaop_band1" type="float"/>
+        <param default="2.5" min="0" name="drc_ratio_expander_highaop_band1" type="float"/>
+        <param default="1.5" min="0" name="drc_ratio_upward_compressor_highaop_band1" type="float"/>
+        <param default="1.0" min="0" name="drc_ratio_linear_highaop_band1" type="float"/>
+        <param default="6.0" min="0" name="drc_ratio_downward_compressor_highaop_band1" type="float"/>
+        <param default="80" min="0" name="drc_attack_ms_expander_highaop_band1" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_upward_compressor_highaop_band1" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_linear_highaop_band1" type="float"/>
+        <param default="80" min="0" name="drc_attack_ms_downward_compressor_highaop_band1" type="float"/>
+        <param default="8000" min="0" name="drc_release_ms_expander_highaop_band1" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_upward_compressor_highaop_band1" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_linear_highaop_band1" type="float"/>
+        <param default="8000" min="0" name="drc_release_ms_downward_compressor_highaop_band1" type="float"/>
+        <param default="100" max="1000" min="5" name="drc_window_ms_highaop_band2" type="int32"/>
+        <param default="28" name="drc_gain_db_highaop_band2" type="float"/>
+        <param default="-20" name="drc_min_gain_db_highaop_band2" type="float"/>
+        <param default="-70" name="drc_thres_db_expander_highaop_band2" type="float"/>
+        <param default="-40" name="drc_thres_db_upward_compressor_highaop_band2" type="float"/>
+        <param default="-36" name="drc_thres_db_downward_compressor_highaop_band2" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_expander_highaop_band2" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_upward_compressor_highaop_band2" type="float"/>
+        <param default="4.0" min="0" name="drc_knee_width_db_downward_compressor_highaop_band2" type="float"/>
+        <param default="2.5" min="0" name="drc_ratio_expander_highaop_band2" type="float"/>
+        <param default="1.5" min="0" name="drc_ratio_upward_compressor_highaop_band2" type="float"/>
+        <param default="1.0" min="0" name="drc_ratio_linear_highaop_band2" type="float"/>
+        <param default="9.0" min="0" name="drc_ratio_downward_compressor_highaop_band2" type="float"/>
+        <param default="80" min="0" name="drc_attack_ms_expander_highaop_band2" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_upward_compressor_highaop_band2" type="float"/>
+        <param default="500" min="0" name="drc_attack_ms_linear_highaop_band2" type="float"/>
+        <param default="80" min="0" name="drc_attack_ms_downward_compressor_highaop_band2" type="float"/>
+        <param default="8000" min="0" name="drc_release_ms_expander_highaop_band2" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_upward_compressor_highaop_band2" type="float"/>
+        <param default="5000" min="0" name="drc_release_ms_linear_highaop_band2" type="float"/>
+        <param default="8000" min="0" name="drc_release_ms_downward_compressor_highaop_band2" type="float"/>
+        <param default="100" max="100" min="0" name="drc_delay_ms" type="int32"/>
+        <param default="1" max="1" min="0" name="drc_use_peak_amplitude" type="int32"/>
+        <param default="0" max="100" min="-100" name="drc_band1_minus_band2_max_gain_db" type="float"/>
+        <param default="0" max="100" min="-100" name="drc_band3_minus_band2_max_gain_db" type="float"/>
+        <param default="20" max="20" min="0" name="limiter_delay_ms" type="int32"/>
+        <param default="-0.5" max="0" name="limiter_thres_db" type="float"/>
+        <param default="0" name="limiter_gain_db" type="float"/>
+        <param default="10" min="0" name="limiter_attack_time_ms" type="int32"/>
+        <param default="50" min="0" name="limiter_release_time_ms" type="int32"/>
+        <param default="1000" max="10000" min="100" name="drc_long_term_window_lower_ms_band0" type="int32"/>
+        <param default="1000" max="10000" min="100" name="drc_long_term_window_lower_ms_band1" type="int32"/>
+        <param default="1000" max="10000" min="100" name="drc_long_term_window_lower_ms_band2" type="int32"/>
+        <param default="5000" max="10000" min="100" name="drc_long_term_window_upper_ms_band0" type="int32"/>
+        <param default="5000" max="10000" min="100" name="drc_long_term_window_upper_ms_band1" type="int32"/>
+        <param default="5000" max="10000" min="100" name="drc_long_term_window_upper_ms_band2" type="int32"/>
+        <param default="-50" name="drc_long_term_window_lower_db_band0" type="float"/>
+        <param default="-50" name="drc_long_term_window_lower_db_band1" type="float"/>
+        <param default="-50" name="drc_long_term_window_lower_db_band2" type="float"/>
+        <param default="-30" name="drc_long_term_window_upper_db_band0" type="float"/>
+        <param default="-30" name="drc_long_term_window_upper_db_band1" type="float"/>
+        <param default="-30" name="drc_long_term_window_upper_db_band2" type="float"/>
+      </struct>
+    </module>
     <module id="10000" name="Eraser">
       <param id="275" name="eraser_pre_gain" type="uint32"/>
       <param id="277" name="eraser_post_gain" type="uint32"/>
@@ -248,7 +369,9 @@
       <param id="299" name="cleaner_post_gain" type="uint32"/>
     </module>
     <module id="10002" name="CHRE">
-      <param id="297" name="chre_gain" type="uint32"/>
+      <param id="345" name="chre_aec_timeout" type="uint32"/>
+      <param id="346" name="chre_pdm_gain" type="int32"/>
+      <param id="347" name="chre_aec_gain" type="int32"/>
     </module>
   </modules>
   <signalflows>
@@ -263,14 +386,16 @@
         <moduleRef id="6"/>
         <moduleRef id="7"/>
         <moduleRef id="5"/>
-        <moduleRef id="8"/>
+        <moduleRef id="40"/>
       </block>
     </signalflow>
     <signalflow id="2" name="General Mic Recording">
       <block id="137">
         <moduleRef id="14"/>
+        <moduleRef id="11"/>
         <moduleRef id="7"/>
-        <moduleRef id="32"/>
+        <moduleRef id="5"/>
+        <moduleRef id="40"/>
       </block>
     </signalflow>
     <signalflow id="1000" name="Smart Feature">
diff --git a/audio/tegu/tuning/fortemedia/BLUETOOTH.dat b/audio/tegu/tuning/fortemedia/BLUETOOTH.dat
index 04a8e1b..543c854 100644
Binary files a/audio/tegu/tuning/fortemedia/BLUETOOTH.dat and b/audio/tegu/tuning/fortemedia/BLUETOOTH.dat differ
diff --git a/audio/tegu/tuning/fortemedia/BLUETOOTH.mods b/audio/tegu/tuning/fortemedia/BLUETOOTH.mods
index c2f94a8..fcb3798 100644
--- a/audio/tegu/tuning/fortemedia/BLUETOOTH.mods
+++ b/audio/tegu/tuning/fortemedia/BLUETOOTH.mods
@@ -1,10 +1,67386 @@
 #PLATFORM_NAME  gChip
+#SINGLE_API_VER  1.4.2
 #EXPORT_FLAG  BLUETOOTH
-#SINGLE_API_VER  1.2.0
-#SAVE_TIME  2022-02-11 16:24:43
+#PARAM_MODE   FULL
+#SAVE_MODE  3
+#SAVE_TIME  2024-02-22 17:40:38
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0100    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7B00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x2000    //TX_MIN_EQ_RE_EST_3
+156    0x2000    //TX_MIN_EQ_RE_EST_4
+157    0x2000    //TX_MIN_EQ_RE_EST_5
+158    0x2000    //TX_MIN_EQ_RE_EST_6
+159    0x2000    //TX_MIN_EQ_RE_EST_7
+160    0x2000    //TX_MIN_EQ_RE_EST_8
+161    0x3000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x6000    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x6000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0008    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FEE    //TX_DTD_THR1_0
+198    0x7FEE    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7EF4    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x157C    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x1000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0BB8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0080    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x0018    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x0800    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0020    //TX_NS_LVL_CTRL_1
+283    0x0015    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0004    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x000F    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x2000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x3000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x7000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x3000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7000    //TX_LAMBDA_PFILT_S_0
+340    0x7400    //TX_LAMBDA_PFILT_S_1
+341    0x7900    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7900    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0080    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0023    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7000    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x5250    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x303C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x4000    //TX_TDDRC_ALPHA_UP_02
+785    0x4000    //TX_TDDRC_ALPHA_UP_03
+786    0x4000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x0130    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1C2F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0300    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7F00    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F44    //TX_DTD_THR1_MICMUTE_0
+912    0x7EF4    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x7F26    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6C00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x02A0    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF8    //TX_DTD_THR1_0
+198    0x7FF8    //TX_DTD_THR1_1
+199    0x7FEE    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1F40    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x4000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF400    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0018    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x7FFF    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x001E    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x0384    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7FFF    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x001E    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x5048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x5152    //TX_FDEQ_GAIN_6
+574    0x584F    //TX_FDEQ_GAIN_7
+575    0x4950    //TX_FDEQ_GAIN_8
+576    0x4C48    //TX_FDEQ_GAIN_9
+577    0x3D40    //TX_FDEQ_GAIN_10
+578    0x4240    //TX_FDEQ_GAIN_11
+579    0x4C4C    //TX_FDEQ_GAIN_12
+580    0x4C4C    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0F10    //TX_FDEQ_BIN_10
+602    0x1011    //TX_FDEQ_BIN_11
+603    0x1112    //TX_FDEQ_BIN_12
+604    0x120B    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1112    //TX_PREEQ_BIN_MIC0_12
+654    0x120B    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x20C6    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02EE    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FFF    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7918    //TX_DTD_THR1_MICMUTE_3
+915    0x7000    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C0A    //TX_TFMASKM4_2_DT_THR
+945    0x2710    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0010    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF3    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x6CCC    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x237B    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x4B7C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0003    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0A98    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0000    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0000    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0000    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0000    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0000    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0000    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x0000    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0000    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0000    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0000    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0000    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0000    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x0000    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0000    //TX_EASSA_NONLECHO_TH
+978    0x0000    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0000    //TX_EASSA_NONLHFG
+981    0x0000    //TX_EASSA_DT2000HZ_REFG
+982    0x0000    //TX_EASSA_DT400HZ_MAING
+983    0x0000    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x0064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000A    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7000    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000A    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7000    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BT_HAC-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF3    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x6CCC    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x27D0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0003    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0003    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B0B    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A6D    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B0B    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A6D    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x286A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTNB_NREC-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B0B    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0240    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A6D    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0000    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x8064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B0B    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4242    //TX_FDEQ_GAIN_6
+574    0x423C    //TX_FDEQ_GAIN_7
+575    0x3C3C    //TX_FDEQ_GAIN_8
+576    0x3434    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1104    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x017F    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4444    //RX_FDEQ_GAIN_6
+46    0x4040    //RX_FDEQ_GAIN_7
+47    0x4040    //RX_FDEQ_GAIN_8
+48    0x4040    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x017F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4444    //RX_FDEQ_GAIN_6
+203    0x4040    //RX_FDEQ_GAIN_7
+204    0x4040    //RX_FDEQ_GAIN_8
+205    0x4040    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0008    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A6D    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4444    //TX_FDEQ_GAIN_7
+575    0x4444    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3C3C    //TX_FDEQ_GAIN_10
+578    0x3C3C    //TX_FDEQ_GAIN_11
+579    0x3C30    //TX_FDEQ_GAIN_12
+580    0x3030    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1112    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA06C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0001    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7E70    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x3C3C    //RX_FDEQ_GAIN_9
+49    0x3C3C    //RX_FDEQ_GAIN_10
+50    0x3838    //RX_FDEQ_GAIN_11
+51    0x3838    //RX_FDEQ_GAIN_12
+52    0x3030    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1112    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA06C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0001    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7E70    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x3C3C    //RX_FDEQ_GAIN_9
+206    0x3C3C    //RX_FDEQ_GAIN_10
+207    0x3838    //RX_FDEQ_GAIN_11
+208    0x3838    //RX_FDEQ_GAIN_12
+209    0x3030    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1112    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x286A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x4500    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0020    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x0020    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0020    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0200    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  BLUETOOTH-BTWB_NREC-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2A28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0915    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF400    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0x4000    //TX_MORENS_TFMASK_TH
+381    0xFFEE    //TX_DRC_QUIET_FLOOR
+382    0x6000    //TX_RATIODTL_CUT_TH
+383    0xFFF3    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x0000    //TX_POST_MASK_SUP_HSNE
+392    0x0000    //TX_TAIL_DET_TH
+393    0x0000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0800    //TX_SUPHIGH_TH
+396    0x00C8    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x0800    //TX_C_POST_FLT_MASK
+399    0x0005    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x0000    //TX_DEREVERB_LF_MU
+515    0x0000    //TX_DEREVERB_HF_MU
+516    0x0000    //TX_DEREVERB_DELAY
+517    0x0000    //TX_DEREVERB_COEF_LEN
+518    0x0000    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x0000    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0970    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x0000    //TX_SENDFUNC_REG_MICMUTE
+898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0000    //TX_MICMUTE_RATIO_THR
+900    0x0000    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x0000    //TX_MICMUTE_LOG_EYR_TH
+903    0x0000    //TX_MICMUTE_CVG_TIME
+904    0x0000    //TX_MICMUTE_RELEASE_TIME
+905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0000    //TX_MICMUTE_FRQ_AEC_L
+908    0x0000    //TX_MICMUTE_EAD_THR
+909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x0000    //TX_DTD_THR1_MICMUTE_0
+912    0x0000    //TX_DTD_THR1_MICMUTE_1
+913    0x0000    //TX_DTD_THR1_MICMUTE_2
+914    0x0000    //TX_DTD_THR1_MICMUTE_3
+915    0x0000    //TX_DTD_THR2_MICMUTE_0
+916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x0000    //TX_MICMUTE_C_POST_FLT
+922    0x0000    //TX_MICMUTE_DT_CUT_K
+923    0x0000    //TX_MICMUTE_DT_CUT_THR
+924    0x0000    //TX_MICMUTE_DT_CUT_K2
+925    0x0000    //TX_MICMUTE_DT_CUT_THR2
+926    0x0000    //TX_MICMUTE_DT2_HOLD_N
+927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0000    //TX_MICMUTE_DT_CUT_K1
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x0000    //TX_MIC1RUB_AMP_THR
+939    0x0000    //TX_MIC1MUTE_RATIO_THR
+940    0x0000    //TX_MIC1MUTE_AMP_THR
+941    0x0000    //TX_MIC1MUTE_CVG_TIME
+942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x8064    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0000    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x7FFF    //RX_TDDRC_THRD_2
+115    0x7FFF    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0155    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8064    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0000    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x7FFF    //RX_TDDRC_THRD_2
+272    0x7FFF    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0155    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  BLUETOOTH-RESERVE1-VOICE_GENERIC-FB
-#PARAM_MODE  FULL
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -38,9 +67414,9 @@
 27    0x0800    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -146,11 +67522,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -405,7 +67781,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0000    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x0000    //TX_C_POST_FLT_MASK
 399    0x0000    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -532,10 +67908,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x0000    //TX_GSC_RTOH_TH
 523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -553,26 +67929,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -831,12 +68207,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -914,7 +68290,7 @@
 903    0x0000    //TX_MICMUTE_CVG_TIME
 904    0x0000    //TX_MICMUTE_RELEASE_TIME
 905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x0000    //TX_MICMUTE_FRQ_AEC_L
 908    0x0000    //TX_MICMUTE_EAD_THR
 909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -941,35 +68317,61 @@
 930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0000    //TX_MICMUTE_POST_MASK_SUP
+934    0x0000    //TX_MICMUTE_PRE_MASK_SUP
+935    0x0000    //TX_MICMUTE_SDPCRN_GAIN
+936    0x0000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x0000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x0000    //TX_MIC1RUB_AMP_THR
 939    0x0000    //TX_MIC1MUTE_RATIO_THR
 940    0x0000    //TX_MIC1MUTE_AMP_THR
 941    0x0000    //TX_MIC1MUTE_CVG_TIME
 942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x0000    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -996,8 +68398,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -1847,8 +69249,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -2673,53403 +70075,3 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-NB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A4    //TX_DIST2REF1
-22    0x0017    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x053D    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7652    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0100    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0200    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1800    //TX_MIN_EQ_RE_EST_7
-160    0x1800    //TX_MIN_EQ_RE_EST_8
-161    0x3000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x6000    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x2000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x6590    //TX_DTD_THR1_0
-198    0x6590    //TX_DTD_THR1_1
-199    0x6590    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x157C    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x1000    //TX_ADPT_STRICT_L
-222    0x1000    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0050    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x01A0    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0800    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0017    //TX_NS_LVL_CTRL_1
-283    0x0015    //TX_NS_LVL_CTRL_2
-284    0x0012    //TX_NS_LVL_CTRL_3
-285    0x0012    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x000F    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000F    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x000F    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
-318    0x3000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
-326    0x3000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7400    //TX_LAMBDA_PFILT_S_1
-341    0x7900    //TX_LAMBDA_PFILT_S_2
-342    0x7000    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7900    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0400    //TX_C_POST_FLT_DT
-359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
-374    0x7FFF    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0FA0    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x1000    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x000A    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x007A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x5000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0014    //TX_FDEQ_SUBNUM
-567    0x5858    //TX_FDEQ_GAIN_0
-568    0x5850    //TX_FDEQ_GAIN_1
-569    0x5050    //TX_FDEQ_GAIN_2
-570    0x5048    //TX_FDEQ_GAIN_3
-571    0x3C48    //TX_FDEQ_GAIN_4
-572    0x3C48    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4842    //TX_FDEQ_GAIN_7
-575    0x3030    //TX_FDEQ_GAIN_8
-576    0x3030    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0014    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x484A    //TX_PREEQ_GAIN_MIC0_7
-625    0x4B4E    //TX_PREEQ_GAIN_MIC0_8
-626    0x5054    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D08    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C08    //TX_PREEQ_BIN_MIC1_2
-693    0x0700    //TX_PREEQ_BIN_MIC1_3
-694    0x0000    //TX_PREEQ_BIN_MIC1_4
-695    0x0000    //TX_PREEQ_BIN_MIC1_5
-696    0x0000    //TX_PREEQ_BIN_MIC1_6
-697    0x0000    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x7800    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x4000    //TX_TDDRC_ALPHA_UP_01
-784    0x4000    //TX_TDDRC_ALPHA_UP_02
-785    0x4000    //TX_TDDRC_ALPHA_UP_03
-786    0x4000    //TX_TDDRC_ALPHA_UP_04
-787    0x6000    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x4000    //TX_TDDRC_ALPHA_UP_00
-861    0x6000    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0BE3    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-WB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A4    //TX_DIST2REF1
-22    0x0017    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x053D    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0C00    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6800    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x6590    //TX_DTD_THR1_0
-198    0x6590    //TX_DTD_THR1_1
-199    0x6590    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x5000    //TX_DTD_THR2_0
-205    0x5000    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x07D0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0032    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
-371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0F0A    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x5050    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4850    //TX_FDEQ_GAIN_5
-573    0x5050    //TX_FDEQ_GAIN_6
-574    0x5048    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4844    //TX_FDEQ_GAIN_9
-577    0x3C36    //TX_FDEQ_GAIN_10
-578    0x3A3A    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x484A    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
-626    0x5054    //TX_PREEQ_GAIN_MIC0_9
-627    0x5658    //TX_PREEQ_GAIN_MIC0_10
-628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
-629    0x5E64    //TX_PREEQ_GAIN_MIC0_12
-630    0x6464    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x0F10    //TX_PREEQ_BIN_MIC0_10
-652    0x1011    //TX_PREEQ_BIN_MIC0_11
-653    0x1104    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x0700    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0BE3    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A4    //TX_DIST2REF1
-22    0x0017    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0400    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
-226    0x6590    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x1000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1400    //TX_SNRI_SUP_1
-302    0x1400    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x1400    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x7C00    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
-325    0x6000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0040    //TX_DT_BINVAD_TH_0
-354    0x0040    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
-357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
-373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0DAC    //TX_NOISE_TH_6
-379    0x0050    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0050    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4850    //TX_FDEQ_GAIN_2
-570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x484A    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x5C4C    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x4844    //TX_FDEQ_GAIN_9
-577    0x4448    //TX_FDEQ_GAIN_10
-578    0x4850    //TX_FDEQ_GAIN_11
-579    0x5C6A    //TX_FDEQ_GAIN_12
-580    0x5A84    //TX_FDEQ_GAIN_13
-581    0x7880    //TX_FDEQ_GAIN_14
-582    0x7F7F    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x484A    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4E    //TX_PREEQ_GAIN_MIC0_8
-626    0x5054    //TX_PREEQ_GAIN_MIC0_9
-627    0x5658    //TX_PREEQ_GAIN_MIC0_10
-628    0x5C5C    //TX_PREEQ_GAIN_MIC0_11
-629    0x6474    //TX_PREEQ_GAIN_MIC0_12
-630    0x7870    //TX_PREEQ_GAIN_MIC0_13
-631    0x5C48    //TX_PREEQ_GAIN_MIC0_14
-632    0x383C    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x251A    //TX_PREEQ_BIN_MIC1_0
-691    0x0F0F    //TX_PREEQ_BIN_MIC1_1
-692    0x0C0C    //TX_PREEQ_BIN_MIC1_2
-693    0x0C0F    //TX_PREEQ_BIN_MIC1_3
-694    0x0F0F    //TX_PREEQ_BIN_MIC1_4
-695    0x0F09    //TX_PREEQ_BIN_MIC1_5
-696    0x0909    //TX_PREEQ_BIN_MIC1_6
-697    0x0908    //TX_PREEQ_BIN_MIC1_7
-698    0x070F    //TX_PREEQ_BIN_MIC1_8
-699    0x1F08    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0920    //TX_PREEQ_BIN_MIC1_11
-702    0x2020    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
-856    0x1000    //TX_TDDRC_THRD_2
-857    0x1000    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BT_HAC-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x4B7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x00A4    //TX_DIST2REF1
-22    0x0017    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0FF7    //TX_PGA_0
-28    0x0FF7    //TX_PGA_1
-29    0x0FF7    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x2000    //TX_MIN_EQ_RE_EST_1
-154    0x2000    //TX_MIN_EQ_RE_EST_2
-155    0x4000    //TX_MIN_EQ_RE_EST_3
-156    0x4000    //TX_MIN_EQ_RE_EST_4
-157    0x7FFF    //TX_MIN_EQ_RE_EST_5
-158    0x7FFF    //TX_MIN_EQ_RE_EST_6
-159    0x7FFF    //TX_MIN_EQ_RE_EST_7
-160    0x7FFF    //TX_MIN_EQ_RE_EST_8
-161    0x7FFF    //TX_MIN_EQ_RE_EST_9
-162    0x7FFF    //TX_MIN_EQ_RE_EST_10
-163    0x7FFF    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0CCD    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x09C4    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0DAC    //TX_DT_CUT_K
-214    0x0020    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1F40    //TX_DT_BINVAD_ENDF
-358    0x0100    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x59D8    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x2710    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4853    //TX_FDEQ_GAIN_9
-577    0x5450    //TX_FDEQ_GAIN_10
-578    0x7465    //TX_FDEQ_GAIN_11
-579    0x807F    //TX_FDEQ_GAIN_12
-580    0x82C4    //TX_FDEQ_GAIN_13
-581    0xC4C4    //TX_FDEQ_GAIN_14
-582    0xC4C4    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
-624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
-625    0x5456    //TX_PREEQ_GAIN_MIC0_8
-626    0x585C    //TX_PREEQ_GAIN_MIC0_9
-627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
-628    0x7478    //TX_PREEQ_GAIN_MIC0_11
-629    0x705C    //TX_PREEQ_GAIN_MIC0_12
-630    0x4838    //TX_PREEQ_GAIN_MIC0_13
-631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x0909    //TX_PREEQ_BIN_MIC0_7
-649    0x090B    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x1414    //TX_PREEQ_BIN_MIC0_12
-654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x462C    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0004    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0016    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0A98    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x0064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x0064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0240    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A13    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4242    //TX_FDEQ_GAIN_6
-574    0x423C    //TX_FDEQ_GAIN_7
-575    0x3C3C    //TX_FDEQ_GAIN_8
-576    0x3434    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0240    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4444    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
-577    0x3C3C    //TX_FDEQ_GAIN_10
-578    0x3C3C    //TX_FDEQ_GAIN_11
-579    0x3C30    //TX_FDEQ_GAIN_12
-580    0x3030    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1112    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x4500    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0400    //TX_DELTA_THR_SN_EST_1
-252    0x0300    //TX_DELTA_THR_SN_EST_2
-253    0x0600    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0019    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0011    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x7000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0200    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x0064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A13    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4242    //TX_FDEQ_GAIN_6
-574    0x423C    //TX_FDEQ_GAIN_7
-575    0x3C3C    //TX_FDEQ_GAIN_8
-576    0x3434    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4444    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
-577    0x3C3C    //TX_FDEQ_GAIN_10
-578    0x3C3C    //TX_FDEQ_GAIN_11
-579    0x3C30    //TX_FDEQ_GAIN_12
-580    0x3030    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1112    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTNB_NREC-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x286A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x4500    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0400    //TX_DELTA_THR_SN_EST_1
-252    0x0300    //TX_DELTA_THR_SN_EST_2
-253    0x0600    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0019    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0011    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x7000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0200    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x0064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0240    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A13    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4242    //TX_FDEQ_GAIN_6
-574    0x423C    //TX_FDEQ_GAIN_7
-575    0x3C3C    //TX_FDEQ_GAIN_8
-576    0x3434    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0240    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4444    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
-577    0x3C3C    //TX_FDEQ_GAIN_10
-578    0x3C3C    //TX_FDEQ_GAIN_11
-579    0x3C30    //TX_FDEQ_GAIN_12
-580    0x3030    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1112    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0000    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x0200    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x4500    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0400    //TX_DELTA_THR_SN_EST_1
-252    0x0300    //TX_DELTA_THR_SN_EST_2
-253    0x0600    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0019    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0011    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x7000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0200    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x0064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A13    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4242    //TX_FDEQ_GAIN_6
-574    0x423C    //TX_FDEQ_GAIN_7
-575    0x3C3C    //TX_FDEQ_GAIN_8
-576    0x3434    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x017F    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4444    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x4040    //RX_FDEQ_GAIN_8
-48    0x4040    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x017F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4444    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x4040    //RX_FDEQ_GAIN_8
-205    0x4040    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0008    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4444    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
-577    0x3C3C    //TX_FDEQ_GAIN_10
-578    0x3C3C    //TX_FDEQ_GAIN_11
-579    0x3C30    //TX_FDEQ_GAIN_12
-580    0x3030    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1112    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7FFF    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7E70    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x3C3C    //RX_FDEQ_GAIN_9
-49    0x3C3C    //RX_FDEQ_GAIN_10
-50    0x3838    //RX_FDEQ_GAIN_11
-51    0x3838    //RX_FDEQ_GAIN_12
-52    0x3030    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1112    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x206C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7E70    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x3C3C    //RX_FDEQ_GAIN_9
-206    0x3C3C    //RX_FDEQ_GAIN_10
-207    0x3838    //RX_FDEQ_GAIN_11
-208    0x3838    //RX_FDEQ_GAIN_12
-209    0x3030    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1112    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2A28    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7EFF    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00F0    //TX_EPD_OFFSET_00
-233    0x00F0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF400    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000B    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7900    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x1013    //TX_FDEQ_BIN_10
-602    0x1719    //TX_FDEQ_BIN_11
-603    0x1B1E    //TX_FDEQ_BIN_12
-604    0x1E1E    //TX_FDEQ_BIN_13
-605    0x1E28    //TX_FDEQ_BIN_14
-606    0x282C    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4868    //TX_PREEQ_GAIN_MIC0_8
-626    0x6860    //TX_PREEQ_GAIN_MIC0_9
-627    0x6048    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x3000    //TX_TDDRC_ALPHA_UP_01
-784    0x3000    //TX_TDDRC_ALPHA_UP_02
-785    0x3000    //TX_TDDRC_ALPHA_UP_03
-786    0x3000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0000    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x3000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0970    //TX_TDDRC_DRC_GAIN
-867    0x78D6    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x1800    //RX_THR_PITCH_DET_0
-14    0x1000    //RX_THR_PITCH_DET_1
-15    0x0800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
-23    0x9000    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x2064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x1800    //RX_THR_PITCH_DET_0
-171    0x1000    //RX_THR_PITCH_DET_1
-172    0x0800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
-180    0x9000    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  BLUETOOTH-BTWB_NREC-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x286A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0915    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x4500    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0400    //TX_DELTA_THR_SN_EST_1
-252    0x0300    //TX_DELTA_THR_SN_EST_2
-253    0x0600    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0019    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0011    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x7000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0020    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x0020    //TX_MINENOISE_TH
-380    0x4000    //TX_MORENS_TFMASK_TH
-381    0xFFEE    //TX_DRC_QUIET_FLOOR
-382    0x6000    //TX_RATIODTL_CUT_TH
-383    0xFFF3    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x0000    //TX_POST_MASK_SUP_HSNE
-392    0x0000    //TX_TAIL_DET_TH
-393    0x0000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0800    //TX_SUPHIGH_TH
-396    0x00C8    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x0800    //TX_C_POST_FLT_MASK
-399    0x0005    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0020    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x0000    //TX_DEREVERB_LF_MU
-515    0x0000    //TX_DEREVERB_HF_MU
-516    0x0000    //TX_DEREVERB_DELAY
-517    0x0000    //TX_DEREVERB_COEF_LEN
-518    0x0000    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x0000    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x2000    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0200    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x0000    //TX_SENDFUNC_REG_MICMUTE
-898    0x0000    //TX_SENDFUNC_REG_MICMUTE1
-899    0x0000    //TX_MICMUTE_RATIO_THR
-900    0x0000    //TX_MICMUTE_AMP_THR
-901    0x0000    //TX_MICMUTE_HPF_IND
-902    0x0000    //TX_MICMUTE_LOG_EYR_TH
-903    0x0000    //TX_MICMUTE_CVG_TIME
-904    0x0000    //TX_MICMUTE_RELEASE_TIME
-905    0x0000    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0000    //TX_MICMUTE_EPD_OFFSET_0
-907    0x0000    //TX_MICMUTE_FRQ_AEC_L
-908    0x0000    //TX_MICMUTE_EAD_THR
-909    0x0000    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x0000    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x0000    //TX_DTD_THR1_MICMUTE_0
-912    0x0000    //TX_DTD_THR1_MICMUTE_1
-913    0x0000    //TX_DTD_THR1_MICMUTE_2
-914    0x0000    //TX_DTD_THR1_MICMUTE_3
-915    0x0000    //TX_DTD_THR2_MICMUTE_0
-916    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x0000    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x0000    //TX_MICMUTE_C_POST_FLT
-922    0x0000    //TX_MICMUTE_DT_CUT_K
-923    0x0000    //TX_MICMUTE_DT_CUT_THR
-924    0x0000    //TX_MICMUTE_DT_CUT_K2
-925    0x0000    //TX_MICMUTE_DT_CUT_THR2
-926    0x0000    //TX_MICMUTE_DT2_HOLD_N
-927    0x0000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x0000    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0000    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x0000    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0000    //TX_MICMUTE_DT_CUT_K1
-933    0x0000    //TX_MICMUTE_N2_SN_EST
-934    0x0000    //TX_MICMUTE_THR_SN_EST_0
-935    0x0000    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x0000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x0000    //TX_MICMUTE_B_POST_FILT_0
-938    0x0000    //TX_MIC1RUB_AMP_THR
-939    0x0000    //TX_MIC1MUTE_RATIO_THR
-940    0x0000    //TX_MIC1MUTE_AMP_THR
-941    0x0000    //TX_MIC1MUTE_CVG_TIME
-942    0x0000    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x2064    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0000    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x7FFF    //RX_TDDRC_THRD_2
-115    0x7FFF    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0155    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x0064    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0000    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x7FFF    //RX_TDDRC_THRD_2
-272    0x7FFF    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0155    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
diff --git a/audio/tegu/tuning/fortemedia/HANDSET.dat b/audio/tegu/tuning/fortemedia/HANDSET.dat
index 9c27e32..cbde479 100644
Binary files a/audio/tegu/tuning/fortemedia/HANDSET.dat and b/audio/tegu/tuning/fortemedia/HANDSET.dat differ
diff --git a/audio/tegu/tuning/fortemedia/HANDSET.mods b/audio/tegu/tuning/fortemedia/HANDSET.mods
index 83a612d..dc75c3f 100644
--- a/audio/tegu/tuning/fortemedia/HANDSET.mods
+++ b/audio/tegu/tuning/fortemedia/HANDSET.mods
@@ -1,8028 +1,19 @@
 #PLATFORM_NAME  gChip
+#SINGLE_API_VER  1.4.2
 #EXPORT_FLAG  HANDSET
-#SINGLE_API_VER  1.2.0
-#SAVE_TIME  2022-02-09 11:15:13
-
-#CASE_NAME  HANDSET-HANDSET-RESERVE1-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6B56    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0007    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x051E    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x7FFF    //TX_GSC_RTOL_TH
-522    0x7FFF    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
-585    0x9898    //TX_FDEQ_GAIN_18
-586    0x9848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0F03    //TX_FDEQ_BIN_0
-592    0x0909    //TX_FDEQ_BIN_1
-593    0x080F    //TX_FDEQ_BIN_2
-594    0x0609    //TX_FDEQ_BIN_3
-595    0x0F03    //TX_FDEQ_BIN_4
-596    0x1402    //TX_FDEQ_BIN_5
-597    0x0E13    //TX_FDEQ_BIN_6
-598    0x110F    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x0E0F    //TX_FDEQ_BIN_9
-601    0x080D    //TX_FDEQ_BIN_10
-602    0x0F0F    //TX_FDEQ_BIN_11
-603    0x0F0F    //TX_FDEQ_BIN_12
-604    0x0A0F    //TX_FDEQ_BIN_13
-605    0x0809    //TX_FDEQ_BIN_14
-606    0x0A0B    //TX_FDEQ_BIN_15
-607    0x0C0D    //TX_FDEQ_BIN_16
-608    0x0E0F    //TX_FDEQ_BIN_17
-609    0x1013    //TX_FDEQ_BIN_18
-610    0x0A00    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x003C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0016    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0060    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x064E    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0016    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0026    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0060    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-CUSTOM2-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6B5E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0007    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x051E    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x7FFF    //TX_GSC_RTOL_TH
-522    0x7FFF    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
-585    0x9898    //TX_FDEQ_GAIN_18
-586    0x9848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0F03    //TX_FDEQ_BIN_0
-592    0x0909    //TX_FDEQ_BIN_1
-593    0x080F    //TX_FDEQ_BIN_2
-594    0x0609    //TX_FDEQ_BIN_3
-595    0x0F03    //TX_FDEQ_BIN_4
-596    0x1402    //TX_FDEQ_BIN_5
-597    0x0E13    //TX_FDEQ_BIN_6
-598    0x110F    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x0E0F    //TX_FDEQ_BIN_9
-601    0x080D    //TX_FDEQ_BIN_10
-602    0x0F0F    //TX_FDEQ_BIN_11
-603    0x0F0F    //TX_FDEQ_BIN_12
-604    0x0A0F    //TX_FDEQ_BIN_13
-605    0x0809    //TX_FDEQ_BIN_14
-606    0x0A0B    //TX_FDEQ_BIN_15
-607    0x0C0D    //TX_FDEQ_BIN_16
-608    0x0E0F    //TX_FDEQ_BIN_17
-609    0x1013    //TX_FDEQ_BIN_18
-610    0x0A00    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x003C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0016    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0060    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x064E    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0016    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0026    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0060    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-CUSTOM1-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6B76    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0007    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x051E    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x7FFF    //TX_GSC_RTOL_TH
-522    0x7FFF    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
-585    0x9898    //TX_FDEQ_GAIN_18
-586    0x9848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0F03    //TX_FDEQ_BIN_0
-592    0x0909    //TX_FDEQ_BIN_1
-593    0x080F    //TX_FDEQ_BIN_2
-594    0x0609    //TX_FDEQ_BIN_3
-595    0x0F03    //TX_FDEQ_BIN_4
-596    0x1402    //TX_FDEQ_BIN_5
-597    0x0E13    //TX_FDEQ_BIN_6
-598    0x110F    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x0E0F    //TX_FDEQ_BIN_9
-601    0x080D    //TX_FDEQ_BIN_10
-602    0x0F0F    //TX_FDEQ_BIN_11
-603    0x0F0F    //TX_FDEQ_BIN_12
-604    0x0A0F    //TX_FDEQ_BIN_13
-605    0x0809    //TX_FDEQ_BIN_14
-606    0x0A0B    //TX_FDEQ_BIN_15
-607    0x0C0D    //TX_FDEQ_BIN_16
-608    0x0E0F    //TX_FDEQ_BIN_17
-609    0x1013    //TX_FDEQ_BIN_18
-610    0x0A00    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x003C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0016    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0060    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x064E    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0016    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0026    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0060    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
+#PARAM_MODE   FULL
+#SAVE_MODE  3
+#SAVE_TIME  2024-02-22 17:40:37
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-NB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -8039,7 +30,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -8048,9 +39,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -8156,11 +147,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -8168,7 +159,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
+150    0x7F60    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -8187,9 +178,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x0280    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -8215,13 +206,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
+197    0x7A44    //TX_DTD_THR1_0
 198    0x7B00    //TX_DTD_THR1_1
-199    0x7B00    //TX_DTD_THR1_2
-200    0x7B00    //TX_DTD_THR1_3
-201    0x7B00    //TX_DTD_THR1_4
-202    0x7B00    //TX_DTD_THR1_5
-203    0x7B00    //TX_DTD_THR1_6
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
 204    0x1000    //TX_DTD_THR2_0
 205    0x1000    //TX_DTD_THR2_1
 206    0x1000    //TX_DTD_THR2_2
@@ -8301,30 +292,30 @@
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
 282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0017    //TX_NS_LVL_CTRL_3
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0019    //TX_NS_LVL_CTRL_4
 286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x001B    //TX_NS_LVL_CTRL_6
+287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
+291    0x0008    //TX_MIN_GAIN_S_2
+292    0x0006    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x0014    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0008    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x4000    //TX_SNRI_SUP_0
 301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -8333,20 +324,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
 317    0x2000    //TX_A_POST_FILT_S_3
 318    0x6000    //TX_A_POST_FILT_S_4
 319    0x2000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
+320    0x2000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x5000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x2000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x1000    //TX_B_LESSCUT_RTO_S_1
@@ -8359,7 +350,7 @@
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7200    //TX_LAMBDA_PFILT_S_1
-341    0x7900    //TX_LAMBDA_PFILT_S_2
+341    0x7800    //TX_LAMBDA_PFILT_S_2
 342    0x7400    //TX_LAMBDA_PFILT_S_3
 343    0x7200    //TX_LAMBDA_PFILT_S_4
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
@@ -8390,8 +381,8 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x6B6C    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x55F0    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -8415,7 +406,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -8446,7 +437,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -8458,8 +449,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -8527,7 +518,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -8541,11 +532,11 @@
 520    0x0000    //TX_DEREVERB_BETA
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+523    0x6000    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -8563,38 +554,38 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0080    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0080    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
-567    0x6C60    //TX_FDEQ_GAIN_0
-568    0x584F    //TX_FDEQ_GAIN_1
-569    0x4F4E    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4737    //TX_FDEQ_GAIN_4
-572    0x3A40    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3631    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
-576    0x383C    //TX_FDEQ_GAIN_9
+567    0x6D61    //TX_FDEQ_GAIN_0
+568    0x5951    //TX_FDEQ_GAIN_1
+569    0x5151    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4642    //TX_FDEQ_GAIN_4
+572    0x3E3E    //TX_FDEQ_GAIN_5
+573    0x4042    //TX_FDEQ_GAIN_6
+574    0x3830    //TX_FDEQ_GAIN_7
+575    0x3028    //TX_FDEQ_GAIN_8
+576    0x3C54    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -8613,12 +604,12 @@
 592    0x0104    //TX_FDEQ_BIN_1
 593    0x0502    //TX_FDEQ_BIN_2
 594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
+595    0x0505    //TX_FDEQ_BIN_4
+596    0x040A    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
+598    0x060D    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F09    //TX_FDEQ_BIN_9
+600    0x0C0C    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -8659,16 +650,16 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
 651    0x0000    //TX_PREEQ_BIN_MIC0_10
 652    0x0000    //TX_PREEQ_BIN_MIC0_11
 653    0x0000    //TX_PREEQ_BIN_MIC0_12
@@ -8683,17 +674,17 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0014    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4849    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -8793,8 +784,8 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -8834,19 +825,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -8874,17 +865,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0000    //TX_TDDRC_THRD_0
 855    0x0010    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
+866    0x05A0    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -8915,73 +906,99 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x01F4    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7F58    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x7F80    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x203C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -8991,8 +1008,8 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x050E    //RX_PGA
-11    0x7FFF    //RX_A_HP
+10    0x0800    //RX_PGA
+11    0x7646    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
 14    0x7000    //RX_THR_PITCH_DET_1
@@ -9003,11 +1020,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -9021,15 +1038,15 @@
 37    0x4000    //RX_LMT_ALPHA
 38    0x0014    //RX_FDEQ_SUBNUM
 39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x5464    //RX_FDEQ_GAIN_2
+42    0x7086    //RX_FDEQ_GAIN_3
+43    0x9AA4    //RX_FDEQ_GAIN_4
+44    0x928E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8686    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x989C    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9097,19 +1114,19 @@
 113    0x0000    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x055F    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x000A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -9161,18 +1178,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9235,7 +1252,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -9260,18 +1277,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9334,7 +1351,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
+129    0x0015    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -9359,18 +1376,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9433,7 +1450,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
+129    0x0026    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -9458,18 +1475,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9532,7 +1549,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002E    //RX_SPK_VOL
+129    0x0040    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -9557,18 +1574,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9631,7 +1648,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0045    //RX_SPK_VOL
+129    0x0062    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -9656,18 +1673,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9730,7 +1747,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
+129    0x009C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -9755,18 +1772,18 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -9857,8 +1874,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -9872,15 +1889,15 @@
 194    0x4000    //RX_LMT_ALPHA
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -9896,8 +1913,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -9956,7 +1973,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x05A0    //RX_TDDRC_DRC_GAIN
+281    0x055F    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x13E0    //RX_TPKA_FP
 284    0x0080    //RX_MIN_G_FP
@@ -10012,18 +2029,18 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x05A0    //RX_TDDRC_DRC_GAIN
+281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10039,8 +2056,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10114,15 +2131,15 @@
 281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10138,8 +2155,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10185,7 +2202,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0011    //RX_SPK_VOL
+286    0x0010    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -10213,15 +2230,15 @@
 281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10237,8 +2254,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10284,7 +2301,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001C    //RX_SPK_VOL
+286    0x001A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -10312,15 +2329,15 @@
 281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10336,8 +2353,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10383,7 +2400,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x002E    //RX_SPK_VOL
+286    0x0034    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -10411,15 +2428,15 @@
 281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10435,8 +2452,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10482,7 +2499,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004B    //RX_SPK_VOL
+286    0x0045    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -10510,15 +2527,15 @@
 281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10534,8 +2551,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10581,7 +2598,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x007B    //RX_SPK_VOL
+286    0x0074    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -10609,15 +2626,15 @@
 281    0x055F    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -10633,8 +2650,8 @@
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
 224    0x0405    //RX_FDEQ_BIN_4
 225    0x0506    //RX_FDEQ_BIN_5
@@ -10684,15 +2701,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -10709,7 +2725,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -10718,9 +2734,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -10826,11 +2842,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -10857,9 +2873,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -10885,11 +2901,11 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
+197    0x7148    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
 200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
+201    0x7FFF    //TX_DTD_THR1_4
 202    0x7F00    //TX_DTD_THR1_5
 203    0x7F00    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
@@ -11056,8 +3072,8 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
 372    0x2328    //TX_NOISE_TH_3
@@ -11084,8 +3100,8 @@
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
-396    0x4000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+396    0x0500    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -11197,7 +3213,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -11212,10 +3228,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x0000    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -11233,26 +3249,26 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -11329,19 +3345,19 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x7008    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0F10    //TX_PREEQ_BIN_MIC0_9
-651    0x1011    //TX_PREEQ_BIN_MIC0_10
-652    0x1112    //TX_PREEQ_BIN_MIC0_11
-653    0x1208    //TX_PREEQ_BIN_MIC0_12
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
 654    0x0000    //TX_PREEQ_BIN_MIC0_13
 655    0x0000    //TX_PREEQ_BIN_MIC0_14
 656    0x0000    //TX_PREEQ_BIN_MIC0_15
@@ -11353,7 +3369,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -11361,13 +3377,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4A    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x494C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4C4C    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -11390,8 +3406,8 @@
 699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x0F10    //TX_PREEQ_BIN_MIC1_10
 701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1112    //TX_PREEQ_BIN_MIC1_12
-703    0x120B    //TX_PREEQ_BIN_MIC1_13
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -11463,8 +3479,8 @@
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0005    //TX_GAIN_LIMIT_3
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -11504,19 +3520,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -11544,17 +3560,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x054F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -11585,73 +3601,99 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0298    //TX_MICMUTE_RATIO_THR
+900    0x02D8    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00AA    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0xFFFF    //TX_TFMASKM4_2_DT_THR
+945    0x7530    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x203C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -11661,8 +3703,8 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0480    //RX_PGA
-11    0x7FFF    //RX_A_HP
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
 14    0x7000    //RX_THR_PITCH_DET_1
@@ -11673,11 +3715,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -11690,19 +3732,19 @@
 36    0x1000    //RX_LMT_THRD
 37    0x7FDF    //RX_LMT_ALPHA
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
+39    0x4840    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4659    //RX_FDEQ_GAIN_2
+42    0x6474    //RX_FDEQ_GAIN_3
+43    0x7A82    //RX_FDEQ_GAIN_4
+44    0x8180    //RX_FDEQ_GAIN_5
+45    0x8084    //RX_FDEQ_GAIN_6
+46    0x8A88    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x8A95    //RX_FDEQ_GAIN_9
+49    0x978E    //RX_FDEQ_GAIN_10
+50    0x8C8C    //RX_FDEQ_GAIN_11
+51    0x7068    //RX_FDEQ_GAIN_12
 52    0x6050    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -11767,20 +3809,20 @@
 113    0x0000    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x1000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x04E6    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -11831,22 +3873,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -11866,10 +3908,10 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
 76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
@@ -11905,7 +3947,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -11930,22 +3972,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -11965,10 +4007,10 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
 76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
@@ -12004,7 +4046,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0017    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -12029,22 +4071,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -12064,109 +4106,10 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001E    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
 76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
@@ -12204,7 +4147,7 @@
 110    0x0000    //RX_FDDRC_RESRV_0
 129    0x0026    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
+#VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
@@ -12227,22 +4170,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -12262,10 +4205,10 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
 76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
@@ -12301,7 +4244,106 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0283    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0062    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -12326,22 +4368,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -12361,10 +4403,10 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
 76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
@@ -12400,7 +4442,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0086    //RX_SPK_VOL
+129    0x009C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -12425,22 +4467,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0283    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C90    //RX_FDEQ_GAIN_3
+43    0x9892    //RX_FDEQ_GAIN_4
+44    0x9890    //RX_FDEQ_GAIN_5
+45    0x8C8A    //RX_FDEQ_GAIN_6
+46    0x9296    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x9CA8    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x737C    //RX_FDEQ_GAIN_11
+51    0x866C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -12460,10 +4502,10 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
 76    0x110A    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
@@ -12527,8 +4569,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -12543,17 +4585,17 @@
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -12576,9 +4618,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -12626,12 +4668,12 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x13E0    //RX_TPKA_FP
 284    0x0080    //RX_MIN_G_FP
 285    0x2000    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -12682,21 +4724,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -12719,9 +4761,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -12756,7 +4798,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -12781,21 +4823,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -12818,9 +4860,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -12855,7 +4897,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0012    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -12880,21 +4922,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -12917,9 +4959,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -12954,7 +4996,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
+286    0x001E    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -12979,21 +5021,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -13016,9 +5058,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -13053,7 +5095,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0035    //RX_SPK_VOL
+286    0x0031    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -13078,21 +5120,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -13115,9 +5157,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -13152,7 +5194,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0057    //RX_SPK_VOL
+286    0x0050    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -13177,21 +5219,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -13214,9 +5256,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -13251,7 +5293,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x008E    //RX_SPK_VOL
+286    0x0086    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -13276,21 +5318,21 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
+281    0x04E6    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x4840    //RX_FDEQ_GAIN_0
 197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
 209    0x6050    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -13313,9 +5355,9 @@
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
 234    0x0000    //RX_FDEQ_BIN_14
 235    0x0000    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
@@ -13354,15 +5396,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -13379,7 +5420,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -13388,9 +5429,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -13486,7 +5527,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
+128    0x7D83    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x1800    //TX_THR_PITCH_DET_0
 131    0x1000    //TX_THR_PITCH_DET_1
@@ -13496,11 +5537,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -13508,7 +5549,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0400    //TX_MIN_EQ_RE_EST_0
 153    0x0400    //TX_MIN_EQ_RE_EST_1
@@ -13527,9 +5568,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x1800    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x01C0    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -13555,13 +5596,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
 205    0x2000    //TX_DTD_THR2_1
 206    0x2000    //TX_DTD_THR2_2
@@ -13569,9 +5610,9 @@
 208    0x1000    //TX_DTD_THR2_4
 209    0x1000    //TX_DTD_THR2_5
 210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
+211    0x7FD0    //TX_DTD_THR3
 212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
+213    0x3A98    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -13658,13 +5699,13 @@
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -13681,9 +5722,9 @@
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x3000    //TX_B_POST_FILT_6
@@ -13705,7 +5746,7 @@
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1D4C    //TX_K_PEPPER_HF
 350    0x0400    //TX_A_PEPPER_HF
@@ -13728,16 +5769,16 @@
 367    0x000A    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
+370    0x01F4    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x6D60    //TX_RATIODTL_CUT_TH
@@ -13751,11 +5792,11 @@
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x3000    //TX_POST_MASK_SUP_HSNE
 392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -13764,11 +5805,11 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -13798,8 +5839,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -13867,7 +5908,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -13882,10 +5923,10 @@
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -13903,45 +5944,45 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4640    //TX_FDEQ_GAIN_4
-572    0x4446    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5448    //TX_FDEQ_GAIN_7
-575    0x4243    //TX_FDEQ_GAIN_8
-576    0x434C    //TX_FDEQ_GAIN_9
-577    0x484D    //TX_FDEQ_GAIN_10
-578    0x4D4D    //TX_FDEQ_GAIN_11
-579    0x4B4E    //TX_FDEQ_GAIN_12
-580    0x5054    //TX_FDEQ_GAIN_13
-581    0x5D68    //TX_FDEQ_GAIN_14
-582    0x7C6B    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -13956,8 +5997,8 @@
 595    0x0504    //TX_FDEQ_BIN_4
 596    0x0708    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
 600    0x0F0F    //TX_FDEQ_BIN_9
 601    0x0E0D    //TX_FDEQ_BIN_10
 602    0x0F28    //TX_FDEQ_BIN_11
@@ -13999,22 +6040,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -14023,7 +6064,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -14031,16 +6072,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x494A    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4B    //TX_PREEQ_GAIN_MIC1_10
-677    0x4B4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4D4C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4A48    //TX_PREEQ_GAIN_MIC1_13
-680    0x4840    //TX_PREEQ_GAIN_MIC1_14
-681    0x3434    //TX_PREEQ_GAIN_MIC1_15
-682    0x3C48    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -14132,7 +6173,7 @@
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0005    //TX_GAIN_LIMIT_1
+774    0x0002    //TX_GAIN_LIMIT_1
 775    0x0000    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -14174,19 +6215,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -14214,17 +6255,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
+866    0x054F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -14247,7 +6288,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -14255,73 +6296,99 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x203C    //RX_RECVFUNC_MODE_0
+0    0x243C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -14331,8 +6398,8 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7FFF    //RX_A_HP
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
 14    0x5000    //RX_THR_PITCH_DET_1
@@ -14343,11 +6410,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -14363,19 +6430,19 @@
 39    0x483E    //RX_FDEQ_GAIN_0
 40    0x3E3E    //RX_FDEQ_GAIN_1
 41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
 46    0x8888    //RX_FDEQ_GAIN_7
 47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
 50    0x9487    //RX_FDEQ_GAIN_11
 51    0x6F64    //RX_FDEQ_GAIN_12
 52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14445,11 +6512,11 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x0551    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -14501,24 +6568,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14536,12 +6603,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14575,7 +6642,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
+129    0x000D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -14600,24 +6667,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14635,12 +6702,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14674,7 +6741,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
+129    0x0016    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -14699,24 +6766,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14734,12 +6801,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14773,7 +6840,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
+129    0x0025    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -14798,24 +6865,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14833,12 +6900,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14872,7 +6939,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002B    //RX_SPK_VOL
+129    0x0040    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -14897,24 +6964,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14932,12 +6999,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -14971,7 +7038,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
+129    0x005E    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -14996,24 +7063,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -15031,12 +7098,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -15070,7 +7137,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
+129    0x009A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15095,24 +7162,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
+124    0x02C0    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -15130,12 +7197,12 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
 75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
 78    0x282C    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
@@ -15182,7 +7249,7 @@
 164    0x1000    //RX_TDDRC_ALPHA_UP_2
 165    0x1000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
+167    0x05AA    //RX_PGA
 168    0x7FFF    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x5800    //RX_THR_PITCH_DET_0
@@ -15197,8 +7264,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -15211,22 +7278,22 @@
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15237,19 +7304,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15288,20 +7355,20 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0523    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x13E0    //RX_TPKA_FP
 284    0x0080    //RX_MIN_G_FP
 285    0x2000    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -15344,32 +7411,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0523    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15380,19 +7447,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15426,7 +7493,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
+286    0x000A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15443,32 +7510,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15479,19 +7546,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15525,7 +7592,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
+286    0x0010    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15542,32 +7609,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15578,19 +7645,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15624,7 +7691,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001F    //RX_SPK_VOL
+286    0x001B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15641,32 +7708,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15677,19 +7744,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15740,32 +7807,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15776,19 +7843,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15822,7 +7889,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0052    //RX_SPK_VOL
+286    0x0047    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15839,32 +7906,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15875,19 +7942,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -15921,7 +7988,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0087    //RX_SPK_VOL
+286    0x0076    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -15938,32 +8005,32 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
+281    0x0551    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15974,19 +8041,19 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
 229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x1013    //RX_FDEQ_BIN_10
 231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
 235    0x282C    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
@@ -16024,7 +8091,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -16032,7 +8098,7 @@
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
 3    0x6B7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
@@ -16058,9 +8124,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -16166,11 +8232,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -16425,7 +8491,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -16552,10 +8618,10 @@
 521    0x7FFF    //TX_GSC_RTOL_TH
 522    0x7FFF    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -16573,46 +8639,46 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
 585    0x9898    //TX_FDEQ_GAIN_18
 586    0x9848    //TX_FDEQ_GAIN_19
 587    0x4848    //TX_FDEQ_GAIN_20
@@ -16651,15 +8717,15 @@
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
@@ -16669,23 +8735,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -16700,17 +8766,17 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -16724,17 +8790,17 @@
 693    0x0304    //TX_PREEQ_BIN_MIC1_3
 694    0x0405    //TX_PREEQ_BIN_MIC1_4
 695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
 699    0x0C10    //TX_PREEQ_BIN_MIC1_9
 700    0x1013    //TX_PREEQ_BIN_MIC1_10
 701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -16767,23 +8833,23 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
 758    0x0000    //TX_PREEQ_BIN_MIC2_19
@@ -16851,12 +8917,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -16894,7 +8960,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -16934,7 +9000,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -16961,35 +9027,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x202C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -17001,7 +9093,7 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
+10    0x0722    //RX_PGA
 11    0x7FFF    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x5800    //RX_THR_PITCH_DET_0
@@ -17016,8 +9108,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -17030,21 +9122,21 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17115,7 +9207,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x1964    //RX_TPKA_FP
 127    0x0080    //RX_MIN_G_FP
@@ -17171,23 +9263,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17270,23 +9362,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17369,23 +9461,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17443,7 +9535,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
+129    0x0024    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17468,23 +9560,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17542,7 +9634,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
+129    0x003A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17567,23 +9659,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17641,7 +9733,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0060    //RX_SPK_VOL
+129    0x0059    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17666,23 +9758,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17740,7 +9832,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
+129    0x0090    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -17765,23 +9857,23 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
+124    0x02FD    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
 54    0x9CAC    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -17852,7 +9944,7 @@
 164    0x1000    //RX_TDDRC_ALPHA_UP_2
 165    0x1000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x064E    //RX_PGA
+167    0x0722    //RX_PGA
 168    0x7FFF    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x5800    //RX_THR_PITCH_DET_0
@@ -17867,8 +9959,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -17881,21 +9973,21 @@
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -17966,7 +10058,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x1964    //RX_TPKA_FP
 284    0x0080    //RX_MIN_G_FP
@@ -18022,23 +10114,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18121,23 +10213,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18220,23 +10312,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18294,7 +10386,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0026    //RX_SPK_VOL
+286    0x0024    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -18319,23 +10411,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18393,7 +10485,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003D    //RX_SPK_VOL
+286    0x003A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -18418,23 +10510,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18492,7 +10584,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0060    //RX_SPK_VOL
+286    0x0059    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -18517,23 +10609,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18591,7 +10683,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
+286    0x0090    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -18616,23 +10708,23 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
+281    0x02FD    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
 211    0x9CAC    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -18693,16 +10785,15 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
-#PARAM_MODE  Full
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-NB
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -18719,7 +10810,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -18728,9 +10819,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -18836,11 +10927,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -18848,7 +10939,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
+150    0x7F60    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -18867,9 +10958,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x0280    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -18895,13 +10986,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
+197    0x7A44    //TX_DTD_THR1_0
 198    0x7B00    //TX_DTD_THR1_1
-199    0x7B00    //TX_DTD_THR1_2
-200    0x7B00    //TX_DTD_THR1_3
-201    0x7B00    //TX_DTD_THR1_4
-202    0x7B00    //TX_DTD_THR1_5
-203    0x7B00    //TX_DTD_THR1_6
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
 204    0x1000    //TX_DTD_THR2_0
 205    0x1000    //TX_DTD_THR2_1
 206    0x1000    //TX_DTD_THR2_2
@@ -18981,30 +11072,30 @@
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
 282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0017    //TX_NS_LVL_CTRL_3
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0019    //TX_NS_LVL_CTRL_4
 286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x001B    //TX_NS_LVL_CTRL_6
+287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
+291    0x0008    //TX_MIN_GAIN_S_2
+292    0x0006    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x0014    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0008    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x4000    //TX_SNRI_SUP_0
 301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -19013,20 +11104,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
 317    0x2000    //TX_A_POST_FILT_S_3
 318    0x6000    //TX_A_POST_FILT_S_4
 319    0x2000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
+320    0x2000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x5000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x2000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x1000    //TX_B_LESSCUT_RTO_S_1
@@ -19039,7 +11130,7 @@
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7200    //TX_LAMBDA_PFILT_S_1
-341    0x7900    //TX_LAMBDA_PFILT_S_2
+341    0x7800    //TX_LAMBDA_PFILT_S_2
 342    0x7400    //TX_LAMBDA_PFILT_S_3
 343    0x7200    //TX_LAMBDA_PFILT_S_4
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
@@ -19070,8 +11161,8 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x6B6C    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x55F0    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -19095,7 +11186,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -19126,7 +11217,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -19138,8 +11229,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -19207,7 +11298,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -19221,11 +11312,11 @@
 520    0x0000    //TX_DEREVERB_BETA
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+523    0x6000    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -19243,38 +11334,38 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0080    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0080    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
-567    0x6C60    //TX_FDEQ_GAIN_0
-568    0x584F    //TX_FDEQ_GAIN_1
-569    0x4F4E    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4737    //TX_FDEQ_GAIN_4
-572    0x3A40    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3631    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
-576    0x383C    //TX_FDEQ_GAIN_9
+567    0x6D61    //TX_FDEQ_GAIN_0
+568    0x5951    //TX_FDEQ_GAIN_1
+569    0x5151    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4642    //TX_FDEQ_GAIN_4
+572    0x3E3E    //TX_FDEQ_GAIN_5
+573    0x4042    //TX_FDEQ_GAIN_6
+574    0x3030    //TX_FDEQ_GAIN_7
+575    0x3028    //TX_FDEQ_GAIN_8
+576    0x3C54    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -19293,12 +11384,12 @@
 592    0x0104    //TX_FDEQ_BIN_1
 593    0x0502    //TX_FDEQ_BIN_2
 594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
+595    0x0505    //TX_FDEQ_BIN_4
+596    0x040A    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
+598    0x060D    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F09    //TX_FDEQ_BIN_9
+600    0x0C0C    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -19339,16 +11430,16 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
 651    0x0000    //TX_PREEQ_BIN_MIC0_10
 652    0x0000    //TX_PREEQ_BIN_MIC0_11
 653    0x0000    //TX_PREEQ_BIN_MIC0_12
@@ -19363,17 +11454,17 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0014    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4849    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -19473,8 +11564,8093 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0010    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x062A    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x01F4    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7F58    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x7F80    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7646    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x483A    //RX_FDEQ_GAIN_0
+40    0x3A40    //RX_FDEQ_GAIN_1
+41    0x5464    //RX_FDEQ_GAIN_2
+42    0x7086    //RX_FDEQ_GAIN_3
+43    0x9AA4    //RX_FDEQ_GAIN_4
+44    0x928E    //RX_FDEQ_GAIN_5
+45    0x8684    //RX_FDEQ_GAIN_6
+46    0x8686    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x989C    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x055F    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0015    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0029    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0043    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0067    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01F3    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C54    //RX_FDEQ_GAIN_1
+41    0x6470    //RX_FDEQ_GAIN_2
+42    0x8494    //RX_FDEQ_GAIN_3
+43    0x9A94    //RX_FDEQ_GAIN_4
+44    0x8C80    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8488    //RX_FDEQ_GAIN_7
+47    0x888C    //RX_FDEQ_GAIN_8
+48    0x98B4    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0045    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x055F    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x3E40    //RX_FDEQ_GAIN_1
+198    0x515E    //RX_FDEQ_GAIN_2
+199    0x6470    //RX_FDEQ_GAIN_3
+200    0x7A84    //RX_FDEQ_GAIN_4
+201    0x7C7A    //RX_FDEQ_GAIN_5
+202    0x7C7C    //RX_FDEQ_GAIN_6
+203    0x7D7C    //RX_FDEQ_GAIN_7
+204    0x7E82    //RX_FDEQ_GAIN_8
+205    0x7C80    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0036    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6000    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x0200    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7148    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFB00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x01A0    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x5000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x2000    //TX_MAINREFRTOH_TH_H
+275    0x1400    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0018    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x001A    //TX_NS_LVL_CTRL_4
+286    0x001E    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
+288    0x001C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0012    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0012    //TX_MIN_GAIN_S_3
+293    0x0018    //TX_MIN_GAIN_S_4
+294    0x0018    //TX_MIN_GAIN_S_5
+295    0x0018    //TX_MIN_GAIN_S_6
+296    0x0018    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x5000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x4000    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7000    //TX_A_POST_FILT_S_0
+315    0x3000    //TX_A_POST_FILT_S_1
+316    0x3000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x7000    //TX_A_POST_FILT_S_4
+319    0x7000    //TX_A_POST_FILT_S_5
+320    0x7000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x4000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x5000    //TX_B_POST_FILT_6
+329    0x4000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C29    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0600    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0139    //TX_NOISE_TH_1
+371    0x0479    //TX_NOISE_TH_2
+372    0x2328    //TX_NOISE_TH_3
+373    0x4422    //TX_NOISE_TH_4
+374    0x5586    //TX_NOISE_TH_5
+375    0x4425    //TX_NOISE_TH_5_2
+376    0x0032    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x21E8    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0500    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x1000    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x05A8    //TX_SB_RHO_MEAN2_TH
+441    0x0384    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0280    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0200    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x0000    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x5048    //TX_FDEQ_GAIN_1
+569    0x4C4C    //TX_FDEQ_GAIN_2
+570    0x474A    //TX_FDEQ_GAIN_3
+571    0x473F    //TX_FDEQ_GAIN_4
+572    0x4245    //TX_FDEQ_GAIN_5
+573    0x4448    //TX_FDEQ_GAIN_6
+574    0x4C3C    //TX_FDEQ_GAIN_7
+575    0x3E3A    //TX_FDEQ_GAIN_8
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3836    //TX_FDEQ_GAIN_10
+578    0x3633    //TX_FDEQ_GAIN_11
+579    0x3838    //TX_FDEQ_GAIN_12
+580    0x4048    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x050E    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0F0F    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x0611    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x054F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x199A    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x2000    //TX_B_LESSCUT_RTO_MASK
+877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0298    //TX_MICMUTE_RATIO_THR
+900    0x02D8    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00AA    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0xFFFF    //TX_TFMASKM4_2_DT_THR
+945    0x7530    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x1000    //RX_LMT_THRD
+37    0x7FDF    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4840    //RX_FDEQ_GAIN_0
+40    0x4040    //RX_FDEQ_GAIN_1
+41    0x4659    //RX_FDEQ_GAIN_2
+42    0x6474    //RX_FDEQ_GAIN_3
+43    0x7A82    //RX_FDEQ_GAIN_4
+44    0x8180    //RX_FDEQ_GAIN_5
+45    0x8084    //RX_FDEQ_GAIN_6
+46    0x8A88    //RX_FDEQ_GAIN_7
+47    0x8C8C    //RX_FDEQ_GAIN_8
+48    0x8A95    //RX_FDEQ_GAIN_9
+49    0x978E    //RX_FDEQ_GAIN_10
+50    0x8C8C    //RX_FDEQ_GAIN_11
+51    0x7068    //RX_FDEQ_GAIN_12
+52    0x6050    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F0E    //RX_FDEQ_BIN_11
+75    0x100D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04E6    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0019    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0028    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0062    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x5052    //RX_FDEQ_GAIN_1
+41    0x5C6C    //RX_FDEQ_GAIN_2
+42    0x7C94    //RX_FDEQ_GAIN_3
+43    0x9C92    //RX_FDEQ_GAIN_4
+44    0x9088    //RX_FDEQ_GAIN_5
+45    0x8482    //RX_FDEQ_GAIN_6
+46    0x8A8E    //RX_FDEQ_GAIN_7
+47    0x8C94    //RX_FDEQ_GAIN_8
+48    0x94A0    //RX_FDEQ_GAIN_9
+49    0xA098    //RX_FDEQ_GAIN_10
+50    0x7378    //RX_FDEQ_GAIN_11
+51    0x826C    //RX_FDEQ_GAIN_12
+52    0x6454    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D16    //RX_FDEQ_BIN_9
+73    0x0F05    //RX_FDEQ_BIN_10
+74    0x060A    //RX_FDEQ_BIN_11
+75    0x1E0D    //RX_FDEQ_BIN_12
+76    0x110A    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0600    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x1000    //RX_LMT_THRD
+194    0x7FDF    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0031    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0086    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04E6    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4840    //RX_FDEQ_GAIN_0
+197    0x4040    //RX_FDEQ_GAIN_1
+198    0x4659    //RX_FDEQ_GAIN_2
+199    0x6474    //RX_FDEQ_GAIN_3
+200    0x7A82    //RX_FDEQ_GAIN_4
+201    0x8180    //RX_FDEQ_GAIN_5
+202    0x8084    //RX_FDEQ_GAIN_6
+203    0x8A88    //RX_FDEQ_GAIN_7
+204    0x8C8C    //RX_FDEQ_GAIN_8
+205    0x8A95    //RX_FDEQ_GAIN_9
+206    0x978E    //RX_FDEQ_GAIN_10
+207    0x8C8C    //RX_FDEQ_GAIN_11
+208    0x7068    //RX_FDEQ_GAIN_12
+209    0x6050    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F0E    //RX_FDEQ_BIN_11
+232    0x100D    //RX_FDEQ_BIN_12
+233    0x110A    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x3A98    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C54    //TX_FDEQ_GAIN_0
+568    0x524F    //TX_FDEQ_GAIN_1
+569    0x5053    //TX_FDEQ_GAIN_2
+570    0x5054    //TX_FDEQ_GAIN_3
+571    0x4E50    //TX_FDEQ_GAIN_4
+572    0x4850    //TX_FDEQ_GAIN_5
+573    0x5051    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x3E3A    //TX_FDEQ_GAIN_11
+579    0x3634    //TX_FDEQ_GAIN_12
+580    0x3434    //TX_FDEQ_GAIN_13
+581    0x3454    //TX_FDEQ_GAIN_14
+582    0x4C64    //TX_FDEQ_GAIN_15
+583    0x3848    //TX_FDEQ_GAIN_16
+584    0x4040    //TX_FDEQ_GAIN_17
+585    0x4040    //TX_FDEQ_GAIN_18
+586    0x4040    //TX_FDEQ_GAIN_19
+587    0x4040    //TX_FDEQ_GAIN_20
+588    0x4040    //TX_FDEQ_GAIN_21
+589    0x4040    //TX_FDEQ_GAIN_22
+590    0x4040    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0714    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000F    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0019    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x002A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0041    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0066    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00A2    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0223    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A96    //RX_FDEQ_GAIN_3
+43    0xB0A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9090    //RX_FDEQ_GAIN_11
+51    0x8478    //RX_FDEQ_GAIN_12
+52    0x7C80    //RX_FDEQ_GAIN_13
+53    0x706C    //RX_FDEQ_GAIN_14
+54    0x5078    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B7E    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009C    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -19521,12 +19697,21572 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x202C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x1964    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x002C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x1964    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM1-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F76    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x3A98    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x054F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM1-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B76    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7C    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x3A98    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x0000    //TX_A_POST_FILT_0
+313    0x0000    //TX_A_POST_FILT_1
+314    0x0000    //TX_A_POST_FILT_S_0
+315    0x0000    //TX_A_POST_FILT_S_1
+316    0x0000    //TX_A_POST_FILT_S_2
+317    0x0000    //TX_A_POST_FILT_S_3
+318    0x0000    //TX_A_POST_FILT_S_4
+319    0x0000    //TX_A_POST_FILT_S_5
+320    0x0000    //TX_A_POST_FILT_S_6
+321    0x0000    //TX_A_POST_FILT_S_7
+322    0x0000    //TX_B_POST_FILT_0
+323    0x0000    //TX_B_POST_FILT_1
+324    0x0000    //TX_B_POST_FILT_2
+325    0x0000    //TX_B_POST_FILT_3
+326    0x0000    //TX_B_POST_FILT_4
+327    0x0000    //TX_B_POST_FILT_5
+328    0x0000    //TX_B_POST_FILT_6
+329    0x0000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x054F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-CUSTOM2-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B5E    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F56    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x3A98    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x054F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005E    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x009A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02C0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE1-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0026    //TX_PATCH_REG
+3    0x6B56    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x00A4    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7900    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x003C    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7000    //TX_DTD_THR1_2
+200    0x7F00    //TX_DTD_THR1_3
+201    0x7F00    //TX_DTD_THR1_4
+202    0x7F00    //TX_DTD_THR1_5
+203    0x7F00    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x6000    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x1B58    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0007    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x6000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x07D0    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x00C6    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x47E0    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x39DF    //TX_NOISE_TH_6
+379    0x0014    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x051E    //TX_SB_RHO_MEAN2_TH
+441    0x051E    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x7FFF    //TX_GSC_RTOL_TH
+522    0x7FFF    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
+585    0x9898    //TX_FDEQ_GAIN_18
+586    0x9848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0F03    //TX_FDEQ_BIN_0
+592    0x0909    //TX_FDEQ_BIN_1
+593    0x080F    //TX_FDEQ_BIN_2
+594    0x0609    //TX_FDEQ_BIN_3
+595    0x0F03    //TX_FDEQ_BIN_4
+596    0x1402    //TX_FDEQ_BIN_5
+597    0x0E13    //TX_FDEQ_BIN_6
+598    0x110F    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x0E0F    //TX_FDEQ_BIN_9
+601    0x080D    //TX_FDEQ_BIN_10
+602    0x0F0F    //TX_FDEQ_BIN_11
+603    0x0F0F    //TX_FDEQ_BIN_12
+604    0x0A0F    //TX_FDEQ_BIN_13
+605    0x0809    //TX_FDEQ_BIN_14
+606    0x0A0B    //TX_FDEQ_BIN_15
+607    0x0C0D    //TX_FDEQ_BIN_16
+608    0x0E0F    //TX_FDEQ_BIN_17
+609    0x1013    //TX_FDEQ_BIN_18
+610    0x0A00    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0504    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x003C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0722    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0024    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x003A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0059    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02FD    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E4E    //RX_FDEQ_GAIN_0
+40    0x4E56    //RX_FDEQ_GAIN_1
+41    0x6878    //RX_FDEQ_GAIN_2
+42    0x8088    //RX_FDEQ_GAIN_3
+43    0x848B    //RX_FDEQ_GAIN_4
+44    0x8F8E    //RX_FDEQ_GAIN_5
+45    0x9494    //RX_FDEQ_GAIN_6
+46    0x96A0    //RX_FDEQ_GAIN_7
+47    0xB8A0    //RX_FDEQ_GAIN_8
+48    0xA99D    //RX_FDEQ_GAIN_9
+49    0x9D6A    //RX_FDEQ_GAIN_10
+50    0x626B    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x7884    //RX_FDEQ_GAIN_13
+53    0x9098    //RX_FDEQ_GAIN_14
+54    0x9CAC    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0302    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0722    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0016    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0059    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0090    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02FD    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E4E    //RX_FDEQ_GAIN_0
+197    0x4E56    //RX_FDEQ_GAIN_1
+198    0x6878    //RX_FDEQ_GAIN_2
+199    0x8088    //RX_FDEQ_GAIN_3
+200    0x848B    //RX_FDEQ_GAIN_4
+201    0x8F8E    //RX_FDEQ_GAIN_5
+202    0x9494    //RX_FDEQ_GAIN_6
+203    0x96A0    //RX_FDEQ_GAIN_7
+204    0xB8A0    //RX_FDEQ_GAIN_8
+205    0xA99D    //RX_FDEQ_GAIN_9
+206    0x9D6A    //RX_FDEQ_GAIN_10
+207    0x626B    //RX_FDEQ_GAIN_11
+208    0x6C78    //RX_FDEQ_GAIN_12
+209    0x7884    //RX_FDEQ_GAIN_13
+210    0x9098    //RX_FDEQ_GAIN_14
+211    0x9CAC    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0302    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x3A98    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x054F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x243C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7D83    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x483E    //RX_FDEQ_GAIN_0
+40    0x3E3E    //RX_FDEQ_GAIN_1
+41    0x3E4C    //RX_FDEQ_GAIN_2
+42    0x5064    //RX_FDEQ_GAIN_3
+43    0x7076    //RX_FDEQ_GAIN_4
+44    0x897A    //RX_FDEQ_GAIN_5
+45    0x7C80    //RX_FDEQ_GAIN_6
+46    0x8888    //RX_FDEQ_GAIN_7
+47    0x949C    //RX_FDEQ_GAIN_8
+48    0x96A4    //RX_FDEQ_GAIN_9
+49    0xA9A0    //RX_FDEQ_GAIN_10
+50    0x9487    //RX_FDEQ_GAIN_11
+51    0x6F64    //RX_FDEQ_GAIN_12
+52    0x625A    //RX_FDEQ_GAIN_13
+53    0x5D80    //RX_FDEQ_GAIN_14
+54    0x8890    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x141E    //RX_FDEQ_BIN_13
+77    0x3728    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0551    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0016    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0040    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0090    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x565A    //RX_FDEQ_GAIN_1
+41    0x5E72    //RX_FDEQ_GAIN_2
+42    0x7A92    //RX_FDEQ_GAIN_3
+43    0xA6A2    //RX_FDEQ_GAIN_4
+44    0xA098    //RX_FDEQ_GAIN_5
+45    0x8E90    //RX_FDEQ_GAIN_6
+46    0x9CA0    //RX_FDEQ_GAIN_7
+47    0xA0AC    //RX_FDEQ_GAIN_8
+48    0xB4C2    //RX_FDEQ_GAIN_9
+49    0xC0A8    //RX_FDEQ_GAIN_10
+50    0x9094    //RX_FDEQ_GAIN_11
+51    0x887C    //RX_FDEQ_GAIN_12
+52    0x807C    //RX_FDEQ_GAIN_13
+53    0x6C7C    //RX_FDEQ_GAIN_14
+54    0x6888    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0202    //RX_FDEQ_BIN_1
+65    0x0301    //RX_FDEQ_BIN_2
+66    0x0404    //RX_FDEQ_BIN_3
+67    0x0406    //RX_FDEQ_BIN_4
+68    0x0109    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0F    //RX_FDEQ_BIN_9
+73    0x0E0E    //RX_FDEQ_BIN_10
+74    0x1D19    //RX_FDEQ_BIN_11
+75    0x1B0F    //RX_FDEQ_BIN_12
+76    0x1427    //RX_FDEQ_BIN_13
+77    0x1E38    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x003C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x05AA    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0010    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0032    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0047    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0076    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0551    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x483E    //RX_FDEQ_GAIN_0
+197    0x3E3E    //RX_FDEQ_GAIN_1
+198    0x3E4C    //RX_FDEQ_GAIN_2
+199    0x5064    //RX_FDEQ_GAIN_3
+200    0x7076    //RX_FDEQ_GAIN_4
+201    0x897A    //RX_FDEQ_GAIN_5
+202    0x7C80    //RX_FDEQ_GAIN_6
+203    0x8888    //RX_FDEQ_GAIN_7
+204    0x949C    //RX_FDEQ_GAIN_8
+205    0x96A4    //RX_FDEQ_GAIN_9
+206    0xA9A0    //RX_FDEQ_GAIN_10
+207    0x9487    //RX_FDEQ_GAIN_11
+208    0x6F64    //RX_FDEQ_GAIN_12
+209    0x625A    //RX_FDEQ_GAIN_13
+210    0x5D80    //RX_FDEQ_GAIN_14
+211    0x8890    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0202    //RX_FDEQ_BIN_1
+222    0x0301    //RX_FDEQ_BIN_2
+223    0x0404    //RX_FDEQ_BIN_3
+224    0x0406    //RX_FDEQ_BIN_4
+225    0x0109    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B0F    //RX_FDEQ_BIN_12
+233    0x141E    //RX_FDEQ_BIN_13
+234    0x3728    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0800    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7F60    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x0200    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x0400    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x0400    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0280    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7A44    //TX_DTD_THR1_0
+198    0x7B00    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x1000    //TX_DTD_THR2_0
+205    0x1000    //TX_DTD_THR2_1
+206    0x1000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0000    //TX_RATIO_DT_L_TH_LOW
+224    0x0000    //TX_RATIO_DT_H_TH_LOW
+225    0x0000    //TX_RATIO_DT_L_TH_HIGH
+226    0x0000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0000    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xF800    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF900    //TX_THR_SN_EST_3
+246    0xF900    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x01A0    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x3000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x3000    //TX_LAMBDA_NN_EST_3
+262    0x3000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x0000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x3000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x3000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x3000    //TX_MAINREFRTO_TH_H
+277    0x1000    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x4000    //TX_B_POST_FLT_0
+280    0x4000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x0019    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x0019    //TX_NS_LVL_CTRL_4
+286    0x0014    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x0010    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x0008    //TX_MIN_GAIN_S_2
+292    0x0006    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0008    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x5000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x4000    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x3000    //TX_SNRI_SUP_7
+308    0x3000    //TX_THR_LFNS
+309    0x001A    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x2000    //TX_A_POST_FILT_S_5
+320    0x2000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x4000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x5000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x4000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7200    //TX_LAMBDA_PFILT_S_1
+341    0x7800    //TX_LAMBDA_PFILT_S_2
+342    0x7400    //TX_LAMBDA_PFILT_S_3
+343    0x7200    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0C80    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0004    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x022C    //TX_NOISE_TH_2
+372    0x2260    //TX_NOISE_TH_3
+373    0x55F0    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x07D0    //TX_NOISE_TH_6
+379    0x0004    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0001    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x000A    //TX_NS_ENOISE_MIC0_TH
+406    0x0004    //TX_MINENOISE_MIC0_TH
+407    0x0014    //TX_MINENOISE_MIC0_S_TH
+408    0x4900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0FA0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x4000    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0100    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x6000    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x001A    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0080    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0018    //TX_FDEQ_SUBNUM
+567    0x6D61    //TX_FDEQ_GAIN_0
+568    0x5951    //TX_FDEQ_GAIN_1
+569    0x5151    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4642    //TX_FDEQ_GAIN_4
+572    0x3E3E    //TX_FDEQ_GAIN_5
+573    0x4042    //TX_FDEQ_GAIN_6
+574    0x3830    //TX_FDEQ_GAIN_7
+575    0x3028    //TX_FDEQ_GAIN_8
+576    0x3C54    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0505    //TX_FDEQ_BIN_4
+596    0x040A    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x060D    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0C0C    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -19554,17 +41290,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0000    //TX_TDDRC_THRD_0
 855    0x0010    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
+866    0x05A0    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -19595,71 +41331,97 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x01F4    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7F58    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x7F80    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -19686,8 +41448,8 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -19842,18 +41604,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -19876,8 +41638,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -19941,18 +41703,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -19975,8 +41737,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -20040,18 +41802,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20074,8 +41836,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -20139,18 +41901,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20173,8 +41935,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -20238,18 +42000,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20272,8 +42034,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -20337,18 +42099,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20371,8 +42133,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -20436,18 +42198,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -20470,8 +42232,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -20537,8 +42299,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -21364,15 +43126,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -21389,7 +43150,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -21398,9 +43159,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -21506,11 +43267,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -21537,9 +43298,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -21565,11 +43326,11 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
+197    0x7148    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
 200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
+201    0x7FFF    //TX_DTD_THR1_4
 202    0x7F00    //TX_DTD_THR1_5
 203    0x7F00    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
@@ -21736,8 +43497,8 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
 372    0x2328    //TX_NOISE_TH_3
@@ -21764,8 +43525,8 @@
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
-396    0x4000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+396    0x0500    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -21877,7 +43638,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -21892,10 +43653,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x0000    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -21913,26 +43674,26 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -22009,19 +43770,19 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x7008    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0F10    //TX_PREEQ_BIN_MIC0_9
-651    0x1011    //TX_PREEQ_BIN_MIC0_10
-652    0x1112    //TX_PREEQ_BIN_MIC0_11
-653    0x1208    //TX_PREEQ_BIN_MIC0_12
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
 654    0x0000    //TX_PREEQ_BIN_MIC0_13
 655    0x0000    //TX_PREEQ_BIN_MIC0_14
 656    0x0000    //TX_PREEQ_BIN_MIC0_15
@@ -22033,7 +43794,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -22041,13 +43802,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4A    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x494C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4C4C    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -22070,8 +43831,8 @@
 699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x0F10    //TX_PREEQ_BIN_MIC1_10
 701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1112    //TX_PREEQ_BIN_MIC1_12
-703    0x120B    //TX_PREEQ_BIN_MIC1_13
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -22143,8 +43904,8 @@
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0005    //TX_GAIN_LIMIT_3
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -22184,19 +43945,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -22224,17 +43985,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x054F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -22265,71 +44026,97 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0298    //TX_MICMUTE_RATIO_THR
+900    0x02D8    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00AA    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0xFFFF    //TX_TFMASKM4_2_DT_THR
+945    0x7530    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -22356,8 +44143,8 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -22512,12 +44299,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -22611,12 +44398,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -22710,12 +44497,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -22809,12 +44596,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -22908,12 +44695,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -23007,12 +44794,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -23106,12 +44893,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -23207,8 +44994,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -24034,15 +45821,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -24059,7 +45845,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -24068,9 +45854,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -24166,7 +45952,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
+128    0x7D83    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x1800    //TX_THR_PITCH_DET_0
 131    0x1000    //TX_THR_PITCH_DET_1
@@ -24176,11 +45962,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -24188,7 +45974,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0400    //TX_MIN_EQ_RE_EST_0
 153    0x0400    //TX_MIN_EQ_RE_EST_1
@@ -24207,9 +45993,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x1800    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x01C0    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -24235,13 +46021,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
 205    0x2000    //TX_DTD_THR2_1
 206    0x2000    //TX_DTD_THR2_2
@@ -24249,9 +46035,9 @@
 208    0x1000    //TX_DTD_THR2_4
 209    0x1000    //TX_DTD_THR2_5
 210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
+211    0x7FD0    //TX_DTD_THR3
 212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
+213    0x3A98    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -24338,13 +46124,13 @@
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -24361,9 +46147,9 @@
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x3000    //TX_B_POST_FILT_6
@@ -24385,7 +46171,7 @@
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1D4C    //TX_K_PEPPER_HF
 350    0x0400    //TX_A_PEPPER_HF
@@ -24408,16 +46194,16 @@
 367    0x000A    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
+370    0x01F4    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x6D60    //TX_RATIODTL_CUT_TH
@@ -24431,11 +46217,11 @@
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x3000    //TX_POST_MASK_SUP_HSNE
 392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -24444,11 +46230,11 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -24478,8 +46264,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -24547,7 +46333,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -24562,10 +46348,10 @@
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -24583,45 +46369,45 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4640    //TX_FDEQ_GAIN_4
-572    0x4446    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5448    //TX_FDEQ_GAIN_7
-575    0x4243    //TX_FDEQ_GAIN_8
-576    0x434C    //TX_FDEQ_GAIN_9
-577    0x484D    //TX_FDEQ_GAIN_10
-578    0x4D4D    //TX_FDEQ_GAIN_11
-579    0x4B4E    //TX_FDEQ_GAIN_12
-580    0x5054    //TX_FDEQ_GAIN_13
-581    0x5D68    //TX_FDEQ_GAIN_14
-582    0x7C6B    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -24636,8 +46422,8 @@
 595    0x0504    //TX_FDEQ_BIN_4
 596    0x0708    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
 600    0x0F0F    //TX_FDEQ_BIN_9
 601    0x0E0D    //TX_FDEQ_BIN_10
 602    0x0F28    //TX_FDEQ_BIN_11
@@ -24679,22 +46465,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -24703,7 +46489,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -24711,16 +46497,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x494A    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4B    //TX_PREEQ_GAIN_MIC1_10
-677    0x4B4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4D4C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4A48    //TX_PREEQ_GAIN_MIC1_13
-680    0x4840    //TX_PREEQ_GAIN_MIC1_14
-681    0x3434    //TX_PREEQ_GAIN_MIC1_15
-682    0x3C48    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -24812,7 +46598,7 @@
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0005    //TX_GAIN_LIMIT_1
+774    0x0002    //TX_GAIN_LIMIT_1
 775    0x0000    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -24854,19 +46640,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -24894,17 +46680,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
+866    0x054F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -24927,7 +46713,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -24935,71 +46721,97 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -25026,8 +46838,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -25182,18 +46994,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25281,18 +47093,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25380,18 +47192,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25479,18 +47291,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25578,18 +47390,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25677,18 +47489,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25776,18 +47588,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4B4D    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5C60    //RX_FDEQ_GAIN_7
 47    0x6468    //RX_FDEQ_GAIN_8
-48    0x6C70    //RX_FDEQ_GAIN_9
-49    0x7474    //RX_FDEQ_GAIN_10
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
 50    0x7474    //RX_FDEQ_GAIN_11
 51    0x7474    //RX_FDEQ_GAIN_12
 52    0x7474    //RX_FDEQ_GAIN_13
@@ -25877,8 +47689,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -26704,7 +48516,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -26712,7 +48523,7 @@
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
 3    0x6B7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
@@ -26738,9 +48549,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -26846,11 +48657,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -27105,7 +48916,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -27232,10 +49043,10 @@
 521    0x7FFF    //TX_GSC_RTOL_TH
 522    0x7FFF    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -27253,46 +49064,46 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
 585    0x9898    //TX_FDEQ_GAIN_18
 586    0x9848    //TX_FDEQ_GAIN_19
 587    0x4848    //TX_FDEQ_GAIN_20
@@ -27331,15 +49142,15 @@
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
@@ -27349,23 +49160,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -27380,17 +49191,17 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -27404,17 +49215,17 @@
 693    0x0304    //TX_PREEQ_BIN_MIC1_3
 694    0x0405    //TX_PREEQ_BIN_MIC1_4
 695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
 699    0x0C10    //TX_PREEQ_BIN_MIC1_9
 700    0x1013    //TX_PREEQ_BIN_MIC1_10
 701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -27447,23 +49258,23 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
 758    0x0000    //TX_PREEQ_BIN_MIC2_19
@@ -27531,12 +49342,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -27574,7 +49385,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -27614,7 +49425,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -27641,35 +49452,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -27696,8 +49533,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -28547,8 +50384,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -29373,16 +51210,15 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-NB
-#PARAM_MODE  Full
+#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-NB
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -29399,7 +51235,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -29408,9 +51244,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -29516,11 +51352,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -29528,7 +51364,7 @@
 147    0x0800    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
+150    0x7F60    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0100    //TX_MIN_EQ_RE_EST_0
 153    0x0100    //TX_MIN_EQ_RE_EST_1
@@ -29547,9 +51383,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x0280    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0120    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -29575,13 +51411,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
+197    0x7A44    //TX_DTD_THR1_0
 198    0x7B00    //TX_DTD_THR1_1
-199    0x7B00    //TX_DTD_THR1_2
-200    0x7B00    //TX_DTD_THR1_3
-201    0x7B00    //TX_DTD_THR1_4
-202    0x7B00    //TX_DTD_THR1_5
-203    0x7B00    //TX_DTD_THR1_6
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
 204    0x1000    //TX_DTD_THR2_0
 205    0x1000    //TX_DTD_THR2_1
 206    0x1000    //TX_DTD_THR2_2
@@ -29661,30 +51497,30 @@
 280    0x4000    //TX_B_POST_FLT_1
 281    0x0014    //TX_NS_LVL_CTRL_0
 282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0017    //TX_NS_LVL_CTRL_3
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0019    //TX_NS_LVL_CTRL_4
 286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x001B    //TX_NS_LVL_CTRL_6
+287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x0010    //TX_MIN_GAIN_S_0
 290    0x000C    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
+291    0x0008    //TX_MIN_GAIN_S_2
+292    0x0006    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x0014    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
+295    0x0008    //TX_MIN_GAIN_S_6
 296    0x0014    //TX_MIN_GAIN_S_7
 297    0x5000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x4000    //TX_SNRI_SUP_0
 301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+302    0x6000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x6000    //TX_SNRI_SUP_6
 307    0x3000    //TX_SNRI_SUP_7
 308    0x3000    //TX_THR_LFNS
 309    0x001A    //TX_G_LFNS
@@ -29693,20 +51529,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x2000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
+315    0x2000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
 317    0x2000    //TX_A_POST_FILT_S_3
 318    0x6000    //TX_A_POST_FILT_S_4
 319    0x2000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
+320    0x2000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x5000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+325    0x2000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
+328    0x2000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
 331    0x1000    //TX_B_LESSCUT_RTO_S_1
@@ -29719,7 +51555,7 @@
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
 340    0x7200    //TX_LAMBDA_PFILT_S_1
-341    0x7900    //TX_LAMBDA_PFILT_S_2
+341    0x7800    //TX_LAMBDA_PFILT_S_2
 342    0x7400    //TX_LAMBDA_PFILT_S_3
 343    0x7200    //TX_LAMBDA_PFILT_S_4
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
@@ -29750,8 +51586,8 @@
 369    0x2134    //TX_NOISE_TH_0_3
 370    0x0320    //TX_NOISE_TH_1
 371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x6B6C    //TX_NOISE_TH_4
+372    0x2260    //TX_NOISE_TH_3
+373    0x55F0    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
@@ -29775,7 +51611,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -29806,7 +51642,7 @@
 425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
 426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
 427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
+428    0x0100    //TX_WTA_EN_RTO_TH
 429    0x1400    //TX_TOP_ENER_TH_F
 430    0x0100    //TX_DESIRED_TALK_HOLDT
 431    0x0800    //TX_MIC_BLOCK_FACTOR
@@ -29818,8 +51654,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0666    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x003C    //TX_DOA_VAD_THR_1
@@ -29887,7 +51723,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -29901,11 +51737,11 @@
 520    0x0000    //TX_DEREVERB_BETA
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+523    0x6000    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -29923,38 +51759,38 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0080    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0080    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0018    //TX_FDEQ_SUBNUM
-567    0x6C60    //TX_FDEQ_GAIN_0
-568    0x584F    //TX_FDEQ_GAIN_1
-569    0x4F4E    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4737    //TX_FDEQ_GAIN_4
-572    0x3A40    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3631    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
-576    0x383C    //TX_FDEQ_GAIN_9
+567    0x6D61    //TX_FDEQ_GAIN_0
+568    0x5951    //TX_FDEQ_GAIN_1
+569    0x5151    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4642    //TX_FDEQ_GAIN_4
+572    0x3E3E    //TX_FDEQ_GAIN_5
+573    0x4042    //TX_FDEQ_GAIN_6
+574    0x3830    //TX_FDEQ_GAIN_7
+575    0x3028    //TX_FDEQ_GAIN_8
+576    0x3C54    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -29973,12 +51809,12 @@
 592    0x0104    //TX_FDEQ_BIN_1
 593    0x0502    //TX_FDEQ_BIN_2
 594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
+595    0x0505    //TX_FDEQ_BIN_4
+596    0x040A    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
+598    0x060D    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F09    //TX_FDEQ_BIN_9
+600    0x0C0C    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -30019,16 +51855,16 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C08    //TX_PREEQ_BIN_MIC0_2
+644    0x0700    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
 651    0x0000    //TX_PREEQ_BIN_MIC0_10
 652    0x0000    //TX_PREEQ_BIN_MIC0_11
 653    0x0000    //TX_PREEQ_BIN_MIC0_12
@@ -30043,8016 +51879,6 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0014    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4849    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x203C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x050E    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002E    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0045    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x06EC    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x483A    //RX_FDEQ_GAIN_0
-40    0x3A3A    //RX_FDEQ_GAIN_1
-41    0x4A58    //RX_FDEQ_GAIN_2
-42    0x5E6E    //RX_FDEQ_GAIN_3
-43    0x7A84    //RX_FDEQ_GAIN_4
-44    0x7C7A    //RX_FDEQ_GAIN_5
-45    0x7C78    //RX_FDEQ_GAIN_6
-46    0x7978    //RX_FDEQ_GAIN_7
-47    0x7A7E    //RX_FDEQ_GAIN_8
-48    0x7C80    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0204    //RX_FDEQ_BIN_1
-65    0x0203    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x05A0    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x05A0    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0011    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x002E    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x007B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x055F    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x3E3E    //RX_FDEQ_GAIN_1
-198    0x4E62    //RX_FDEQ_GAIN_2
-199    0x6C7A    //RX_FDEQ_GAIN_3
-200    0x8690    //RX_FDEQ_GAIN_4
-201    0x867E    //RX_FDEQ_GAIN_5
-202    0x7E7E    //RX_FDEQ_GAIN_6
-203    0x8080    //RX_FDEQ_GAIN_7
-204    0x8088    //RX_FDEQ_GAIN_8
-205    0x838B    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0036    //TX_PATCH_REG
-3    0x2F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0800    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x0200    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x0400    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x0400    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFB00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x01A0    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x5000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x2000    //TX_MAINREFRTOH_TH_H
-275    0x1400    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x4000    //TX_B_POST_FLT_1
-281    0x0018    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x001A    //TX_NS_LVL_CTRL_4
-286    0x001E    //TX_NS_LVL_CTRL_5
-287    0x001C    //TX_NS_LVL_CTRL_6
-288    0x001C    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0012    //TX_MIN_GAIN_S_3
-293    0x0018    //TX_MIN_GAIN_S_4
-294    0x0018    //TX_MIN_GAIN_S_5
-295    0x0018    //TX_MIN_GAIN_S_6
-296    0x0018    //TX_MIN_GAIN_S_7
-297    0x5000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x5000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x4000    //TX_SNRI_SUP_7
-308    0x4000    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7000    //TX_A_POST_FILT_S_0
-315    0x3000    //TX_A_POST_FILT_S_1
-316    0x3000    //TX_A_POST_FILT_S_2
-317    0x2000    //TX_A_POST_FILT_S_3
-318    0x7000    //TX_A_POST_FILT_S_4
-319    0x7000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x4000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x5000    //TX_B_POST_FILT_6
-329    0x4000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C29    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0600    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x0139    //TX_NOISE_TH_1
-371    0x0479    //TX_NOISE_TH_2
-372    0x2328    //TX_NOISE_TH_3
-373    0x4422    //TX_NOISE_TH_4
-374    0x5586    //TX_NOISE_TH_5
-375    0x4425    //TX_NOISE_TH_5_2
-376    0x0032    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x21E8    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x4000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x4900    //TX_MIN_G_CTRL_SSNS
-409    0x1000    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x1C00    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x05A8    //TX_SB_RHO_MEAN2_TH
-441    0x0384    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0280    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0200    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x0000    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x473F    //TX_FDEQ_GAIN_4
-572    0x4245    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x564A    //TX_FDEQ_GAIN_7
-575    0x3D3A    //TX_FDEQ_GAIN_8
-576    0x3838    //TX_FDEQ_GAIN_9
-577    0x3836    //TX_FDEQ_GAIN_10
-578    0x3633    //TX_FDEQ_GAIN_11
-579    0x3838    //TX_FDEQ_GAIN_12
-580    0x4048    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0F0F    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x0611    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x7008    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0F10    //TX_PREEQ_BIN_MIC0_9
-651    0x1011    //TX_PREEQ_BIN_MIC0_10
-652    0x1112    //TX_PREEQ_BIN_MIC0_11
-653    0x1208    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4A    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x494C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4C4C    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0F10    //TX_PREEQ_BIN_MIC1_10
-701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1112    //TX_PREEQ_BIN_MIC1_12
-703    0x120B    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0005    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x199A    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x2000    //TX_B_LESSCUT_RTO_MASK
-877    0x1C00    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x203C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0480    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x1000    //RX_LMT_THRD
-37    0x7FDF    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001E    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0086    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4836    //RX_FDEQ_GAIN_0
-40    0x3636    //RX_FDEQ_GAIN_1
-41    0x364C    //RX_FDEQ_GAIN_2
-42    0x586E    //RX_FDEQ_GAIN_3
-43    0x767A    //RX_FDEQ_GAIN_4
-44    0x7978    //RX_FDEQ_GAIN_5
-45    0x7A7C    //RX_FDEQ_GAIN_6
-46    0x8280    //RX_FDEQ_GAIN_7
-47    0x848C    //RX_FDEQ_GAIN_8
-48    0x8E98    //RX_FDEQ_GAIN_9
-49    0x9E95    //RX_FDEQ_GAIN_10
-50    0x8686    //RX_FDEQ_GAIN_11
-51    0x7868    //RX_FDEQ_GAIN_12
-52    0x6050    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F0E    //RX_FDEQ_BIN_11
-75    0x100D    //RX_FDEQ_BIN_12
-76    0x110A    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0014    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x1000    //RX_LMT_THRD
-194    0x7FDF    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0035    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0057    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x008E    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0407    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x485C    //RX_FDEQ_GAIN_2
-199    0x6873    //RX_FDEQ_GAIN_3
-200    0x7F8E    //RX_FDEQ_GAIN_4
-201    0x847E    //RX_FDEQ_GAIN_5
-202    0x7E80    //RX_FDEQ_GAIN_6
-203    0x8884    //RX_FDEQ_GAIN_7
-204    0x8890    //RX_FDEQ_GAIN_8
-205    0x8E8F    //RX_FDEQ_GAIN_9
-206    0x8B77    //RX_FDEQ_GAIN_10
-207    0x6F7F    //RX_FDEQ_GAIN_11
-208    0x6568    //RX_FDEQ_GAIN_12
-209    0x6050    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-SWB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0003    //TX_SAMPLINGFREQ_SIG
-7    0x0003    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x002C    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4640    //TX_FDEQ_GAIN_4
-572    0x4446    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5448    //TX_FDEQ_GAIN_7
-575    0x4243    //TX_FDEQ_GAIN_8
-576    0x434C    //TX_FDEQ_GAIN_9
-577    0x484D    //TX_FDEQ_GAIN_10
-578    0x4D4D    //TX_FDEQ_GAIN_11
-579    0x4B4E    //TX_FDEQ_GAIN_12
-580    0x5054    //TX_FDEQ_GAIN_13
-581    0x5D68    //TX_FDEQ_GAIN_14
-582    0x7C6B    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F0F    //TX_FDEQ_BIN_9
-601    0x0E0D    //TX_FDEQ_BIN_10
-602    0x0F28    //TX_FDEQ_BIN_11
-603    0x111B    //TX_FDEQ_BIN_12
-604    0x291E    //TX_FDEQ_BIN_13
-605    0x1E10    //TX_FDEQ_BIN_14
-606    0x1810    //TX_FDEQ_BIN_15
-607    0x1021    //TX_FDEQ_BIN_16
-608    0x1000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x494A    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4B    //TX_PREEQ_GAIN_MIC1_10
-677    0x4B4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4D4C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4A48    //TX_PREEQ_GAIN_MIC1_13
-680    0x4840    //TX_PREEQ_GAIN_MIC1_14
-681    0x3434    //TX_PREEQ_GAIN_MIC1_15
-682    0x3C48    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x401E    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0050    //TX_MIC_CALIBRATION_0
-766    0x0056    //TX_MIC_CALIBRATION_1
-767    0x0050    //TX_MIC_CALIBRATION_2
-768    0x0050    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0042    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0005    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
-776    0x0000    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0002    //TX_TDDRC_THRD_0
-855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x203C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0003    //RX_SAMPLINGFREQ_SIG
-3    0x0003    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x05AA    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x13E0    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0010    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0047    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0076    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0650    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x483E    //RX_FDEQ_GAIN_0
-40    0x3E3E    //RX_FDEQ_GAIN_1
-41    0x3E4C    //RX_FDEQ_GAIN_2
-42    0x506A    //RX_FDEQ_GAIN_3
-43    0x8082    //RX_FDEQ_GAIN_4
-44    0x8982    //RX_FDEQ_GAIN_5
-45    0x8880    //RX_FDEQ_GAIN_6
-46    0x8888    //RX_FDEQ_GAIN_7
-47    0x949C    //RX_FDEQ_GAIN_8
-48    0x9AAB    //RX_FDEQ_GAIN_9
-49    0xAEA0    //RX_FDEQ_GAIN_10
-50    0x9487    //RX_FDEQ_GAIN_11
-51    0x6F64    //RX_FDEQ_GAIN_12
-52    0x625A    //RX_FDEQ_GAIN_13
-53    0x5D70    //RX_FDEQ_GAIN_14
-54    0x7C8C    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0301    //RX_FDEQ_BIN_2
-66    0x0404    //RX_FDEQ_BIN_3
-67    0x0406    //RX_FDEQ_BIN_4
-68    0x0109    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B0F    //RX_FDEQ_BIN_12
-76    0x141E    //RX_FDEQ_BIN_13
-77    0x3728    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x003C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0003    //RX_SAMPLINGFREQ_SIG
-160    0x0003    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0600    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0523    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x13E0    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0523    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001F    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0032    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0052    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0087    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x04E6    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4840    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x4050    //RX_FDEQ_GAIN_2
-199    0x5D6C    //RX_FDEQ_GAIN_3
-200    0x7B86    //RX_FDEQ_GAIN_4
-201    0x8186    //RX_FDEQ_GAIN_5
-202    0x8688    //RX_FDEQ_GAIN_6
-203    0x9097    //RX_FDEQ_GAIN_7
-204    0x929F    //RX_FDEQ_GAIN_8
-205    0x9CA0    //RX_FDEQ_GAIN_9
-206    0xA391    //RX_FDEQ_GAIN_10
-207    0x8A82    //RX_FDEQ_GAIN_11
-208    0x726E    //RX_FDEQ_GAIN_12
-209    0x704E    //RX_FDEQ_GAIN_13
-210    0x6565    //RX_FDEQ_GAIN_14
-211    0x698A    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET-TMOBILE_US-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0026    //TX_PATCH_REG
-3    0x6B7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0400    //TX_MIN_EQ_RE_EST_0
-153    0x0400    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x1000    //TX_MIN_EQ_RE_EST_4
-157    0x1000    //TX_MIN_EQ_RE_EST_5
-158    0x1000    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x1800    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
-212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0C00    //TX_RATIO_DT_L_TH_LOW
-224    0x2000    //TX_RATIO_DT_H_TH_LOW
-225    0x1800    //TX_RATIO_DT_L_TH_HIGH
-226    0x3000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0A00    //TX_RATIO_DT_L0_TH
-228    0x7000    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF600    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF800    //TX_THR_SN_EST_3
-246    0xF800    //TX_THR_SN_EST_4
-247    0xF800    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x1000    //TX_MAINREFRTOH_TH_H
-275    0x0600    //TX_MAINREFRTOH_TH_L
-276    0x2000    //TX_MAINREFRTO_TH_H
-277    0x1400    //TX_MAINREFRTO_TH_L
-278    0x0000    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0018    //TX_NS_LVL_CTRL_3
-285    0x0016    //TX_NS_LVL_CTRL_4
-286    0x0012    //TX_NS_LVL_CTRL_5
-287    0x0016    //TX_NS_LVL_CTRL_6
-288    0x0017    //TX_NS_LVL_CTRL_7
-289    0x000E    //TX_MIN_GAIN_S_0
-290    0x0007    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0012    //TX_MIN_GAIN_S_4
-294    0x0012    //TX_MIN_GAIN_S_5
-295    0x0012    //TX_MIN_GAIN_S_6
-296    0x0012    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x6000    //TX_SNRI_SUP_4
-305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x6000    //TX_SNRI_SUP_7
-308    0x6000    //TX_THR_LFNS
-309    0x0017    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x4000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x5000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x3000    //TX_B_POST_FILT_6
-329    0x3000    //TX_B_POST_FILT_7
-330    0x1000    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1D4C    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x47E0    //TX_NOISE_TH_4
-374    0x57E4    //TX_NOISE_TH_5
-375    0x4BD6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x4E20    //TX_NOISE_TH_5_4
-378    0x39DF    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x0200    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2800    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x051E    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x0001    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0300    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x2CCC    //TX_DEREVERB_LF_MU
-515    0x3200    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x7FFF    //TX_GSC_RTOL_TH
-522    0x7FFF    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0010    //TX_WIND_SUPRTO
-540    0x0014    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x3000    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
-585    0x9898    //TX_FDEQ_GAIN_18
-586    0x9848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0F03    //TX_FDEQ_BIN_0
-592    0x0909    //TX_FDEQ_BIN_1
-593    0x080F    //TX_FDEQ_BIN_2
-594    0x0609    //TX_FDEQ_BIN_3
-595    0x0F03    //TX_FDEQ_BIN_4
-596    0x1402    //TX_FDEQ_BIN_5
-597    0x0E13    //TX_FDEQ_BIN_6
-598    0x110F    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x0E0F    //TX_FDEQ_BIN_9
-601    0x080D    //TX_FDEQ_BIN_10
-602    0x0F0F    //TX_FDEQ_BIN_11
-603    0x0F0F    //TX_FDEQ_BIN_12
-604    0x0A0F    //TX_FDEQ_BIN_13
-605    0x0809    //TX_FDEQ_BIN_14
-606    0x0A0B    //TX_FDEQ_BIN_15
-607    0x0C0D    //TX_FDEQ_BIN_16
-608    0x0E0F    //TX_FDEQ_BIN_17
-609    0x1013    //TX_FDEQ_BIN_18
-610    0x0A00    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
 665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
@@ -38060,2680 +51886,10 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0030    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0FA0    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0xECCD    //TX_TFMASKLTH_BINVAD
-873    0xFCCD    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x6333    //TX_GAIN_WIND_MASK
-881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x064E    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x5800    //RX_THR_PITCH_DET_0
-14    0x5000    //RX_THR_PITCH_DET_1
-15    0x4000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000F    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1964    //RX_TPKA_FP
-127    0x0080    //RX_MIN_G_FP
-128    0x2000    //RX_MAX_G_FP
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0016    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0060    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7000    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0275    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4850    //RX_FDEQ_GAIN_1
-41    0x6478    //RX_FDEQ_GAIN_2
-42    0x8689    //RX_FDEQ_GAIN_3
-43    0x908F    //RX_FDEQ_GAIN_4
-44    0x9495    //RX_FDEQ_GAIN_5
-45    0x989D    //RX_FDEQ_GAIN_6
-46    0x9DA6    //RX_FDEQ_GAIN_7
-47    0xA895    //RX_FDEQ_GAIN_8
-48    0x8A8A    //RX_FDEQ_GAIN_9
-49    0x8E78    //RX_FDEQ_GAIN_10
-50    0x7070    //RX_FDEQ_GAIN_11
-51    0x7680    //RX_FDEQ_GAIN_12
-52    0x787C    //RX_FDEQ_GAIN_13
-53    0x8890    //RX_FDEQ_GAIN_14
-54    0x9CAC    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0202    //RX_FDEQ_BIN_1
-65    0x0302    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x002C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x064E    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x5800    //RX_THR_PITCH_DET_0
-171    0x5000    //RX_THR_PITCH_DET_1
-172    0x4000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000F    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x1964    //RX_TPKA_FP
-284    0x0080    //RX_MIN_G_FP
-285    0x2000    //RX_MAX_G_FP
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0016    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0026    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0060    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7000    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0275    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4850    //RX_FDEQ_GAIN_1
-198    0x6478    //RX_FDEQ_GAIN_2
-199    0x8689    //RX_FDEQ_GAIN_3
-200    0x908F    //RX_FDEQ_GAIN_4
-201    0x9495    //RX_FDEQ_GAIN_5
-202    0x989D    //RX_FDEQ_GAIN_6
-203    0x9DA6    //RX_FDEQ_GAIN_7
-204    0xA895    //RX_FDEQ_GAIN_8
-205    0x8A8A    //RX_FDEQ_GAIN_9
-206    0x8E78    //RX_FDEQ_GAIN_10
-207    0x7070    //RX_FDEQ_GAIN_11
-208    0x7680    //RX_FDEQ_GAIN_12
-209    0x787C    //RX_FDEQ_GAIN_13
-210    0x8890    //RX_FDEQ_GAIN_14
-211    0x9CAC    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0202    //RX_FDEQ_BIN_1
-222    0x0302    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0000    //TX_OPERATION_MODE_0
-1    0x0000    //TX_OPERATION_MODE_1
-2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0AAC    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0800    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6000    //TX_EAD_THR
-151    0x2000    //TX_THR_RE_EST
-152    0x0100    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0100    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x0200    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x0400    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x1000    //TX_LAMBDA_CB_NLE
-167    0x0400    //TX_C_POST_FLT
-168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
-170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7B00    //TX_DTD_THR1_0
-198    0x7B00    //TX_DTD_THR1_1
-199    0x7B00    //TX_DTD_THR1_2
-200    0x7B00    //TX_DTD_THR1_3
-201    0x7B00    //TX_DTD_THR1_4
-202    0x7B00    //TX_DTD_THR1_5
-203    0x7B00    //TX_DTD_THR1_6
-204    0x1000    //TX_DTD_THR2_0
-205    0x1000    //TX_DTD_THR2_1
-206    0x1000    //TX_DTD_THR2_2
-207    0x1000    //TX_DTD_THR2_3
-208    0x1000    //TX_DTD_THR2_4
-209    0x1000    //TX_DTD_THR2_5
-210    0x1000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0FA0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0000    //TX_RATIO_DT_L_TH_LOW
-224    0x0000    //TX_RATIO_DT_H_TH_LOW
-225    0x0000    //TX_RATIO_DT_L_TH_HIGH
-226    0x0000    //TX_RATIO_DT_H_TH_HIGH
-227    0x0000    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x0000    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xF800    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
-246    0xF900    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF700    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x01A0    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x01A0    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x3000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x3000    //TX_LAMBDA_NN_EST_3
-262    0x3000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x0000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x3000    //TX_NE_RTO_TH
-273    0x1000    //TX_NE_RTO_TH_L
-274    0x3000    //TX_MAINREFRTOH_TH_H
-275    0x1000    //TX_MAINREFRTOH_TH_L
-276    0x3000    //TX_MAINREFRTO_TH_H
-277    0x1000    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x4000    //TX_B_POST_FLT_0
-280    0x4000    //TX_B_POST_FLT_1
-281    0x0014    //TX_NS_LVL_CTRL_0
-282    0x0019    //TX_NS_LVL_CTRL_1
-283    0x0017    //TX_NS_LVL_CTRL_2
-284    0x0017    //TX_NS_LVL_CTRL_3
-285    0x0019    //TX_NS_LVL_CTRL_4
-286    0x0014    //TX_NS_LVL_CTRL_5
-287    0x001B    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x0010    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x0014    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x0014    //TX_MIN_GAIN_S_7
-297    0x5000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x4000    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x3000    //TX_SNRI_SUP_7
-308    0x3000    //TX_THR_LFNS
-309    0x001A    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x2000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x2000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x2000    //TX_A_POST_FILT_S_5
-320    0x7000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x4000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x5000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x4000    //TX_B_POST_FILT_5
-328    0x4000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x1000    //TX_B_LESSCUT_RTO_S_1
-332    0x1000    //TX_B_LESSCUT_RTO_S_2
-333    0x1000    //TX_B_LESSCUT_RTO_S_3
-334    0x1000    //TX_B_LESSCUT_RTO_S_4
-335    0x1000    //TX_B_LESSCUT_RTO_S_5
-336    0x1000    //TX_B_LESSCUT_RTO_S_6
-337    0x1000    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7200    //TX_LAMBDA_PFILT_S_1
-341    0x7900    //TX_LAMBDA_PFILT_S_2
-342    0x7400    //TX_LAMBDA_PFILT_S_3
-343    0x7200    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x0C80    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0000    //TX_DT_BINVAD_ENDF
-358    0x1000    //TX_C_POST_FLT_DT
-359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0004    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x0320    //TX_NOISE_TH_1
-371    0x022C    //TX_NOISE_TH_2
-372    0x2710    //TX_NOISE_TH_3
-373    0x6B6C    //TX_NOISE_TH_4
-374    0x7FFF    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x07D0    //TX_NOISE_TH_6
-379    0x0004    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x6D60    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x3000    //TX_POST_MASK_SUP_HSNE
-392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x000A    //TX_NS_ENOISE_MIC0_TH
-406    0x0004    //TX_MINENOISE_MIC0_TH
-407    0x0014    //TX_MINENOISE_MIC0_S_TH
-408    0x4900    //TX_MIN_G_CTRL_SSNS
-409    0x0400    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x2328    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x03E8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x4000    //TX_BF_RESET_THR_HS
-424    0x0CCD    //TX_SB_RTO_MEAN_TH
-425    0x0280    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0990    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0100    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0640    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x7FFF    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x001A    //TX_WNS_MIN_G
-541    0x0600    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0080    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0018    //TX_FDEQ_SUBNUM
-567    0x6C60    //TX_FDEQ_GAIN_0
-568    0x584F    //TX_FDEQ_GAIN_1
-569    0x4F4E    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4737    //TX_FDEQ_GAIN_4
-572    0x3A40    //TX_FDEQ_GAIN_5
-573    0x4040    //TX_FDEQ_GAIN_6
-574    0x3631    //TX_FDEQ_GAIN_7
-575    0x2020    //TX_FDEQ_GAIN_8
-576    0x383C    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0104    //TX_FDEQ_BIN_1
-593    0x0502    //TX_FDEQ_BIN_2
-594    0x0202    //TX_FDEQ_BIN_3
-595    0x0504    //TX_FDEQ_BIN_4
-596    0x0708    //TX_FDEQ_BIN_5
-597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0F09    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0014    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4849    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
+672    0x4A4A    //TX_PREEQ_GAIN_MIC1_6
+673    0x4B4B    //TX_PREEQ_GAIN_MIC1_7
+674    0x4D4E    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -40833,8 +51989,8 @@
 772    0x0044    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0007    //TX_GAIN_LIMIT_3
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -40874,19 +52030,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -40914,17 +52070,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0000    //TX_TDDRC_THRD_0
 855    0x0010    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
+866    0x05A0    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -40955,71 +52111,97 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x01F4    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7F58    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00B0    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x7F80    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -41046,8 +52228,8 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -41202,18 +52384,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41236,8 +52418,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41301,18 +52483,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41335,8 +52517,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41400,18 +52582,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41434,8 +52616,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41499,18 +52681,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41533,8 +52715,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41598,18 +52780,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41632,8 +52814,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41697,18 +52879,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41731,8 +52913,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41796,18 +52978,18 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0360    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0016    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+43    0x4C4C    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
 47    0x5C5C    //RX_FDEQ_GAIN_8
 48    0x5C5C    //RX_FDEQ_GAIN_9
-49    0x5C5C    //RX_FDEQ_GAIN_10
+49    0x4848    //RX_FDEQ_GAIN_10
 50    0x5C48    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
 52    0x4848    //RX_FDEQ_GAIN_13
@@ -41830,8 +53012,8 @@
 69    0x0303    //RX_FDEQ_BIN_6
 70    0x0303    //RX_FDEQ_BIN_7
 71    0x0A0A    //RX_FDEQ_BIN_8
-72    0x0A0E    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
+72    0x0A1A    //RX_FDEQ_BIN_9
+73    0x0612    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
 76    0x0000    //RX_FDEQ_BIN_13
@@ -41897,8 +53079,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -42724,15 +53906,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0036    //TX_PATCH_REG
-3    0x2F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -42749,7 +53930,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -42758,9 +53939,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -42866,11 +54047,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -42897,9 +54078,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x0400    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -42925,11 +54106,11 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
+197    0x7148    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x7FC6    //TX_DTD_THR1_2
 200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
+201    0x7FFF    //TX_DTD_THR1_4
 202    0x7F00    //TX_DTD_THR1_5
 203    0x7F00    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
@@ -43096,8 +54277,8 @@
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
 367    0x000A    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0139    //TX_NOISE_TH_1
 371    0x0479    //TX_NOISE_TH_2
 372    0x2328    //TX_NOISE_TH_3
@@ -43124,8 +54305,8 @@
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
-396    0x4000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+396    0x0500    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -43237,7 +54418,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -43252,10 +54433,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x0000    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -43273,26 +54454,26 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
 567    0x5C54    //TX_FDEQ_GAIN_0
@@ -43369,19 +54550,19 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x7008    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0F10    //TX_PREEQ_BIN_MIC0_9
-651    0x1011    //TX_PREEQ_BIN_MIC0_10
-652    0x1112    //TX_PREEQ_BIN_MIC0_11
-653    0x1208    //TX_PREEQ_BIN_MIC0_12
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x0700    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
 654    0x0000    //TX_PREEQ_BIN_MIC0_13
 655    0x0000    //TX_PREEQ_BIN_MIC0_14
 656    0x0000    //TX_PREEQ_BIN_MIC0_15
@@ -43393,7 +54574,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -43401,13 +54582,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4A    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x494C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4C4C    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -43430,8 +54611,8 @@
 699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
 700    0x0F10    //TX_PREEQ_BIN_MIC1_10
 701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1112    //TX_PREEQ_BIN_MIC1_12
-703    0x120B    //TX_PREEQ_BIN_MIC1_13
+702    0x1104    //TX_PREEQ_BIN_MIC1_12
+703    0x101B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -43503,8 +54684,8 @@
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x0000    //TX_GAIN_LIMIT_1
-775    0x0006    //TX_GAIN_LIMIT_2
-776    0x0005    //TX_GAIN_LIMIT_3
+775    0x0002    //TX_GAIN_LIMIT_2
+776    0x0002    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -43544,19 +54725,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -43584,17 +54765,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x054F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -43625,71 +54806,97 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0298    //TX_MICMUTE_RATIO_THR
+900    0x02D8    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7FC4    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x00AA    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0xFFFF    //TX_TFMASKM4_2_DT_THR
+945    0x7530    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -43716,8 +54923,8 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -43872,12 +55079,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -43971,12 +55178,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -44070,12 +55277,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -44169,12 +55376,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -44268,12 +55475,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -44367,12 +55574,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -44466,12 +55673,12 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x0400    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x001D    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
-42    0x4A4C    //RX_FDEQ_GAIN_3
-43    0x4E50    //RX_FDEQ_GAIN_4
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4A50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
 45    0x5658    //RX_FDEQ_GAIN_6
 46    0x5A5C    //RX_FDEQ_GAIN_7
@@ -44567,8 +55774,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -45394,15 +56601,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0000    //TX_OPERATION_MODE_0
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0076    //TX_PATCH_REG
-3    0x6F7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -45419,7 +56625,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0000    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -45428,9 +56634,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -45526,7 +56732,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
+128    0x7D83    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x1800    //TX_THR_PITCH_DET_0
 131    0x1000    //TX_THR_PITCH_DET_1
@@ -45536,11 +56742,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -45548,7 +56754,7 @@
 147    0x0080    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7900    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x2000    //TX_THR_RE_EST
 152    0x0400    //TX_MIN_EQ_RE_EST_0
 153    0x0400    //TX_MIN_EQ_RE_EST_1
@@ -45567,9 +56773,9 @@
 166    0x1000    //TX_LAMBDA_CB_NLE
 167    0x1800    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x003C    //TX_SE_HOLD_N
+169    0x01C0    //TX_SE_HOLD_N
 170    0x0046    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -45595,13 +56801,13 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7000    //TX_DTD_THR1_2
-200    0x7F00    //TX_DTD_THR1_3
-201    0x7F00    //TX_DTD_THR1_4
-202    0x7F00    //TX_DTD_THR1_5
-203    0x7F00    //TX_DTD_THR1_6
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
 204    0x2000    //TX_DTD_THR2_0
 205    0x2000    //TX_DTD_THR2_1
 206    0x2000    //TX_DTD_THR2_2
@@ -45609,9 +56815,9 @@
 208    0x1000    //TX_DTD_THR2_4
 209    0x1000    //TX_DTD_THR2_5
 210    0x1000    //TX_DTD_THR2_6
-211    0x6000    //TX_DTD_THR3
+211    0x7FD0    //TX_DTD_THR3
 212    0x0177    //TX_SPK_CUT_K
-213    0x1B58    //TX_DT_CUT_K
+213    0x3A98    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -45698,13 +56904,13 @@
 297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
-302    0x6000    //TX_SNRI_SUP_2
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x6000    //TX_SNRI_SUP_4
 305    0x6000    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x6000    //TX_SNRI_SUP_7
 308    0x6000    //TX_THR_LFNS
 309    0x0017    //TX_G_LFNS
@@ -45721,9 +56927,9 @@
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x3000    //TX_B_POST_FILT_6
@@ -45745,7 +56951,7 @@
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
 345    0x7C29    //TX_LAMBDA_PFILT_S_6
 346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x07D0    //TX_K_PEPPER
+347    0x01F4    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1D4C    //TX_K_PEPPER_HF
 350    0x0400    //TX_A_PEPPER_HF
@@ -45768,16 +56974,16 @@
 367    0x000A    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x00C6    //TX_NOISE_TH_1
+370    0x01F4    //TX_NOISE_TH_1
 371    0x0DAC    //TX_NOISE_TH_2
-372    0x2260    //TX_NOISE_TH_3
-373    0x7080    //TX_NOISE_TH_4
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
 374    0x57E4    //TX_NOISE_TH_5
 375    0x4BD6    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x4E20    //TX_NOISE_TH_5_4
 378    0x1194    //TX_NOISE_TH_6
-379    0x0014    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x6D60    //TX_RATIODTL_CUT_TH
@@ -45791,11 +56997,11 @@
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x3000    //TX_POST_MASK_SUP_HSNE
 392    0x07D0    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -45804,11 +57010,11 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0014    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x0FA0    //TX_NS_FP_K_METAL
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -45838,8 +57044,8 @@
 437    0x0032    //TX_SILENCE_T
 438    0x0000    //TX_A_POST_FLT_WTA
 439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x051E    //TX_SB_RHO_MEAN2_TH
-441    0x02F0    //TX_SB_RHO_MEAN3_TH
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
 442    0x0000    //TX_HS_RESRV_4
 443    0x0000    //TX_HS_RESRV_5
 444    0x0001    //TX_DOA_VAD_THR_1
@@ -45907,7 +57113,7 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
@@ -45922,10 +57128,10 @@
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -45943,45 +57149,45 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x5C54    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
-569    0x4C4C    //TX_FDEQ_GAIN_2
-570    0x474A    //TX_FDEQ_GAIN_3
-571    0x4640    //TX_FDEQ_GAIN_4
-572    0x4446    //TX_FDEQ_GAIN_5
-573    0x4B53    //TX_FDEQ_GAIN_6
-574    0x5448    //TX_FDEQ_GAIN_7
-575    0x4243    //TX_FDEQ_GAIN_8
-576    0x434C    //TX_FDEQ_GAIN_9
-577    0x484D    //TX_FDEQ_GAIN_10
-578    0x4D4D    //TX_FDEQ_GAIN_11
-579    0x4B4E    //TX_FDEQ_GAIN_12
-580    0x5054    //TX_FDEQ_GAIN_13
-581    0x5D68    //TX_FDEQ_GAIN_14
-582    0x7C6B    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
 586    0x4848    //TX_FDEQ_GAIN_19
@@ -45996,8 +57202,8 @@
 595    0x0504    //TX_FDEQ_BIN_4
 596    0x0708    //TX_FDEQ_BIN_5
 597    0x0808    //TX_FDEQ_BIN_6
-598    0x050E    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
 600    0x0F0F    //TX_FDEQ_BIN_9
 601    0x0E0D    //TX_FDEQ_BIN_10
 602    0x0F28    //TX_FDEQ_BIN_11
@@ -46039,22 +57245,22 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
 657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
@@ -46063,7 +57269,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -46071,16 +57277,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x494A    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4B    //TX_PREEQ_GAIN_MIC1_10
-677    0x4B4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4D4C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4A48    //TX_PREEQ_GAIN_MIC1_13
-680    0x4840    //TX_PREEQ_GAIN_MIC1_14
-681    0x3434    //TX_PREEQ_GAIN_MIC1_15
-682    0x3C48    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -46172,7 +57378,7 @@
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
-774    0x0005    //TX_GAIN_LIMIT_1
+774    0x0002    //TX_GAIN_LIMIT_1
 775    0x0000    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -46214,19 +57420,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -46254,17 +57460,17 @@
 853    0x0002    //TX_FILTINDX
 854    0x0002    //TX_TDDRC_THRD_0
 855    0x0003    //TX_TDDRC_THRD_1
-856    0x1500    //TX_TDDRC_THRD_2
-857    0x1500    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
 860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0504    //TX_TDDRC_DRC_GAIN
+866    0x054F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -46287,7 +57493,7 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
 891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
@@ -46295,71 +57501,97 @@
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -46386,8 +57618,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -46542,10 +57774,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -46641,10 +57873,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -46740,10 +57972,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -46839,10 +58071,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -46938,10 +58170,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -47037,10 +58269,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -47136,10 +58368,10 @@
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x01E0    //RX_TDDRC_DRC_GAIN
-38    0x0030    //RX_FDEQ_SUBNUM
+38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
 40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4844    //RX_FDEQ_GAIN_2
+41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4B4D    //RX_FDEQ_GAIN_3
 43    0x4E50    //RX_FDEQ_GAIN_4
 44    0x5254    //RX_FDEQ_GAIN_5
@@ -47237,8 +58469,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -48064,7 +59296,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HANDSET-HANDSET_HAC-TMOBILE_US-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -48072,7 +59303,7 @@
 1    0x0000    //TX_OPERATION_MODE_1
 2    0x0026    //TX_PATCH_REG
 3    0x6B7E    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+4    0x0004    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
@@ -48098,9 +59329,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -48206,11 +59437,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -48465,7 +59696,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -48592,10 +59823,10 @@
 521    0x7FFF    //TX_GSC_RTOL_TH
 522    0x7FFF    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -48613,46 +59844,46 @@
 542    0x3000    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0200    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0030    //TX_FDEQ_SUBNUM
-567    0x504A    //TX_FDEQ_GAIN_0
-568    0x4C54    //TX_FDEQ_GAIN_1
-569    0x554B    //TX_FDEQ_GAIN_2
-570    0x4D4E    //TX_FDEQ_GAIN_3
-571    0x4F4F    //TX_FDEQ_GAIN_4
-572    0x4E51    //TX_FDEQ_GAIN_5
-573    0x5154    //TX_FDEQ_GAIN_6
-574    0x5456    //TX_FDEQ_GAIN_7
-575    0x5E66    //TX_FDEQ_GAIN_8
-576    0x675D    //TX_FDEQ_GAIN_9
-577    0x5655    //TX_FDEQ_GAIN_10
-578    0x5956    //TX_FDEQ_GAIN_11
-579    0x5656    //TX_FDEQ_GAIN_12
-580    0x5953    //TX_FDEQ_GAIN_13
-581    0x575A    //TX_FDEQ_GAIN_14
-582    0x5559    //TX_FDEQ_GAIN_15
-583    0x656E    //TX_FDEQ_GAIN_16
-584    0x7B98    //TX_FDEQ_GAIN_17
+567    0x4C4A    //TX_FDEQ_GAIN_0
+568    0x4B4F    //TX_FDEQ_GAIN_1
+569    0x504B    //TX_FDEQ_GAIN_2
+570    0x4A4C    //TX_FDEQ_GAIN_3
+571    0x4A49    //TX_FDEQ_GAIN_4
+572    0x4F48    //TX_FDEQ_GAIN_5
+573    0x4A4E    //TX_FDEQ_GAIN_6
+574    0x534E    //TX_FDEQ_GAIN_7
+575    0x494F    //TX_FDEQ_GAIN_8
+576    0x5E6E    //TX_FDEQ_GAIN_9
+577    0x787A    //TX_FDEQ_GAIN_10
+578    0x6A58    //TX_FDEQ_GAIN_11
+579    0x5051    //TX_FDEQ_GAIN_12
+580    0x5156    //TX_FDEQ_GAIN_13
+581    0x6168    //TX_FDEQ_GAIN_14
+582    0x7678    //TX_FDEQ_GAIN_15
+583    0x7A87    //TX_FDEQ_GAIN_16
+584    0x9898    //TX_FDEQ_GAIN_17
 585    0x9898    //TX_FDEQ_GAIN_18
 586    0x9848    //TX_FDEQ_GAIN_19
 587    0x4848    //TX_FDEQ_GAIN_20
@@ -48691,15 +59922,15 @@
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4846    //TX_PREEQ_GAIN_MIC0_6
-624    0x4645    //TX_PREEQ_GAIN_MIC0_7
-625    0x4545    //TX_PREEQ_GAIN_MIC0_8
-626    0x4545    //TX_PREEQ_GAIN_MIC0_9
-627    0x4444    //TX_PREEQ_GAIN_MIC0_10
-628    0x4443    //TX_PREEQ_GAIN_MIC0_11
-629    0x4241    //TX_PREEQ_GAIN_MIC0_12
-630    0x3C3E    //TX_PREEQ_GAIN_MIC0_13
-631    0x3E40    //TX_PREEQ_GAIN_MIC0_14
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
@@ -48709,23 +59940,23 @@
 638    0x4848    //TX_PREEQ_GAIN_MIC0_21
 639    0x4848    //TX_PREEQ_GAIN_MIC0_22
 640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
+641    0x1812    //TX_PREEQ_BIN_MIC0_0
+642    0x0A0A    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x080A    //TX_PREEQ_BIN_MIC0_3
+645    0x0B09    //TX_PREEQ_BIN_MIC0_4
+646    0x0A06    //TX_PREEQ_BIN_MIC0_5
+647    0x0606    //TX_PREEQ_BIN_MIC0_6
+648    0x0605    //TX_PREEQ_BIN_MIC0_7
+649    0x050A    //TX_PREEQ_BIN_MIC0_8
+650    0x1505    //TX_PREEQ_BIN_MIC0_9
+651    0x0506    //TX_PREEQ_BIN_MIC0_10
+652    0x0615    //TX_PREEQ_BIN_MIC0_11
+653    0x1516    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x2021    //TX_PREEQ_BIN_MIC0_14
+656    0x2021    //TX_PREEQ_BIN_MIC0_15
+657    0x0800    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -48740,17 +59971,17 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4849    //TX_PREEQ_GAIN_MIC1_6
-673    0x4A4B    //TX_PREEQ_GAIN_MIC1_7
-674    0x4C4B    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A48    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4C    //TX_PREEQ_GAIN_MIC1_10
-677    0x4C4B    //TX_PREEQ_GAIN_MIC1_11
-678    0x4838    //TX_PREEQ_GAIN_MIC1_12
-679    0x3858    //TX_PREEQ_GAIN_MIC1_13
-680    0x7060    //TX_PREEQ_GAIN_MIC1_14
-681    0x9870    //TX_PREEQ_GAIN_MIC1_15
-682    0x5848    //TX_PREEQ_GAIN_MIC1_16
+672    0x4A4C    //TX_PREEQ_GAIN_MIC1_6
+673    0x4E50    //TX_PREEQ_GAIN_MIC1_7
+674    0x5456    //TX_PREEQ_GAIN_MIC1_8
+675    0x585C    //TX_PREEQ_GAIN_MIC1_9
+676    0x5C64    //TX_PREEQ_GAIN_MIC1_10
+677    0x7478    //TX_PREEQ_GAIN_MIC1_11
+678    0x705C    //TX_PREEQ_GAIN_MIC1_12
+679    0x4838    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C70    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -48764,17 +59995,17 @@
 693    0x0304    //TX_PREEQ_BIN_MIC1_3
 694    0x0405    //TX_PREEQ_BIN_MIC1_4
 695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x0909    //TX_PREEQ_BIN_MIC1_7
+698    0x090B    //TX_PREEQ_BIN_MIC1_8
 699    0x0C10    //TX_PREEQ_BIN_MIC1_9
 700    0x1013    //TX_PREEQ_BIN_MIC1_10
 701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
+702    0x1414    //TX_PREEQ_BIN_MIC1_12
+703    0x1C1E    //TX_PREEQ_BIN_MIC1_13
+704    0x1E28    //TX_PREEQ_BIN_MIC1_14
+705    0x462C    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -48807,23 +60038,23 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0809    //TX_PREEQ_BIN_MIC2_7
-747    0x0A0A    //TX_PREEQ_BIN_MIC2_8
-748    0x0C10    //TX_PREEQ_BIN_MIC2_9
-749    0x1013    //TX_PREEQ_BIN_MIC2_10
-750    0x1414    //TX_PREEQ_BIN_MIC2_11
-751    0x261E    //TX_PREEQ_BIN_MIC2_12
-752    0x1E14    //TX_PREEQ_BIN_MIC2_13
-753    0x1414    //TX_PREEQ_BIN_MIC2_14
-754    0x2814    //TX_PREEQ_BIN_MIC2_15
-755    0x4000    //TX_PREEQ_BIN_MIC2_16
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
 758    0x0000    //TX_PREEQ_BIN_MIC2_19
@@ -48891,12 +60122,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -48934,7 +60165,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05F5    //TX_TDDRC_DRC_GAIN
+866    0x0504    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -48974,7 +60205,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -49001,35 +60232,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x000C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -49056,8 +60313,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -49907,8 +61164,2703 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7000    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01E0    //RX_TDDRC_DRC_GAIN
+195    0x0030    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4844    //RX_FDEQ_GAIN_2
+199    0x4B4D    //RX_FDEQ_GAIN_3
+200    0x4E50    //RX_FDEQ_GAIN_4
+201    0x5254    //RX_FDEQ_GAIN_5
+202    0x5658    //RX_FDEQ_GAIN_6
+203    0x5C60    //RX_FDEQ_GAIN_7
+204    0x6468    //RX_FDEQ_GAIN_8
+205    0x6C70    //RX_FDEQ_GAIN_9
+206    0x7474    //RX_FDEQ_GAIN_10
+207    0x7474    //RX_FDEQ_GAIN_11
+208    0x7474    //RX_FDEQ_GAIN_12
+209    0x7474    //RX_FDEQ_GAIN_13
+210    0x7474    //RX_FDEQ_GAIN_14
+211    0x7474    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0402    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1E1E    //RX_FDEQ_BIN_11
+232    0x1E1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E1E    //RX_FDEQ_BIN_14
+235    0x202C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSET-HANDSET_HAC-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0000    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0076    //TX_PATCH_REG
+3    0x6F7F    //TX_SENDFUNC_MODE_0
+4    0x0004    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0AAC    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x2000    //TX_THR_RE_EST
+152    0x0400    //TX_MIN_EQ_RE_EST_0
+153    0x0400    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x1000    //TX_MIN_EQ_RE_EST_4
+157    0x1000    //TX_MIN_EQ_RE_EST_5
+158    0x1000    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x1000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x1000    //TX_LAMBDA_CB_NLE
+167    0x1800    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x01C0    //TX_SE_HOLD_N
+170    0x0046    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7E90    //TX_DTD_THR1_0
+198    0x7F58    //TX_DTD_THR1_1
+199    0x7EF4    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x1000    //TX_DTD_THR2_3
+208    0x1000    //TX_DTD_THR2_4
+209    0x1000    //TX_DTD_THR2_5
+210    0x1000    //TX_DTD_THR2_6
+211    0x7FD0    //TX_DTD_THR3
+212    0x0177    //TX_SPK_CUT_K
+213    0x3A98    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0C00    //TX_RATIO_DT_L_TH_LOW
+224    0x2000    //TX_RATIO_DT_H_TH_LOW
+225    0x1800    //TX_RATIO_DT_L_TH_HIGH
+226    0x3000    //TX_RATIO_DT_H_TH_HIGH
+227    0x0A00    //TX_RATIO_DT_L0_TH
+228    0x7000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF600    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF800    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF700    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x0600    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0000    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0014    //TX_NS_LVL_CTRL_0
+282    0x002C    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x0016    //TX_NS_LVL_CTRL_4
+286    0x0012    //TX_NS_LVL_CTRL_5
+287    0x0016    //TX_NS_LVL_CTRL_6
+288    0x0017    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x0012    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0012    //TX_MIN_GAIN_S_4
+294    0x0012    //TX_MIN_GAIN_S_5
+295    0x0012    //TX_MIN_GAIN_S_6
+296    0x0012    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x1400    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x2000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x6000    //TX_SNRI_SUP_4
+305    0x6000    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x6000    //TX_SNRI_SUP_7
+308    0x6000    //TX_THR_LFNS
+309    0x0017    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x5000    //TX_B_POST_FILT_1
+324    0x6000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x3000    //TX_B_POST_FILT_6
+329    0x3000    //TX_B_POST_FILT_7
+330    0x1000    //TX_B_LESSCUT_RTO_S_0
+331    0x1000    //TX_B_LESSCUT_RTO_S_1
+332    0x1000    //TX_B_LESSCUT_RTO_S_2
+333    0x1000    //TX_B_LESSCUT_RTO_S_3
+334    0x1000    //TX_B_LESSCUT_RTO_S_4
+335    0x1000    //TX_B_LESSCUT_RTO_S_5
+336    0x1000    //TX_B_LESSCUT_RTO_S_6
+337    0x1000    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1D4C    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x7FFF    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x000A    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x01F4    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x2134    //TX_NOISE_TH_3
+373    0x6978    //TX_NOISE_TH_4
+374    0x57E4    //TX_NOISE_TH_5
+375    0x4BD6    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x4E20    //TX_NOISE_TH_5_4
+378    0x1194    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x6D60    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x0200    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x3000    //TX_POST_MASK_SUP_HSNE
+392    0x07D0    //TX_TAIL_DET_TH
+393    0x7FFF    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x2328    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x03E8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2800    //TX_BF_RESET_THR_HS
+424    0x0CCD    //TX_SB_RTO_MEAN_TH
+425    0x0300    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x2000    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0990    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0100    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x03E8    //TX_SB_RHO_MEAN2_TH
+441    0x03E8    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x0001    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x001E    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0300    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x2CCC    //TX_DEREVERB_LF_MU
+515    0x3200    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x7FFF    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0010    //TX_WIND_SUPRTO
+540    0x0014    //TX_WNS_MIN_G
+541    0x0600    //TX_WNS_B_POST_FLT
+542    0x3000    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0200    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0030    //TX_FDEQ_SUBNUM
+567    0x5C50    //TX_FDEQ_GAIN_0
+568    0x4A47    //TX_FDEQ_GAIN_1
+569    0x4847    //TX_FDEQ_GAIN_2
+570    0x4448    //TX_FDEQ_GAIN_3
+571    0x4244    //TX_FDEQ_GAIN_4
+572    0x444C    //TX_FDEQ_GAIN_5
+573    0x5455    //TX_FDEQ_GAIN_6
+574    0x5044    //TX_FDEQ_GAIN_7
+575    0x5048    //TX_FDEQ_GAIN_8
+576    0x4850    //TX_FDEQ_GAIN_9
+577    0x4A49    //TX_FDEQ_GAIN_10
+578    0x4642    //TX_FDEQ_GAIN_11
+579    0x3E32    //TX_FDEQ_GAIN_12
+580    0x3C34    //TX_FDEQ_GAIN_13
+581    0x385C    //TX_FDEQ_GAIN_14
+582    0x546C    //TX_FDEQ_GAIN_15
+583    0x4050    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0104    //TX_FDEQ_BIN_1
+593    0x0502    //TX_FDEQ_BIN_2
+594    0x0202    //TX_FDEQ_BIN_3
+595    0x0504    //TX_FDEQ_BIN_4
+596    0x0708    //TX_FDEQ_BIN_5
+597    0x0808    //TX_FDEQ_BIN_6
+598    0x0C06    //TX_FDEQ_BIN_7
+599    0x0C0C    //TX_FDEQ_BIN_8
+600    0x0F0F    //TX_FDEQ_BIN_9
+601    0x0E0D    //TX_FDEQ_BIN_10
+602    0x0F28    //TX_FDEQ_BIN_11
+603    0x111B    //TX_FDEQ_BIN_12
+604    0x291E    //TX_FDEQ_BIN_13
+605    0x1E10    //TX_FDEQ_BIN_14
+606    0x1810    //TX_FDEQ_BIN_15
+607    0x1021    //TX_FDEQ_BIN_16
+608    0x1000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x251A    //TX_PREEQ_BIN_MIC0_0
+642    0x0F0F    //TX_PREEQ_BIN_MIC0_1
+643    0x0C0C    //TX_PREEQ_BIN_MIC0_2
+644    0x0C0F    //TX_PREEQ_BIN_MIC0_3
+645    0x0F0F    //TX_PREEQ_BIN_MIC0_4
+646    0x0F09    //TX_PREEQ_BIN_MIC0_5
+647    0x0909    //TX_PREEQ_BIN_MIC0_6
+648    0x0908    //TX_PREEQ_BIN_MIC0_7
+649    0x070F    //TX_PREEQ_BIN_MIC0_8
+650    0x1F08    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0920    //TX_PREEQ_BIN_MIC0_11
+653    0x2020    //TX_PREEQ_BIN_MIC0_12
+654    0x2021    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0030    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0056    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0042    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0FA0    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0002    //TX_TDDRC_THRD_0
+855    0x0003    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x054F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0xECCD    //TX_TFMASKLTH_BINVAD
+873    0xFCCD    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x2000    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x6333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x0810    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x6329    //TX_SENDFUNC_REG_MICMUTE
+898    0x0010    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0250    //TX_MICMUTE_RATIO_THR
+900    0x02E0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0CD0    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x0028    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7800    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7E2C    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDA    //TX_DTD_THR1_MICMUTE_1
+913    0x7FBC    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x7FFF    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0040    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x3E80    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x05A0    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C8C    //TX_TFMASKM4_2_DT_THR
+945    0x7FFF    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0014    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0014    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x000C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x5800    //RX_THR_PITCH_DET_0
+14    0x5000    //RX_THR_PITCH_DET_1
+15    0x4000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0030    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4844    //RX_FDEQ_GAIN_2
+42    0x4B4D    //RX_FDEQ_GAIN_3
+43    0x4E50    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x6C70    //RX_FDEQ_GAIN_9
+49    0x7474    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7000    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01E0    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4A48    //RX_FDEQ_GAIN_3
+43    0x4048    //RX_FDEQ_GAIN_4
+44    0x5254    //RX_FDEQ_GAIN_5
+45    0x5658    //RX_FDEQ_GAIN_6
+46    0x5C60    //RX_FDEQ_GAIN_7
+47    0x6468    //RX_FDEQ_GAIN_8
+48    0x7878    //RX_FDEQ_GAIN_9
+49    0x7878    //RX_FDEQ_GAIN_10
+50    0x7474    //RX_FDEQ_GAIN_11
+51    0x7474    //RX_FDEQ_GAIN_12
+52    0x7474    //RX_FDEQ_GAIN_13
+53    0x7474    //RX_FDEQ_GAIN_14
+54    0x7474    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0402    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1E1E    //RX_FDEQ_BIN_11
+75    0x1E1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E1E    //RX_FDEQ_BIN_14
+78    0x202C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x000C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x5800    //RX_THR_PITCH_DET_0
+171    0x5000    //RX_THR_PITCH_DET_1
+172    0x4000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
diff --git a/audio/tegu/tuning/fortemedia/HANDSFREE.dat b/audio/tegu/tuning/fortemedia/HANDSFREE.dat
index 91b4af9..ecc915f 100644
Binary files a/audio/tegu/tuning/fortemedia/HANDSFREE.dat and b/audio/tegu/tuning/fortemedia/HANDSFREE.dat differ
diff --git a/audio/tegu/tuning/fortemedia/HANDSFREE.mods b/audio/tegu/tuning/fortemedia/HANDSFREE.mods
index acf77bd..26e767d 100644
--- a/audio/tegu/tuning/fortemedia/HANDSFREE.mods
+++ b/audio/tegu/tuning/fortemedia/HANDSFREE.mods
@@ -1,19 +1,8105 @@
 #PLATFORM_NAME  gChip
+#SINGLE_API_VER  1.4.2
 #EXPORT_FLAG  HANDSFREE
-#SINGLE_API_VER  1.2.0
-#SAVE_TIME  2022-02-10 16:25:23
+#PARAM_MODE   FULL
+#SAVE_MODE  3
+#SAVE_TIME  2024-02-22 17:40:36
 
-#CASE_NAME  HANDSFREE-HANDFREE-RESERVE1-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0100    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7B00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x2000    //TX_MIN_EQ_RE_EST_3
+156    0x2000    //TX_MIN_EQ_RE_EST_4
+157    0x2000    //TX_MIN_EQ_RE_EST_5
+158    0x2000    //TX_MIN_EQ_RE_EST_6
+159    0x2000    //TX_MIN_EQ_RE_EST_7
+160    0x2000    //TX_MIN_EQ_RE_EST_8
+161    0x3000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x6000    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x6000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0008    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FEE    //TX_DTD_THR1_0
+198    0x7FEE    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7EF4    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0100    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x1000    //TX_ADPT_STRICT_L
+222    0x1000    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x157C    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x1000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0BB8    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0050    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0080    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x01A0    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x0018    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x7F00    //TX_LAMBDA_EQ_BF
+272    0x0800    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0800    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0020    //TX_NS_LVL_CTRL_1
+283    0x0015    //TX_NS_LVL_CTRL_2
+284    0x0012    //TX_NS_LVL_CTRL_3
+285    0x0012    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0012    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0004    //TX_MIN_GAIN_S_1
+291    0x000F    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000F    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x000F    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x2000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
+318    0x3000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x5000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x7000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x3000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x6000    //TX_B_LESSCUT_RTO_S_1
+332    0x6000    //TX_B_LESSCUT_RTO_S_2
+333    0x6000    //TX_B_LESSCUT_RTO_S_3
+334    0x6000    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x6000    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7000    //TX_LAMBDA_PFILT_S_0
+340    0x7400    //TX_LAMBDA_PFILT_S_1
+341    0x7900    //TX_LAMBDA_PFILT_S_2
+342    0x7000    //TX_LAMBDA_PFILT_S_3
+343    0x7D00    //TX_LAMBDA_PFILT_S_4
+344    0x7D00    //TX_LAMBDA_PFILT_S_5
+345    0x7900    //TX_LAMBDA_PFILT_S_6
+346    0x7D00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x0FA0    //TX_DT_BINVAD_ENDF
+358    0x0080    //TX_C_POST_FLT_DT
+359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0023    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x03ED    //TX_NOISE_TH_2
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0FA0    //TX_NOISE_TH_6
+379    0x000A    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x1000    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7000    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x007A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x5000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x5250    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x303C    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0014    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x4000    //TX_TDDRC_ALPHA_UP_01
+784    0x4000    //TX_TDDRC_ALPHA_UP_02
+785    0x4000    //TX_TDDRC_ALPHA_UP_03
+786    0x4000    //TX_TDDRC_ALPHA_UP_04
+787    0x6000    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x0130    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x4000    //TX_TDDRC_ALPHA_UP_00
+861    0x6000    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x1C2F    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0300    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7F00    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7F44    //TX_DTD_THR1_MICMUTE_0
+912    0x7EF4    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x7F26    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x4000    //RX_TDDRC_ALPHA_DWN_2
+29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x5252    //RX_FDEQ_GAIN_0
+40    0x4E4F    //RX_FDEQ_GAIN_1
+41    0x4743    //RX_FDEQ_GAIN_2
+42    0x454C    //RX_FDEQ_GAIN_3
+43    0x4C49    //RX_FDEQ_GAIN_4
+44    0x584A    //RX_FDEQ_GAIN_5
+45    0x4642    //RX_FDEQ_GAIN_6
+46    0x4043    //RX_FDEQ_GAIN_7
+47    0x454A    //RX_FDEQ_GAIN_8
+48    0x4C53    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0503    //RX_FDEQ_BIN_4
+68    0x0107    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0004    //RX_FILTINDX
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1500    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0089    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00C0    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0112    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0191    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9C9C    //RX_FDEQ_GAIN_0
+40    0x9D74    //RX_FDEQ_GAIN_1
+41    0x706C    //RX_FDEQ_GAIN_2
+42    0x809A    //RX_FDEQ_GAIN_3
+43    0xA6A4    //RX_FDEQ_GAIN_4
+44    0xAA99    //RX_FDEQ_GAIN_5
+45    0x775F    //RX_FDEQ_GAIN_6
+46    0x5F4A    //RX_FDEQ_GAIN_7
+47    0x4A4A    //RX_FDEQ_GAIN_8
+48    0x5060    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04BB    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x9C9C    //RX_FDEQ_GAIN_0
+40    0x9D74    //RX_FDEQ_GAIN_1
+41    0x706C    //RX_FDEQ_GAIN_2
+42    0x809A    //RX_FDEQ_GAIN_3
+43    0xA6A4    //RX_FDEQ_GAIN_4
+44    0xAA99    //RX_FDEQ_GAIN_5
+45    0x775F    //RX_FDEQ_GAIN_6
+46    0x5F4A    //RX_FDEQ_GAIN_7
+47    0x4A4A    //RX_FDEQ_GAIN_8
+48    0x5060    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x1407    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x0060    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x0600    //RX_FDDRC_THRD_2_0
+95    0x0600    //RX_FDDRC_THRD_2_1
+96    0x0600    //RX_FDDRC_THRD_2_2
+97    0x0600    //RX_FDDRC_THRD_2_3
+98    0x0800    //RX_FDDRC_THRD_3_0
+99    0x0800    //RX_FDDRC_THRD_3_1
+100    0x0800    //RX_FDDRC_THRD_3_2
+101    0x0800    //RX_FDDRC_THRD_3_3
+102    0x0000    //RX_FDDRC_SLANT_0_0
+103    0x0000    //RX_FDDRC_SLANT_0_1
+104    0x0000    //RX_FDDRC_SLANT_0_2
+105    0x0000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0005    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0015    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001E    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x002A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x003C    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0082    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x4000    //RX_TDDRC_ALPHA_DWN_2
+186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0780    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x8080    //RX_FDEQ_GAIN_0
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0604    //RX_FDEQ_BIN_4
+225    0x0406    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x0060    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x0600    //RX_FDDRC_THRD_2_0
+252    0x0600    //RX_FDDRC_THRD_2_1
+253    0x0600    //RX_FDDRC_THRD_2_2
+254    0x0600    //RX_FDDRC_THRD_2_3
+255    0x0800    //RX_FDDRC_THRD_3_0
+256    0x0800    //RX_FDDRC_THRD_3_1
+257    0x0800    //RX_FDDRC_THRD_3_2
+258    0x0800    //RX_FDDRC_THRD_3_3
+259    0x0000    //RX_FDDRC_SLANT_0_0
+260    0x0000    //RX_FDDRC_SLANT_0_1
+261    0x0000    //RX_FDDRC_SLANT_0_2
+262    0x0000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3A66    //TX_DIST2REF_11
+73    0x053D    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0C00    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0000    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6C00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x5000    //TX_GAIN_NP
+169    0x02A0    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF8    //TX_DTD_THR1_0
+198    0x7FF8    //TX_DTD_THR1_1
+199    0x7FEE    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x1F40    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x4000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF400    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0018    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x7FFF    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x7FFF    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x001E    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0320    //TX_NOISE_TH_1
+371    0x0384    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0F0A    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x7FFF    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x001E    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x5048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x5152    //TX_FDEQ_GAIN_6
+574    0x584F    //TX_FDEQ_GAIN_7
+575    0x4950    //TX_FDEQ_GAIN_8
+576    0x4C48    //TX_FDEQ_GAIN_9
+577    0x3D40    //TX_FDEQ_GAIN_10
+578    0x4240    //TX_FDEQ_GAIN_11
+579    0x4C4C    //TX_FDEQ_GAIN_12
+580    0x4C4C    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0F10    //TX_FDEQ_BIN_10
+602    0x1011    //TX_FDEQ_BIN_11
+603    0x1112    //TX_FDEQ_BIN_12
+604    0x120B    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x090A    //TX_PREEQ_BIN_MIC0_7
+649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
+650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+651    0x0F10    //TX_PREEQ_BIN_MIC0_10
+652    0x1011    //TX_PREEQ_BIN_MIC0_11
+653    0x1112    //TX_PREEQ_BIN_MIC0_12
+654    0x120B    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0708    //TX_PREEQ_BIN_MIC1_6
+697    0x090A    //TX_PREEQ_BIN_MIC1_7
+698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x20C6    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02EE    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7FFF    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7918    //TX_DTD_THR1_MICMUTE_3
+915    0x7000    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C0A    //TX_TFMASKM4_2_DT_THR
+945    0x2710    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x847A    //RX_FDEQ_GAIN_0
+40    0x6C66    //RX_FDEQ_GAIN_1
+41    0x6868    //RX_FDEQ_GAIN_2
+42    0x7084    //RX_FDEQ_GAIN_3
+43    0x7E82    //RX_FDEQ_GAIN_4
+44    0x7874    //RX_FDEQ_GAIN_5
+45    0x5864    //RX_FDEQ_GAIN_6
+46    0x625C    //RX_FDEQ_GAIN_7
+47    0x5C50    //RX_FDEQ_GAIN_8
+48    0x545A    //RX_FDEQ_GAIN_9
+49    0x5C58    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0202    //RX_FDEQ_BIN_3
+67    0x0704    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005C    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0087    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00BE    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0118    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x018B    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0274    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x8060    //RX_FDEQ_GAIN_0
+40    0x535B    //RX_FDEQ_GAIN_1
+41    0x6061    //RX_FDEQ_GAIN_2
+42    0x6E78    //RX_FDEQ_GAIN_3
+43    0x8994    //RX_FDEQ_GAIN_4
+44    0x9485    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x4C4F    //RX_FDEQ_GAIN_8
+48    0x4A4B    //RX_FDEQ_GAIN_9
+49    0x4C4C    //RX_FDEQ_GAIN_10
+50    0x4C54    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x8088    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x041F    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x8060    //RX_FDEQ_GAIN_0
+40    0x535B    //RX_FDEQ_GAIN_1
+41    0x6061    //RX_FDEQ_GAIN_2
+42    0x6E78    //RX_FDEQ_GAIN_3
+43    0x8994    //RX_FDEQ_GAIN_4
+44    0x9485    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x4C4F    //RX_FDEQ_GAIN_8
+48    0x4A4B    //RX_FDEQ_GAIN_9
+49    0x4C4C    //RX_FDEQ_GAIN_10
+50    0x4C54    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x8088    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0A0A    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x027C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0010    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0019    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0024    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0033    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0049    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x6000    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0715    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6864    //RX_FDEQ_GAIN_1
+198    0x7070    //RX_FDEQ_GAIN_2
+199    0x6058    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x7070    //RX_FDEQ_GAIN_10
+207    0x8070    //RX_FDEQ_GAIN_11
+208    0x6060    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0204    //RX_FDEQ_BIN_5
+226    0x0A0A    //RX_FDEQ_BIN_6
+227    0x0A0A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF3    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x6CCC    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x237B    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0056    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x022A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x038C    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x247C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0056    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x007D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00B5    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x016A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x022A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x038C    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x6B54    //TX_SENDFUNC_MODE_0
+3    0x4B7C    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
+5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -29,7 +8115,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0010    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -38,9 +8124,9 @@
 27    0x0A19    //TX_PGA_0
 28    0x0A19    //TX_PGA_1
 29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -146,11 +8232,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -405,7 +8491,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -532,10 +8618,10 @@
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -553,26 +8639,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -631,17 +8717,17 @@
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x484B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x484C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4C    //TX_PREEQ_GAIN_MIC0_11
-629    0x4038    //TX_PREEQ_GAIN_MIC0_12
-630    0x3838    //TX_PREEQ_GAIN_MIC0_13
-631    0x4840    //TX_PREEQ_GAIN_MIC0_14
-632    0x3848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
 636    0x4848    //TX_PREEQ_GAIN_MIC0_19
@@ -680,15 +8766,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+672    0x4645    //TX_PREEQ_GAIN_MIC1_6
+673    0x4442    //TX_PREEQ_GAIN_MIC1_7
+674    0x4140    //TX_PREEQ_GAIN_MIC1_8
+675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
+676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
+677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
+678    0x3938    //TX_PREEQ_GAIN_MIC1_12
+679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
+680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -698,23 +8784,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x4000    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -831,12 +8917,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -914,7 +9000,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -941,35 +9027,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -996,8 +9108,8 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF400    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -1847,8 +9959,8 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF400    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x00C8    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -2673,10697 +10785,16 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSFREE-HANDFREE-CUSTOM2-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6B5C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A19    //TX_PGA_0
-28    0x0A19    //TX_PGA_1
-29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x2000    //TX_MIN_EQ_RE_EST_1
-154    0x2000    //TX_MIN_EQ_RE_EST_2
-155    0x4000    //TX_MIN_EQ_RE_EST_3
-156    0x4000    //TX_MIN_EQ_RE_EST_4
-157    0x7FFF    //TX_MIN_EQ_RE_EST_5
-158    0x7FFF    //TX_MIN_EQ_RE_EST_6
-159    0x7FFF    //TX_MIN_EQ_RE_EST_7
-160    0x7FFF    //TX_MIN_EQ_RE_EST_8
-161    0x7FFF    //TX_MIN_EQ_RE_EST_9
-162    0x7FFF    //TX_MIN_EQ_RE_EST_10
-163    0x7FFF    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0CCD    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x09C4    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0DAC    //TX_DT_CUT_K
-214    0x0020    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1F40    //TX_DT_BINVAD_ENDF
-358    0x0100    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x59D8    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x2710    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x7999    //TX_RATIODTL_CUT_TH
-383    0x0119    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x4000    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x737B    //TX_FDEQ_GAIN_11
-579    0x7B9A    //TX_FDEQ_GAIN_12
-580    0x9AC4    //TX_FDEQ_GAIN_13
-581    0xC4C4    //TX_FDEQ_GAIN_14
-582    0xC4C4    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4849    //TX_PREEQ_GAIN_MIC0_6
-624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4838    //TX_PREEQ_GAIN_MIC0_12
-630    0x3858    //TX_PREEQ_GAIN_MIC0_13
-631    0x7060    //TX_PREEQ_GAIN_MIC0_14
-632    0x9870    //TX_PREEQ_GAIN_MIC0_15
-633    0x5848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0004    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0016    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0FDA    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x006C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x065B    //RX_PGA
-11    0x7E56    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF400    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x006C    //_
-158    0x0000    //_
-159    0x0004    //_
-160    0x0004    //_
-161    0x000A    //_
-162    0x0000    //_
-163    0x4000    //_
-164    0x4000    //_
-165    0x4000    //_
-166    0x4000    //_
-167    0x065B    //_
-168    0x7E56    //_
-169    0x4000    //_
-170    0x7800    //_
-171    0x7000    //_
-172    0x6000    //_
-173    0x0008    //_
-174    0x0003    //_
-175    0x0100    //_
-176    0x0020    //_
-177    0x0400    //_
-178    0x000C    //_
-179    0x0014    //_
-180    0xF400    //_
-181    0x7E00    //_
-182    0x00C8    //_
-183    0x0190    //_
-184    0x7EB8    //_
-185    0x7EB8    //_
-186    0x7EB8    //_
-187    0x0002    //_
-188    0x0800    //_
-189    0x7EB8    //_
-190    0x7FFF    //_
-191    0x0800    //_
-192    0x199A    //_
-193    0x0000    //_
-194    0x4000    //_
-195    0x0020    //_
-196    0x4848    //_
-197    0x4848    //_
-198    0x4848    //_
-199    0x4870    //_
-200    0x4848    //_
-201    0x4848    //_
-202    0x4850    //_
-203    0x485C    //_
-204    0x5C60    //_
-205    0x685C    //_
-206    0x5640    //_
-207    0x4040    //_
-208    0x5C58    //_
-209    0x5C60    //_
-210    0x6060    //_
-211    0x6060    //_
-212    0x4848    //_
-213    0x4848    //_
-214    0x4848    //_
-215    0x4848    //_
-216    0x4848    //_
-217    0x4848    //_
-218    0x4848    //_
-219    0x4848    //_
-220    0x0202    //_
-221    0x0203    //_
-222    0x0303    //_
-223    0x0402    //_
-224    0x0504    //_
-225    0x0209    //_
-226    0x0808    //_
-227    0x090A    //_
-228    0x0B0C    //_
-229    0x0D0E    //_
-230    0x1013    //_
-231    0x1719    //_
-232    0x1B1E    //_
-233    0x1E1E    //_
-234    0x1E28    //_
-235    0x282C    //_
-236    0x0000    //_
-237    0x0000    //_
-238    0x0000    //_
-239    0x0000    //_
-240    0x0000    //_
-241    0x0000    //_
-242    0x0000    //_
-243    0x0000    //_
-244    0x4000    //_
-245    0x0320    //_
-246    0x0018    //_
-247    0x0030    //_
-248    0x0050    //_
-249    0x0080    //_
-250    0x0004    //_
-251    0x5000    //_
-252    0x5000    //_
-253    0x2000    //_
-254    0x5000    //_
-255    0x6400    //_
-256    0x6400    //_
-257    0x2000    //_
-258    0x5000    //_
-259    0x4000    //_
-260    0x4000    //_
-261    0x4000    //_
-262    0x4000    //_
-263    0x7FFF    //_
-264    0x7FFF    //_
-265    0x7FFF    //_
-266    0x7FFF    //_
-267    0x0000    //_
-268    0x0002    //_
-269    0x0001    //_
-270    0x0002    //_
-271    0x1800    //_
-272    0x1800    //_
-273    0x6000    //_
-274    0x6E00    //_
-275    0x4000    //_
-276    0x7EB8    //_
-277    0x0000    //_
-278    0x199A    //_
-279    0x0001    //_
-280    0x0CCD    //_
-281    0x03C3    //_
-282    0x7C00    //_
-283    0x2000    //_
-284    0x2000    //_
-285    0x0080    //_
-286    0x0012    //_
-287    0x0000    //_
-288    0x0000    //_
-289    0x3000    //_
-290    0x3000    //_
-291    0x1800    //_
-292    0x1000    //_
-293    0x04CD    //_
-294    0x0F33    //_
-295    0x7333    //_
-296    0x199A    //_
-297    0x7333    //_
-298    0x0004    //_
-299    0x6CCD    //_
-300    0x799A    //_
-301    0x001E    //_
-302    0x3000    //_
-303    0x3200    //_
-304    0x2000    //_
-305    0x2000    //_
-306    0x2000    //_
-307    0x2000    //_
-308    0x2000    //_
-309    0x2000    //_
-310    0x2000    //_
-311    0x0000    //_
-312    0x0000    //_
-313    0x0000    //_
-#VOL    0
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDFREE-CUSTOM1-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6B74    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0A19    //TX_PGA_0
-28    0x0A19    //TX_PGA_1
-29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3B33    //TX_DIST2REF_11
-73    0x0A70    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0015    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x1800    //TX_THR_PITCH_DET_0
-131    0x1000    //TX_THR_PITCH_DET_1
-132    0x0800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x2000    //TX_MIN_EQ_RE_EST_1
-154    0x2000    //TX_MIN_EQ_RE_EST_2
-155    0x4000    //TX_MIN_EQ_RE_EST_3
-156    0x4000    //TX_MIN_EQ_RE_EST_4
-157    0x7FFF    //TX_MIN_EQ_RE_EST_5
-158    0x7FFF    //TX_MIN_EQ_RE_EST_6
-159    0x7FFF    //TX_MIN_EQ_RE_EST_7
-160    0x7FFF    //TX_MIN_EQ_RE_EST_8
-161    0x7FFF    //TX_MIN_EQ_RE_EST_9
-162    0x7FFF    //TX_MIN_EQ_RE_EST_10
-163    0x7FFF    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x0CCD    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x09C4    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0DAC    //TX_DT_CUT_K
-214    0x0020    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x7FFF    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0000    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1F40    //TX_DT_BINVAD_ENDF
-358    0x0100    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x0DAC    //TX_NOISE_TH_2
-372    0x4E20    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x59D8    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x2710    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x7999    //TX_RATIODTL_CUT_TH
-383    0x0119    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x4000    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x2000    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x5048    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x5B5B    //TX_FDEQ_GAIN_10
-578    0x737B    //TX_FDEQ_GAIN_11
-579    0x7B9A    //TX_FDEQ_GAIN_12
-580    0x9AC4    //TX_FDEQ_GAIN_13
-581    0xC4C4    //TX_FDEQ_GAIN_14
-582    0xC4C4    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4849    //TX_PREEQ_GAIN_MIC0_6
-624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4838    //TX_PREEQ_GAIN_MIC0_12
-630    0x3858    //TX_PREEQ_GAIN_MIC0_13
-631    0x7060    //TX_PREEQ_GAIN_MIC0_14
-632    0x9870    //TX_PREEQ_GAIN_MIC0_15
-633    0x5848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
-650    0x0C10    //TX_PREEQ_BIN_MIC0_9
-651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0030    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x1812    //TX_PREEQ_BIN_MIC1_0
-691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x080A    //TX_PREEQ_BIN_MIC1_3
-694    0x0B09    //TX_PREEQ_BIN_MIC1_4
-695    0x0A06    //TX_PREEQ_BIN_MIC1_5
-696    0x0606    //TX_PREEQ_BIN_MIC1_6
-697    0x0605    //TX_PREEQ_BIN_MIC1_7
-698    0x050A    //TX_PREEQ_BIN_MIC1_8
-699    0x1505    //TX_PREEQ_BIN_MIC1_9
-700    0x0506    //TX_PREEQ_BIN_MIC1_10
-701    0x0615    //TX_PREEQ_BIN_MIC1_11
-702    0x1516    //TX_PREEQ_BIN_MIC1_12
-703    0x2021    //TX_PREEQ_BIN_MIC1_13
-704    0x2021    //TX_PREEQ_BIN_MIC1_14
-705    0x2021    //TX_PREEQ_BIN_MIC1_15
-706    0x0800    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0004    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0016    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0FDA    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x006C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x065B    //RX_PGA
-11    0x7E56    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0014    //RX_NS_LVL_CTRL
-23    0xF400    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x00C8    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x4000    //RX_TDDRC_ALPHA_UP_1
-7    0x4000    //RX_TDDRC_ALPHA_UP_2
-8    0x4000    //RX_TDDRC_ALPHA_UP_3
-9    0x4000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0001    //RX_TDDRC_THRD_0
-113    0x0002    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x6000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x4000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x03C3    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4870    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4850    //RX_FDEQ_GAIN_6
-46    0x485C    //RX_FDEQ_GAIN_7
-47    0x5C60    //RX_FDEQ_GAIN_8
-48    0x685C    //RX_FDEQ_GAIN_9
-49    0x5640    //RX_FDEQ_GAIN_10
-50    0x4040    //RX_FDEQ_GAIN_11
-51    0x5C58    //RX_FDEQ_GAIN_12
-52    0x5C60    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
-54    0x6060    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0402    //RX_FDEQ_BIN_3
-67    0x0504    //RX_FDEQ_BIN_4
-68    0x0209    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x006C    //_
-158    0x0000    //_
-159    0x0004    //_
-160    0x0004    //_
-161    0x000A    //_
-162    0x0000    //_
-163    0x4000    //_
-164    0x4000    //_
-165    0x4000    //_
-166    0x4000    //_
-167    0x065B    //_
-168    0x7E56    //_
-169    0x4000    //_
-170    0x7800    //_
-171    0x7000    //_
-172    0x6000    //_
-173    0x0008    //_
-174    0x0003    //_
-175    0x0100    //_
-176    0x0020    //_
-177    0x0400    //_
-178    0x000C    //_
-179    0x0014    //_
-180    0xF400    //_
-181    0x7E00    //_
-182    0x00C8    //_
-183    0x0190    //_
-184    0x7EB8    //_
-185    0x7EB8    //_
-186    0x7EB8    //_
-187    0x0002    //_
-188    0x0800    //_
-189    0x7EB8    //_
-190    0x7FFF    //_
-191    0x0800    //_
-192    0x199A    //_
-193    0x0000    //_
-194    0x4000    //_
-195    0x0020    //_
-196    0x4848    //_
-197    0x4848    //_
-198    0x4848    //_
-199    0x4870    //_
-200    0x4848    //_
-201    0x4848    //_
-202    0x4850    //_
-203    0x485C    //_
-204    0x5C60    //_
-205    0x685C    //_
-206    0x5640    //_
-207    0x4040    //_
-208    0x5C58    //_
-209    0x5C60    //_
-210    0x6060    //_
-211    0x6060    //_
-212    0x4848    //_
-213    0x4848    //_
-214    0x4848    //_
-215    0x4848    //_
-216    0x4848    //_
-217    0x4848    //_
-218    0x4848    //_
-219    0x4848    //_
-220    0x0202    //_
-221    0x0203    //_
-222    0x0303    //_
-223    0x0402    //_
-224    0x0504    //_
-225    0x0209    //_
-226    0x0808    //_
-227    0x090A    //_
-228    0x0B0C    //_
-229    0x0D0E    //_
-230    0x1013    //_
-231    0x1719    //_
-232    0x1B1E    //_
-233    0x1E1E    //_
-234    0x1E28    //_
-235    0x282C    //_
-236    0x0000    //_
-237    0x0000    //_
-238    0x0000    //_
-239    0x0000    //_
-240    0x0000    //_
-241    0x0000    //_
-242    0x0000    //_
-243    0x0000    //_
-244    0x4000    //_
-245    0x0320    //_
-246    0x0018    //_
-247    0x0030    //_
-248    0x0050    //_
-249    0x0080    //_
-250    0x0004    //_
-251    0x5000    //_
-252    0x5000    //_
-253    0x2000    //_
-254    0x5000    //_
-255    0x6400    //_
-256    0x6400    //_
-257    0x2000    //_
-258    0x5000    //_
-259    0x4000    //_
-260    0x4000    //_
-261    0x4000    //_
-262    0x4000    //_
-263    0x7FFF    //_
-264    0x7FFF    //_
-265    0x7FFF    //_
-266    0x7FFF    //_
-267    0x0000    //_
-268    0x0002    //_
-269    0x0001    //_
-270    0x0002    //_
-271    0x1800    //_
-272    0x1800    //_
-273    0x6000    //_
-274    0x6E00    //_
-275    0x4000    //_
-276    0x7EB8    //_
-277    0x0000    //_
-278    0x199A    //_
-279    0x0001    //_
-280    0x0CCD    //_
-281    0x03C3    //_
-282    0x7C00    //_
-283    0x2000    //_
-284    0x2000    //_
-285    0x0080    //_
-286    0x0012    //_
-287    0x0000    //_
-288    0x0000    //_
-289    0x3000    //_
-290    0x3000    //_
-291    0x1800    //_
-292    0x1000    //_
-293    0x04CD    //_
-294    0x0F33    //_
-295    0x7333    //_
-296    0x199A    //_
-297    0x7333    //_
-298    0x0004    //_
-299    0x6CCD    //_
-300    0x799A    //_
-301    0x001E    //_
-302    0x3000    //_
-303    0x3200    //_
-304    0x2000    //_
-305    0x2000    //_
-306    0x2000    //_
-307    0x2000    //_
-308    0x2000    //_
-309    0x2000    //_
-310    0x2000    //_
-311    0x0000    //_
-312    0x0000    //_
-313    0x0000    //_
-#VOL    0
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004D    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x4000    //RX_TDDRC_ALPHA_UP_1
-164    0x4000    //RX_TDDRC_ALPHA_UP_2
-165    0x4000    //RX_TDDRC_ALPHA_UP_3
-166    0x4000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0001    //RX_TDDRC_THRD_0
-270    0x0002    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x6000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x4000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x03C3    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4870    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x485C    //RX_FDEQ_GAIN_7
-204    0x5C60    //RX_FDEQ_GAIN_8
-205    0x685C    //RX_FDEQ_GAIN_9
-206    0x5640    //RX_FDEQ_GAIN_10
-207    0x4040    //RX_FDEQ_GAIN_11
-208    0x5C58    //RX_FDEQ_GAIN_12
-209    0x5C60    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
-211    0x6060    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0402    //RX_FDEQ_BIN_3
-224    0x0504    //RX_FDEQ_BIN_4
-225    0x0209    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-NB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0073    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0019    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x053D    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0CAE    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7652    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0100    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7A00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0200    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1800    //TX_MIN_EQ_RE_EST_7
-160    0x1800    //TX_MIN_EQ_RE_EST_8
-161    0x3000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x6000    //TX_MIN_EQ_RE_EST_11
-164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
-166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x2000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x0200    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7148    //TX_DTD_THR1_0
-198    0x7148    //TX_DTD_THR1_1
-199    0x7148    //TX_DTD_THR1_2
-200    0x5DC0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x0CCD    //TX_DTD_THR2_0
-205    0x0CCD    //TX_DTD_THR2_1
-206    0x0CCD    //TX_DTD_THR2_2
-207    0x0CCD    //TX_DTD_THR2_3
-208    0x0CCD    //TX_DTD_THR2_4
-209    0x0CCD    //TX_DTD_THR2_5
-210    0x0CCD    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x157C    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x1000    //TX_ADPT_STRICT_L
-222    0x1000    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x2000    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0050    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x01A0    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0800    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0017    //TX_NS_LVL_CTRL_1
-283    0x0015    //TX_NS_LVL_CTRL_2
-284    0x0012    //TX_NS_LVL_CTRL_3
-285    0x0012    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0012    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x0018    //TX_MIN_GAIN_S_0
-290    0x0018    //TX_MIN_GAIN_S_1
-291    0x0018    //TX_MIN_GAIN_S_2
-292    0x0018    //TX_MIN_GAIN_S_3
-293    0x0018    //TX_MIN_GAIN_S_4
-294    0x0018    //TX_MIN_GAIN_S_5
-295    0x0018    //TX_MIN_GAIN_S_6
-296    0x0018    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
-318    0x7FFF    //TX_A_POST_FILT_S_4
-319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
-321    0x7FFF    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
-326    0x3000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x6000    //TX_B_LESSCUT_RTO_S_1
-332    0x6000    //TX_B_LESSCUT_RTO_S_2
-333    0x6000    //TX_B_LESSCUT_RTO_S_3
-334    0x6000    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x6000    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7E00    //TX_LAMBDA_PFILT_S_0
-340    0x7E00    //TX_LAMBDA_PFILT_S_1
-341    0x7E00    //TX_LAMBDA_PFILT_S_2
-342    0x7E00    //TX_LAMBDA_PFILT_S_3
-343    0x7E00    //TX_LAMBDA_PFILT_S_4
-344    0x7E00    //TX_LAMBDA_PFILT_S_5
-345    0x7E00    //TX_LAMBDA_PFILT_S_6
-346    0x7E00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x0400    //TX_C_POST_FLT_DT
-359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0050    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
-374    0x7FFF    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0FA0    //TX_NOISE_TH_6
-379    0x000A    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x1000    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x7000    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x000A    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x007A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x5000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x7FFF    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0014    //TX_FDEQ_SUBNUM
-567    0x5250    //TX_FDEQ_GAIN_0
-568    0x4C48    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4A43    //TX_FDEQ_GAIN_3
-571    0x374B    //TX_FDEQ_GAIN_4
-572    0x3444    //TX_FDEQ_GAIN_5
-573    0x433C    //TX_FDEQ_GAIN_6
-574    0x403C    //TX_FDEQ_GAIN_7
-575    0x2627    //TX_FDEQ_GAIN_8
-576    0x2929    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0014    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4849    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4849    //TX_PREEQ_GAIN_MIC2_7
-723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
-724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0202    //TX_PREEQ_BIN_MIC2_0
-740    0x0203    //TX_PREEQ_BIN_MIC2_1
-741    0x0303    //TX_PREEQ_BIN_MIC2_2
-742    0x0304    //TX_PREEQ_BIN_MIC2_3
-743    0x0405    //TX_PREEQ_BIN_MIC2_4
-744    0x0506    //TX_PREEQ_BIN_MIC2_5
-745    0x0708    //TX_PREEQ_BIN_MIC2_6
-746    0x090A    //TX_PREEQ_BIN_MIC2_7
-747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
-748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x4000    //TX_TDDRC_ALPHA_UP_01
-784    0x4000    //TX_TDDRC_ALPHA_UP_02
-785    0x4000    //TX_TDDRC_ALPHA_UP_03
-786    0x4000    //TX_TDDRC_ALPHA_UP_04
-787    0x6000    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x4000    //TX_TDDRC_ALPHA_UP_00
-861    0x6000    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0A00    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x1000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7652    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0005    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0015    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001E    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002A    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x003C    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0058    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0082    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x02D2    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x5252    //RX_FDEQ_GAIN_0
-40    0x4E4F    //RX_FDEQ_GAIN_1
-41    0x4743    //RX_FDEQ_GAIN_2
-42    0x454C    //RX_FDEQ_GAIN_3
-43    0x4C49    //RX_FDEQ_GAIN_4
-44    0x584A    //RX_FDEQ_GAIN_5
-45    0x4642    //RX_FDEQ_GAIN_6
-46    0x4043    //RX_FDEQ_GAIN_7
-47    0x454A    //RX_FDEQ_GAIN_8
-48    0x4C53    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0503    //RX_FDEQ_BIN_4
-68    0x0107    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x0060    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x0600    //RX_FDDRC_THRD_2_0
-95    0x0600    //RX_FDDRC_THRD_2_1
-96    0x0600    //RX_FDDRC_THRD_2_2
-97    0x0600    //RX_FDDRC_THRD_2_3
-98    0x0800    //RX_FDDRC_THRD_3_0
-99    0x0800    //RX_FDDRC_THRD_3_1
-100    0x0800    //RX_FDDRC_THRD_3_2
-101    0x0800    //RX_FDDRC_THRD_3_3
-102    0x0000    //RX_FDDRC_SLANT_0_0
-103    0x0000    //RX_FDDRC_SLANT_0_1
-104    0x0000    //RX_FDDRC_SLANT_0_2
-105    0x0000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7652    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0005    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0015    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001E    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x002A    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x003C    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0058    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0082    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
-196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8054    //RX_FDEQ_GAIN_1
-198    0x5050    //RX_FDEQ_GAIN_2
-199    0x5058    //RX_FDEQ_GAIN_3
-200    0x5C70    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x484C    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x485A    //RX_FDEQ_GAIN_8
-205    0x5A58    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0604    //RX_FDEQ_BIN_4
-225    0x0406    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x0060    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x0600    //RX_FDDRC_THRD_2_0
-252    0x0600    //RX_FDDRC_THRD_2_1
-253    0x0600    //RX_FDDRC_THRD_2_2
-254    0x0600    //RX_FDDRC_THRD_2_3
-255    0x0800    //RX_FDDRC_THRD_3_0
-256    0x0800    //RX_FDDRC_THRD_3_1
-257    0x0800    //RX_FDDRC_THRD_3_2
-258    0x0800    //RX_FDDRC_THRD_3_3
-259    0x0000    //RX_FDDRC_SLANT_0_0
-260    0x0000    //RX_FDDRC_SLANT_0_1
-261    0x0000    //RX_FDDRC_SLANT_0_2
-262    0x0000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-WB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
-22    0x0019    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0001    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0002    //TX_MIC_DATA_SRC1
-43    0x0001    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3A66    //TX_DIST2REF_11
-73    0x053D    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0800    //TX_MIC_REFBLK_VOLUME
-108    0x0C00    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7B02    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x5000    //TX_THR_PITCH_DET_0
-131    0x4800    //TX_THR_PITCH_DET_1
-132    0x4000    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x0028    //TX_TAIL_LENGTH
-147    0x0300    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6C00    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x1000    //TX_MIN_EQ_RE_EST_8
-161    0x1000    //TX_MIN_EQ_RE_EST_9
-162    0x1000    //TX_MIN_EQ_RE_EST_10
-163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x7FFF    //TX_C_POST_FLT
-168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x6590    //TX_DTD_THR1_0
-198    0x6590    //TX_DTD_THR1_1
-199    0x6590    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
-201    0x7FF0    //TX_DTD_THR1_4
-202    0x7FF0    //TX_DTD_THR1_5
-203    0x7FF0    //TX_DTD_THR1_6
-204    0x5000    //TX_DTD_THR2_0
-205    0x5000    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
-207    0x5000    //TX_DTD_THR2_3
-208    0x5000    //TX_DTD_THR2_4
-209    0x5000    //TX_DTD_THR2_5
-210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x07D0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x023E    //TX_ADPT_STRICT_L
-222    0x023E    //TX_ADPT_STRICT_H
-223    0x03E8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x0578    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0000    //TX_EPD_OFFSET_00
-233    0x0000    //TX_EPD_OFFST_01
-234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
-235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x0000    //TX_DTD_THR1_7
-238    0x0000    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF800    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xF800    //TX_THR_SN_EST_6
-249    0xF800    //TX_THR_SN_EST_7
-250    0x0100    //TX_DELTA_THR_SN_EST_0
-251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
-254    0x0100    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0016    //TX_NS_LVL_CTRL_3
-285    0x0014    //TX_NS_LVL_CTRL_4
-286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x0014    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
-304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0018    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
-326    0x4000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x4000    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x6000    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
-343    0x7C00    //TX_LAMBDA_PFILT_S_4
-344    0x7C00    //TX_LAMBDA_PFILT_S_5
-345    0x7C00    //TX_LAMBDA_PFILT_S_6
-346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0600    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0200    //TX_DT_BINVAD_TH_0
-354    0x0200    //TX_DT_BINVAD_TH_1
-355    0x0200    //TX_DT_BINVAD_TH_2
-356    0x0200    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0140    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0064    //TX_NDETCT
-367    0x0032    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
-371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x0F0A    //TX_NOISE_TH_6
-379    0x0033    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x7999    //TX_RATIODTL_CUT_TH
-383    0x0119    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x7FFF    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x4000    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0033    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x4000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x000A    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0x3000    //TX_DEREVERB_LF_MU
-515    0x34CD    //TX_DEREVERB_HF_MU
-516    0x0007    //TX_DEREVERB_DELAY
-517    0x0004    //TX_DEREVERB_COEF_LEN
-518    0x0003    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x3A98    //TX_GSC_RTOL_TH
-522    0x3A98    //TX_GSC_RTOH_TH
-523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x5050    //TX_FDEQ_GAIN_0
-568    0x544B    //TX_FDEQ_GAIN_1
-569    0x4B4B    //TX_FDEQ_GAIN_2
-570    0x4B48    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4850    //TX_FDEQ_GAIN_5
-573    0x5458    //TX_FDEQ_GAIN_6
-574    0x5A4C    //TX_FDEQ_GAIN_7
-575    0x464C    //TX_FDEQ_GAIN_8
-576    0x4844    //TX_FDEQ_GAIN_9
-577    0x393C    //TX_FDEQ_GAIN_10
-578    0x3C3C    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0F10    //TX_FDEQ_BIN_10
-602    0x1011    //TX_FDEQ_BIN_11
-603    0x1112    //TX_FDEQ_BIN_12
-604    0x120B    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0202    //TX_PREEQ_BIN_MIC0_0
-642    0x0203    //TX_PREEQ_BIN_MIC0_1
-643    0x0303    //TX_PREEQ_BIN_MIC0_2
-644    0x0304    //TX_PREEQ_BIN_MIC0_3
-645    0x0405    //TX_PREEQ_BIN_MIC0_4
-646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
-651    0x0F10    //TX_PREEQ_BIN_MIC0_10
-652    0x1011    //TX_PREEQ_BIN_MIC0_11
-653    0x1112    //TX_PREEQ_BIN_MIC0_12
-654    0x120B    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4A4B    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4A    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x494C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4C4C    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
-700    0x0F10    //TX_PREEQ_BIN_MIC1_10
-701    0x1011    //TX_PREEQ_BIN_MIC1_11
-702    0x1112    //TX_PREEQ_BIN_MIC1_12
-703    0x120B    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x494A    //TX_PREEQ_GAIN_MIC2_4
-720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
-721    0x4D4D    //TX_PREEQ_GAIN_MIC2_6
-722    0x4E4F    //TX_PREEQ_GAIN_MIC2_7
-723    0x4F50    //TX_PREEQ_GAIN_MIC2_8
-724    0x5051    //TX_PREEQ_GAIN_MIC2_9
-725    0x5252    //TX_PREEQ_GAIN_MIC2_10
-726    0x5253    //TX_PREEQ_GAIN_MIC2_11
-727    0x5353    //TX_PREEQ_GAIN_MIC2_12
-728    0x5454    //TX_PREEQ_GAIN_MIC2_13
-729    0x5455    //TX_PREEQ_GAIN_MIC2_14
-730    0x5657    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0808    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0800    //TX_TDDRC_ALPHA_UP_01
-784    0x0800    //TX_TDDRC_ALPHA_UP_02
-785    0x0800    //TX_TDDRC_ALPHA_UP_03
-786    0x0800    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
-818    0x0078    //TX_DEADMIC_CNT
-819    0x0078    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0096    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x6000    //TX_TDDRC_SLANT_0
-859    0x6000    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0C97    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x206C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0400    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0011    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0019    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0024    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0033    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0049    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
-8    0x6000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x6000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0284    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4844    //RX_FDEQ_GAIN_1
-41    0x3E3B    //RX_FDEQ_GAIN_2
-42    0x4143    //RX_FDEQ_GAIN_3
-43    0x4348    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4E56    //RX_FDEQ_GAIN_11
-51    0x595C    //RX_FDEQ_GAIN_12
-52    0x5959    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0035    //RX_FDDRC_BAND_MARGIN_1
-91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-92    0x0120    //RX_FDDRC_BAND_MARGIN_3
-93    0x0004    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x2000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x2000    //RX_FDDRC_THRD_3_2
-101    0x5000    //RX_FDDRC_THRD_3_3
-102    0x4000    //RX_FDDRC_SLANT_0_0
-103    0x4000    //RX_FDDRC_SLANT_0_1
-104    0x4000    //RX_FDDRC_SLANT_0_2
-105    0x4000    //RX_FDDRC_SLANT_0_3
-106    0x7FFF    //RX_FDDRC_SLANT_1_0
-107    0x7FFF    //RX_FDDRC_SLANT_1_1
-108    0x7FFF    //RX_FDDRC_SLANT_1_2
-109    0x7FFF    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7B02    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0400    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x5C54    //RX_FDEQ_GAIN_5
-202    0x544C    //RX_FDEQ_GAIN_6
-203    0x4A48    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x6C6C    //RX_FDEQ_GAIN_10
-207    0x6C68    //RX_FDEQ_GAIN_11
-208    0x5A5A    //RX_FDEQ_GAIN_12
-209    0x5A5C    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0011    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x5C54    //RX_FDEQ_GAIN_5
-202    0x544C    //RX_FDEQ_GAIN_6
-203    0x4A48    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x6C6C    //RX_FDEQ_GAIN_10
-207    0x6C68    //RX_FDEQ_GAIN_11
-208    0x5A5A    //RX_FDEQ_GAIN_12
-209    0x5A5C    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0011    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x5C54    //RX_FDEQ_GAIN_5
-202    0x544C    //RX_FDEQ_GAIN_6
-203    0x4A48    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x6C6C    //RX_FDEQ_GAIN_10
-207    0x6C68    //RX_FDEQ_GAIN_11
-208    0x5A5A    //RX_FDEQ_GAIN_12
-209    0x5A5C    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0019    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x5C54    //RX_FDEQ_GAIN_5
-202    0x544C    //RX_FDEQ_GAIN_6
-203    0x4A48    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x6C6C    //RX_FDEQ_GAIN_10
-207    0x6C68    //RX_FDEQ_GAIN_11
-208    0x5A5A    //RX_FDEQ_GAIN_12
-209    0x5A5C    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0024    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x5C54    //RX_FDEQ_GAIN_5
-202    0x544C    //RX_FDEQ_GAIN_6
-203    0x4A48    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x6C6C    //RX_FDEQ_GAIN_10
-207    0x6C68    //RX_FDEQ_GAIN_11
-208    0x5A5A    //RX_FDEQ_GAIN_12
-209    0x5A5C    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0033    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x8854    //RX_FDEQ_GAIN_5
-202    0x5448    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x7070    //RX_FDEQ_GAIN_10
-207    0x8070    //RX_FDEQ_GAIN_11
-208    0x6060    //RX_FDEQ_GAIN_12
-209    0x7070    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0049    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6858    //RX_FDEQ_GAIN_1
-198    0x5858    //RX_FDEQ_GAIN_2
-199    0x5858    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x8854    //RX_FDEQ_GAIN_5
-202    0x5448    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x7070    //RX_FDEQ_GAIN_10
-207    0x8070    //RX_FDEQ_GAIN_11
-208    0x6060    //RX_FDEQ_GAIN_12
-209    0x7070    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
-165    0x6000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1C00    //RX_TDDRC_THRD_2
-272    0x1C00    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
-275    0x6000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0715    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6864    //RX_FDEQ_GAIN_1
-198    0x7070    //RX_FDEQ_GAIN_2
-199    0x6058    //RX_FDEQ_GAIN_3
-200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x8854    //RX_FDEQ_GAIN_5
-202    0x5448    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x6068    //RX_FDEQ_GAIN_9
-206    0x7070    //RX_FDEQ_GAIN_10
-207    0x8070    //RX_FDEQ_GAIN_11
-208    0x6060    //RX_FDEQ_GAIN_12
-209    0x7070    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0404    //RX_FDEQ_BIN_4
-225    0x0204    //RX_FDEQ_BIN_5
-226    0x0A0A    //RX_FDEQ_BIN_6
-227    0x0A0A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0035    //RX_FDDRC_BAND_MARGIN_1
-248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
-249    0x0120    //RX_FDDRC_BAND_MARGIN_3
-250    0x0004    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x2000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x2000    //RX_FDDRC_THRD_3_2
-258    0x5000    //RX_FDDRC_THRD_3_3
-259    0x4000    //RX_FDDRC_SLANT_0_0
-260    0x4000    //RX_FDDRC_SLANT_0_1
-261    0x4000    //RX_FDDRC_SLANT_0_2
-262    0x4000    //RX_FDDRC_SLANT_0_3
-263    0x7FFF    //RX_FDDRC_SLANT_1_0
-264    0x7FFF    //RX_FDDRC_SLANT_1_1
-265    0x7FFF    //RX_FDDRC_SLANT_1_2
-266    0x7FFF    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-SWB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
-#TX
-0    0x0001    //TX_OPERATION_MODE_0
-1    0x0001    //TX_OPERATION_MODE_1
-2    0x0073    //TX_PATCH_REG
-3    0x2F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
+2    0x00FB    //TX_PATCH_REG
+3    0x6F74    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -13379,7 +10810,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009C    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -13388,9 +10819,9 @@
 27    0x1000    //TX_PGA_0
 28    0x1000    //TX_PGA_1
 29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -13496,11 +10927,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -13508,28 +10939,28 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
 159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x3000    //TX_LAMBDA_CB_NLE
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -13555,9 +10986,9 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
-199    0x7FF0    //TX_DTD_THR1_2
+197    0x7530    //TX_DTD_THR1_0
+198    0x7530    //TX_DTD_THR1_1
+199    0x6978    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
@@ -13571,8 +11002,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -13581,18 +11012,18 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1F40    //TX_RATIO_DT_L_TH_HIGH
-226    0x5014    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+225    0x2328    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x2328    //TX_RATIO_DT_L0_TH_HIGH
+234    0x2710    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -13602,19 +11033,19 @@
 241    0x0000    //TX_DT_RESRV_9
 242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
+256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -13632,20 +11063,20 @@
 271    0x799A    //TX_LAMBDA_EQ_BF
 272    0x1000    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
 276    0x0800    //TX_MAINREFRTO_TH_H
 277    0x0800    //TX_MAINREFRTO_TH_L
 278    0x0200    //TX_MAINREFRTO_TH_EQ
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x0020    //TX_MIN_GAIN_S_0
 290    0x0020    //TX_MIN_GAIN_S_1
@@ -13655,16 +11086,16 @@
 294    0x0020    //TX_MIN_GAIN_S_5
 295    0x0020    //TX_MIN_GAIN_S_6
 296    0x0020    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
+297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
-302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -13673,20 +11104,20 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x7FFF    //TX_A_POST_FILT_S_0
-315    0x7FFF    //TX_A_POST_FILT_S_1
-316    0x7FFF    //TX_A_POST_FILT_S_2
-317    0x7FFF    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
 318    0x7FFF    //TX_A_POST_FILT_S_4
 319    0x7FFF    //TX_A_POST_FILT_S_5
-320    0x7FFF    //TX_A_POST_FILT_S_6
+320    0x4000    //TX_A_POST_FILT_S_6
 321    0x7FFF    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
+324    0x7000    //TX_B_POST_FILT_2
 325    0x6000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
+328    0x6000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
@@ -13697,7 +11128,7 @@
 336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7F00    //TX_LAMBDA_PFILT
-339    0x7F00    //TX_LAMBDA_PFILT_S_0
+339    0x7400    //TX_LAMBDA_PFILT_S_0
 340    0x7F00    //TX_LAMBDA_PFILT_S_1
 341    0x7F00    //TX_LAMBDA_PFILT_S_2
 342    0x7F00    //TX_LAMBDA_PFILT_S_3
@@ -13705,8 +11136,8 @@
 344    0x7F00    //TX_LAMBDA_PFILT_S_5
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7F00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -13714,9 +11145,9 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
+356    0x2000    //TX_DT_BINVAD_TH_3
 357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -13728,11 +11159,11 @@
 367    0x0050    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
+370    0x0FA0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
@@ -13755,11 +11186,11 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0001    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
@@ -13767,8 +11198,8 @@
 406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -13882,10 +11313,10 @@
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -13903,44 +11334,44 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4B4B    //TX_FDEQ_GAIN_4
-572    0x4B4E    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x584E    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x4E45    //TX_FDEQ_GAIN_9
-577    0x494A    //TX_FDEQ_GAIN_10
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
 578    0x534D    //TX_FDEQ_GAIN_11
-579    0x5C5C    //TX_FDEQ_GAIN_12
-580    0x5F77    //TX_FDEQ_GAIN_13
-581    0x788F    //TX_FDEQ_GAIN_14
-582    0x929A    //TX_FDEQ_GAIN_15
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -14031,16 +11462,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x494A    //TX_PREEQ_GAIN_MIC1_9
-676    0x4B4B    //TX_PREEQ_GAIN_MIC1_10
-677    0x4B48    //TX_PREEQ_GAIN_MIC1_11
-678    0x4D4C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4A48    //TX_PREEQ_GAIN_MIC1_13
-680    0x4840    //TX_PREEQ_GAIN_MIC1_14
-681    0x3434    //TX_PREEQ_GAIN_MIC1_15
-682    0x3C48    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -14079,16 +11510,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x484A    //TX_PREEQ_GAIN_MIC2_6
-722    0x4B4D    //TX_PREEQ_GAIN_MIC2_7
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
 723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
 724    0x5051    //TX_PREEQ_GAIN_MIC2_9
-725    0x5253    //TX_PREEQ_GAIN_MIC2_10
-726    0x5456    //TX_PREEQ_GAIN_MIC2_11
-727    0x5251    //TX_PREEQ_GAIN_MIC2_12
-728    0x4F48    //TX_PREEQ_GAIN_MIC2_13
-729    0x423C    //TX_PREEQ_GAIN_MIC2_14
-730    0x3C48    //TX_PREEQ_GAIN_MIC2_15
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -14128,12 +11559,12 @@
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
+775    0x000F    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
@@ -14174,19 +11605,19 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -14224,7 +11655,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
+866    0x13F4    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -14247,88 +11678,114 @@
 886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
 887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
 888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x2FA8    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x206C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 10    0x0800    //RX_PGA
@@ -14343,39 +11800,39 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14384,22 +11841,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -14433,24 +11890,24 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x03FC    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -14480,45 +11937,45 @@
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14527,22 +11984,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -14575,49 +12032,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0056    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14626,22 +12083,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -14674,49 +12131,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
+129    0x007D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14725,22 +12182,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -14773,49 +12230,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0029    //RX_SPK_VOL
+129    0x00B5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14824,22 +12281,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -14872,49 +12329,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0039    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x016A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -14923,22 +12380,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -14971,49 +12428,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005F    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x022A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -15022,22 +12479,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -15070,49 +12527,49 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x008E    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x032A    //RX_TDDRC_DRC_GAIN
+124    0x038C    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x3B3B    //RX_FDEQ_GAIN_1
-41    0x3942    //RX_FDEQ_GAIN_2
-42    0x4645    //RX_FDEQ_GAIN_3
-43    0x494A    //RX_FDEQ_GAIN_4
-44    0x5D5A    //RX_FDEQ_GAIN_5
-45    0x5B5B    //RX_FDEQ_GAIN_6
-46    0x5A51    //RX_FDEQ_GAIN_7
-47    0x514F    //RX_FDEQ_GAIN_8
-48    0x5555    //RX_FDEQ_GAIN_9
-49    0x5052    //RX_FDEQ_GAIN_10
-50    0x5453    //RX_FDEQ_GAIN_11
-51    0x514E    //RX_FDEQ_GAIN_12
-52    0x4F59    //RX_FDEQ_GAIN_13
-53    0x6C76    //RX_FDEQ_GAIN_14
-54    0x787B    //RX_FDEQ_GAIN_15
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -15121,22 +12578,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -15172,14 +12629,14 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x027C    //RX_RECVFUNC_MODE_0
+157    0x247C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 167    0x0800    //RX_PGA
@@ -15194,39 +12651,39 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15235,22 +12692,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15284,24 +12741,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03FC    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -15331,45 +12788,45 @@
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15378,22 +12835,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15426,49 +12883,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0056    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15477,22 +12934,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15525,49 +12982,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001D    //RX_SPK_VOL
+286    0x007D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15576,22 +13033,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15624,49 +13081,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0029    //RX_SPK_VOL
+286    0x00B5    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15675,22 +13132,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15723,49 +13180,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0039    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
+269    0x0000    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x016A    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15774,22 +13231,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15822,49 +13279,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005F    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
+269    0x0000    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x022A    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15873,22 +13330,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -15921,49 +13378,49 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x008E    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x038C    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x5454    //RX_FDEQ_GAIN_4
-201    0x7C54    //RX_FDEQ_GAIN_5
-202    0x4850    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x6060    //RX_FDEQ_GAIN_10
-207    0x6060    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5450    //RX_FDEQ_GAIN_13
-210    0x5050    //RX_FDEQ_GAIN_14
-211    0x5860    //RX_FDEQ_GAIN_15
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -15972,22 +13429,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -16023,17 +13480,16 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HANDSFREE-HANDFREE-VOICE_GENERIC-FB
-#PARAM_MODE  FULL
-#PARAM_TYPE TX+2RX
-#TOTAL_CUSTOM_STEP 7+7
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM1-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x4B7C    //TX_SENDFUNC_MODE_0
+3    0x6B74    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0003    //TX_NUM_MIC
+5    0x0002    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -16049,7 +13505,7 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
+21    0x0096    //TX_DIST2REF1
 22    0x0010    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
@@ -16058,9 +13514,9 @@
 27    0x0A19    //TX_PGA_0
 28    0x0A19    //TX_PGA_1
 29    0x0A19    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -16166,11 +13622,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -16425,7 +13881,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -16552,10 +14008,10 @@
 521    0x3A98    //TX_GSC_RTOL_TH
 522    0x3A98    //TX_GSC_RTOH_TH
 523    0x7E2C    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -16573,26 +14029,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -16700,15 +14156,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4645    //TX_PREEQ_GAIN_MIC1_6
-673    0x4442    //TX_PREEQ_GAIN_MIC1_7
-674    0x4140    //TX_PREEQ_GAIN_MIC1_8
-675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
-676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
-677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3938    //TX_PREEQ_GAIN_MIC1_12
-679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
-680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -16718,23 +14174,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -16851,12 +14307,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -16934,7 +14390,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -16961,35 +14417,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -17016,8 +14498,8 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF400    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x00C8    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -17842,163 +15324,163 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x006C    //_
-158    0x0000    //_
-159    0x0004    //_
-160    0x0004    //_
-161    0x000A    //_
-162    0x0000    //_
-163    0x4000    //_
-164    0x4000    //_
-165    0x4000    //_
-166    0x4000    //_
-167    0x065B    //_
-168    0x7E56    //_
-169    0x4000    //_
-170    0x7800    //_
-171    0x7000    //_
-172    0x6000    //_
-173    0x0008    //_
-174    0x0003    //_
-175    0x0100    //_
-176    0x0020    //_
-177    0x0400    //_
-178    0x000C    //_
-179    0x0014    //_
-180    0xF400    //_
-181    0x7E00    //_
-182    0x000A    //_
-183    0x0190    //_
-184    0x7EB8    //_
-185    0x7EB8    //_
-186    0x7EB8    //_
-187    0x0002    //_
-188    0x0800    //_
-189    0x7EB8    //_
-190    0x7FFF    //_
-191    0x0800    //_
-192    0x199A    //_
-193    0x0000    //_
-194    0x4000    //_
-195    0x0020    //_
-196    0x4848    //_
-197    0x4848    //_
-198    0x4848    //_
-199    0x4870    //_
-200    0x4848    //_
-201    0x4848    //_
-202    0x4850    //_
-203    0x485C    //_
-204    0x5C60    //_
-205    0x685C    //_
-206    0x5640    //_
-207    0x4040    //_
-208    0x5C58    //_
-209    0x5C60    //_
-210    0x6060    //_
-211    0x6060    //_
-212    0x4848    //_
-213    0x4848    //_
-214    0x4848    //_
-215    0x4848    //_
-216    0x4848    //_
-217    0x4848    //_
-218    0x4848    //_
-219    0x4848    //_
-220    0x0202    //_
-221    0x0203    //_
-222    0x0303    //_
-223    0x0402    //_
-224    0x0504    //_
-225    0x0209    //_
-226    0x0808    //_
-227    0x090A    //_
-228    0x0B0C    //_
-229    0x0D0E    //_
-230    0x1013    //_
-231    0x1719    //_
-232    0x1B1E    //_
-233    0x1E1E    //_
-234    0x1E28    //_
-235    0x282C    //_
-236    0x0000    //_
-237    0x0000    //_
-238    0x0000    //_
-239    0x0000    //_
-240    0x0000    //_
-241    0x0000    //_
-242    0x0000    //_
-243    0x0000    //_
-244    0x4000    //_
-245    0x0320    //_
-246    0x0018    //_
-247    0x0030    //_
-248    0x0050    //_
-249    0x0080    //_
-250    0x0004    //_
-251    0x5000    //_
-252    0x5000    //_
-253    0x2000    //_
-254    0x5000    //_
-255    0x6400    //_
-256    0x6400    //_
-257    0x2000    //_
-258    0x5000    //_
-259    0x4000    //_
-260    0x4000    //_
-261    0x4000    //_
-262    0x4000    //_
-263    0x7FFF    //_
-264    0x7FFF    //_
-265    0x7FFF    //_
-266    0x7FFF    //_
-267    0x0000    //_
-268    0x0002    //_
-269    0x0001    //_
-270    0x0002    //_
-271    0x1800    //_
-272    0x1800    //_
-273    0x6000    //_
-274    0x6E00    //_
-275    0x4000    //_
-276    0x7EB8    //_
-277    0x0000    //_
-278    0x199A    //_
-279    0x0001    //_
-280    0x0CCD    //_
-281    0x03C3    //_
-282    0x7C00    //_
-283    0x2000    //_
-284    0x2000    //_
-285    0x0080    //_
-286    0x0012    //_
-287    0x0000    //_
-288    0x0000    //_
-289    0x3000    //_
-290    0x3000    //_
-291    0x1800    //_
-292    0x1000    //_
-293    0x04CD    //_
-294    0x0F33    //_
-295    0x7333    //_
-296    0x199A    //_
-297    0x7333    //_
-298    0x0004    //_
-299    0x6CCD    //_
-300    0x799A    //_
-301    0x001E    //_
-302    0x3000    //_
-303    0x3200    //_
-304    0x2000    //_
-305    0x2000    //_
-306    0x2000    //_
-307    0x2000    //_
-308    0x2000    //_
-309    0x2000    //_
-310    0x2000    //_
-311    0x0000    //_
-312    0x0000    //_
-313    0x0000    //_
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 163    0x4000    //RX_TDDRC_ALPHA_UP_1
 164    0x4000    //RX_TDDRC_ALPHA_UP_2
@@ -18693,3 +16175,13478 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6F7C    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7530    //TX_DTD_THR1_0
+198    0x7530    //TX_DTD_THR1_1
+199    0x6978    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x2328    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2710    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x0000    //TX_A_POST_FILT_0
+313    0x0000    //TX_A_POST_FILT_1
+314    0x0000    //TX_A_POST_FILT_S_0
+315    0x0000    //TX_A_POST_FILT_S_1
+316    0x0000    //TX_A_POST_FILT_S_2
+317    0x0000    //TX_A_POST_FILT_S_3
+318    0x0000    //TX_A_POST_FILT_S_4
+319    0x0000    //TX_A_POST_FILT_S_5
+320    0x0000    //TX_A_POST_FILT_S_6
+321    0x0000    //TX_A_POST_FILT_S_7
+322    0x0000    //TX_B_POST_FILT_0
+323    0x0000    //TX_B_POST_FILT_1
+324    0x0000    //TX_B_POST_FILT_2
+325    0x0000    //TX_B_POST_FILT_3
+326    0x0000    //TX_B_POST_FILT_4
+327    0x0000    //TX_B_POST_FILT_5
+328    0x0000    //TX_B_POST_FILT_6
+329    0x0000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x2FA8    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0056    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x022A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x038C    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x247C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0056    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x007D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00B5    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x016A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x022A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x038C    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-CUSTOM2-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B5C    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4849    //TX_PREEQ_GAIN_MIC0_6
+624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
+625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
+627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
+629    0x4838    //TX_PREEQ_GAIN_MIC0_12
+630    0x3858    //TX_PREEQ_GAIN_MIC0_13
+631    0x7060    //TX_PREEQ_GAIN_MIC0_14
+632    0x9870    //TX_PREEQ_GAIN_MIC0_15
+633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0074    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE1-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6F54    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x1000    //TX_PGA_0
+28    0x1000    //TX_PGA_1
+29    0x1000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0100    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7530    //TX_DTD_THR1_0
+198    0x7530    //TX_DTD_THR1_1
+199    0x6978    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7E00    //TX_DTD_THR2_1
+206    0x5000    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x2328    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x2710    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0003    //TX_TDDRC_THRD_0
+855    0x0004    //TX_TDDRC_THRD_1
+856    0x1000    //TX_TDDRC_THRD_2
+857    0x1000    //TX_TDDRC_THRD_3
+858    0x6000    //TX_TDDRC_SLANT_0
+859    0x6000    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x13F4    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x2FA8    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0056    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x022A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x038C    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x247C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0056    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x007D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00B5    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x016A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x022A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x038C    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE1-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x6B54    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0010    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0A19    //TX_PGA_0
+28    0x0A19    //TX_PGA_1
+29    0x0A19    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0002    //TX_MIC_DATA_SRC0
+42    0x0000    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0300    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x4000    //TX_MIN_EQ_RE_EST_3
+156    0x4000    //TX_MIN_EQ_RE_EST_4
+157    0x7FFF    //TX_MIN_EQ_RE_EST_5
+158    0x7FFF    //TX_MIN_EQ_RE_EST_6
+159    0x7FFF    //TX_MIN_EQ_RE_EST_7
+160    0x7FFF    //TX_MIN_EQ_RE_EST_8
+161    0x7FFF    //TX_MIN_EQ_RE_EST_9
+162    0x7FFF    //TX_MIN_EQ_RE_EST_10
+163    0x7FFF    //TX_MIN_EQ_RE_EST_11
+164    0x7FFF    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0CCD    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x0180    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x09C4    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7D00    //TX_DTD_THR1_0
+198    0x7FF0    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0DAC    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x2000    //TX_B_POST_FILT_ECHO_L
+229    0x2000    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0063    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFB00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0100    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0016    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x0014    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000F    //TX_MIN_GAIN_S_0
+290    0x0010    //TX_MIN_GAIN_S_1
+291    0x0010    //TX_MIN_GAIN_S_2
+292    0x0010    //TX_MIN_GAIN_S_3
+293    0x0010    //TX_MIN_GAIN_S_4
+294    0x0010    //TX_MIN_GAIN_S_5
+295    0x0010    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x4000    //TX_SNRI_SUP_1
+302    0x4000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x50C0    //TX_SNRI_SUP_5
+306    0x4000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x5000    //TX_A_POST_FILT_S_0
+315    0x4C00    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x7000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7C00    //TX_LAMBDA_PFILT
+339    0x7C00    //TX_LAMBDA_PFILT_S_0
+340    0x7C00    //TX_LAMBDA_PFILT_S_1
+341    0x7A00    //TX_LAMBDA_PFILT_S_2
+342    0x7C00    //TX_LAMBDA_PFILT_S_3
+343    0x7C00    //TX_LAMBDA_PFILT_S_4
+344    0x7C00    //TX_LAMBDA_PFILT_S_5
+345    0x7C00    //TX_LAMBDA_PFILT_S_6
+346    0x7C00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
+356    0x0200    //TX_DT_BINVAD_TH_3
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x0100    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x0DAC    //TX_NOISE_TH_2
+372    0x4E20    //TX_NOISE_TH_3
+373    0x4E20    //TX_NOISE_TH_4
+374    0x59D8    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x2710    //TX_NOISE_TH_6
+379    0x0033    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x4000    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x7FFF    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x5048    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x5B5B    //TX_FDEQ_GAIN_10
+578    0x737B    //TX_FDEQ_GAIN_11
+579    0x7B9A    //TX_FDEQ_GAIN_12
+580    0x9AC4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x484B    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x484C    //TX_PREEQ_GAIN_MIC0_10
+628    0x4C4C    //TX_PREEQ_GAIN_MIC0_11
+629    0x4038    //TX_PREEQ_GAIN_MIC0_12
+630    0x3838    //TX_PREEQ_GAIN_MIC0_13
+631    0x4840    //TX_PREEQ_GAIN_MIC0_14
+632    0x3848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x4000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0010    //TX_DEADMIC_SILENCE_TH
+817    0x0600    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0004    //TX_FILTINDX
+854    0x0004    //TX_TDDRC_THRD_0
+855    0x0016    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0FDA    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x006C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+10    0x065B    //RX_PGA
+11    0x7E56    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0014    //RX_NS_LVL_CTRL
+23    0xF400    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x00C8    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0012    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0025    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0034    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x004D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0074    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x4000    //RX_TDDRC_ALPHA_UP_1
+7    0x4000    //RX_TDDRC_ALPHA_UP_2
+8    0x4000    //RX_TDDRC_ALPHA_UP_3
+9    0x4000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0001    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x4000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03C3    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4850    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5640    //RX_FDEQ_GAIN_10
+50    0x4040    //RX_FDEQ_GAIN_11
+51    0x5C58    //RX_FDEQ_GAIN_12
+52    0x5C60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x6060    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0402    //RX_FDEQ_BIN_3
+67    0x0504    //RX_FDEQ_BIN_4
+68    0x0209    //RX_FDEQ_BIN_5
+69    0x0808    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x006C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+167    0x065B    //RX_PGA
+168    0x7E56    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0014    //RX_NS_LVL_CTRL
+180    0xF400    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x00C8    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0012    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0025    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0034    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x004D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0074    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x4000    //RX_TDDRC_ALPHA_UP_1
+164    0x4000    //RX_TDDRC_ALPHA_UP_2
+165    0x4000    //RX_TDDRC_ALPHA_UP_3
+166    0x4000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0001    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x4000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03C3    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4850    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5640    //RX_FDEQ_GAIN_10
+207    0x4040    //RX_FDEQ_GAIN_11
+208    0x5C58    //RX_FDEQ_GAIN_12
+209    0x5C60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x6060    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0402    //RX_FDEQ_BIN_3
+224    0x0504    //RX_FDEQ_BIN_4
+225    0x0209    //RX_FDEQ_BIN_5
+226    0x0808    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HANDSFREE-HANDSFREE-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF3    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x6CCC    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x27D0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x047C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0056    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x022A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x038C    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x047C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0056    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x007D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00B5    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x016A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x022A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x038C    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
diff --git a/audio/tegu/tuning/fortemedia/HEADSET.dat b/audio/tegu/tuning/fortemedia/HEADSET.dat
index 22e3e30..78df6fc 100644
Binary files a/audio/tegu/tuning/fortemedia/HEADSET.dat and b/audio/tegu/tuning/fortemedia/HEADSET.dat differ
diff --git a/audio/tegu/tuning/fortemedia/HEADSET.mods b/audio/tegu/tuning/fortemedia/HEADSET.mods
index ac10ce5..a3999d0 100644
--- a/audio/tegu/tuning/fortemedia/HEADSET.mods
+++ b/audio/tegu/tuning/fortemedia/HEADSET.mods
@@ -1,17 +1,18 @@
 #PLATFORM_NAME  gChip
+#SINGLE_API_VER  1.4.2
 #EXPORT_FLAG  HEADSET
-#SINGLE_API_VER  1.2.0
-#SAVE_TIME  2022-02-11 16:30:04
+#PARAM_MODE   FULL
+#SAVE_MODE  3
+#SAVE_TIME  2024-02-22 17:40:34
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-NB
-#PARAM_MODE  FULL
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -38,9 +39,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -146,11 +147,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -290,7 +291,7 @@
 279    0x0400    //TX_B_POST_FLT_0
 280    0x0400    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
+282    0x0020    //TX_NS_LVL_CTRL_1
 283    0x0016    //TX_NS_LVL_CTRL_2
 284    0x0014    //TX_NS_LVL_CTRL_3
 285    0x0010    //TX_NS_LVL_CTRL_4
@@ -298,19 +299,19 @@
 287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0010    //TX_NS_LVL_CTRL_7
 289    0x000D    //TX_MIN_GAIN_S_0
-290    0x0012    //TX_MIN_GAIN_S_1
-291    0x0012    //TX_MIN_GAIN_S_2
+290    0x0008    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
 292    0x0012    //TX_MIN_GAIN_S_3
 293    0x000D    //TX_MIN_GAIN_S_4
 294    0x000D    //TX_MIN_GAIN_S_5
 295    0x0012    //TX_MIN_GAIN_S_6
 296    0x000D    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
+297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
 301    0x5000    //TX_SNRI_SUP_1
-302    0x5000    //TX_SNRI_SUP_2
+302    0x7000    //TX_SNRI_SUP_2
 303    0x6000    //TX_SNRI_SUP_3
 304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
@@ -323,7 +324,7 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x1000    //TX_A_POST_FILT_S_1
+315    0x2000    //TX_A_POST_FILT_S_1
 316    0x7000    //TX_A_POST_FILT_S_2
 317    0x4000    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
@@ -331,7 +332,7 @@
 320    0x7FFF    //TX_A_POST_FILT_S_6
 321    0x4000    //TX_A_POST_FILT_S_7
 322    0x0400    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
+323    0x1800    //TX_B_POST_FILT_1
 324    0x2000    //TX_B_POST_FILT_2
 325    0x4000    //TX_B_POST_FILT_3
 326    0x2000    //TX_B_POST_FILT_4
@@ -348,8 +349,8 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E14    //TX_LAMBDA_PFILT
 339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x6000    //TX_LAMBDA_PFILT_S_2
+340    0x7000    //TX_LAMBDA_PFILT_S_1
+341    0x7000    //TX_LAMBDA_PFILT_S_2
 342    0x7C29    //TX_LAMBDA_PFILT_S_3
 343    0x7C29    //TX_LAMBDA_PFILT_S_4
 344    0x7C29    //TX_LAMBDA_PFILT_S_5
@@ -375,7 +376,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x003B    //TX_NOISE_TH_0
+367    0x0028    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0900    //TX_NOISE_TH_1
@@ -405,7 +406,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -414,9 +415,9 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0032    //TX_MINENOISE_MIC0_TH
+406    0x0014    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+408    0x2900    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
 410    0x4848    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
@@ -532,10 +533,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -553,26 +554,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -779,12 +780,12 @@
 768    0x0065    //TX_MIC_CALIBRATION_3
 769    0x0044    //TX_MIC_PWR_BIAS_0
 770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x000B    //TX_GAIN_LIMIT_0
-774    0x000B    //TX_GAIN_LIMIT_1
-775    0x000B    //TX_GAIN_LIMIT_2
-776    0x000B    //TX_GAIN_LIMIT_3
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0007    //TX_GAIN_LIMIT_2
+776    0x0007    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -831,12 +832,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -914,7 +915,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -941,37 +942,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x242C    //RX_RECVFUNC_MODE_0
+0    0xA43C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -993,11 +1020,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -1015,11 +1042,11 @@
 41    0x4848    //RX_FDEQ_GAIN_2
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
+44    0x4748    //RX_FDEQ_GAIN_5
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1043,7 +1070,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1162,7 +1189,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1186,7 +1213,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1225,7 +1252,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0009    //RX_SPK_VOL
+129    0x000A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1261,7 +1288,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1285,7 +1312,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1324,7 +1351,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000F    //RX_SPK_VOL
+129    0x0010    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1360,7 +1387,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1384,7 +1411,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1423,7 +1450,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0019    //RX_SPK_VOL
+129    0x001A    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1459,7 +1486,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1483,7 +1510,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1522,7 +1549,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002B    //RX_SPK_VOL
+129    0x002C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1558,7 +1585,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1582,7 +1609,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1621,7 +1648,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0048    //RX_SPK_VOL
+129    0x0049    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1657,7 +1684,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1681,7 +1708,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1720,7 +1747,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x007A    //RX_SPK_VOL
+129    0x007C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -1756,7 +1783,7 @@
 45    0x4848    //RX_FDEQ_GAIN_6
 46    0x4848    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4040    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -1780,7 +1807,7 @@
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x0D0E    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -1822,7 +1849,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x242C    //RX_RECVFUNC_MODE_0
+157    0xA43C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -1844,11 +1871,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -1866,11 +1893,11 @@
 198    0x4848    //RX_FDEQ_GAIN_2
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
+201    0x4748    //RX_FDEQ_GAIN_5
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -1894,7 +1921,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2013,7 +2040,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2037,7 +2064,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2076,7 +2103,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0009    //RX_SPK_VOL
+286    0x000A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -2112,7 +2139,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2136,7 +2163,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2175,7 +2202,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000F    //RX_SPK_VOL
+286    0x0010    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -2211,7 +2238,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2235,7 +2262,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2274,7 +2301,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0019    //RX_SPK_VOL
+286    0x001A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -2310,7 +2337,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2334,7 +2361,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2373,7 +2400,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x002B    //RX_SPK_VOL
+286    0x002C    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -2409,7 +2436,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2433,7 +2460,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2472,7 +2499,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0048    //RX_SPK_VOL
+286    0x0049    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -2508,7 +2535,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2532,7 +2559,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2571,7 +2598,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x007A    //RX_SPK_VOL
+286    0x007C    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -2607,7 +2634,7 @@
 202    0x4848    //RX_FDEQ_GAIN_6
 203    0x4848    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4040    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -2631,7 +2658,7 @@
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
 228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
+229    0x0D0E    //RX_FDEQ_BIN_9
 230    0x0000    //RX_FDEQ_BIN_10
 231    0x0000    //RX_FDEQ_BIN_11
 232    0x0000    //RX_FDEQ_BIN_12
@@ -2674,14 +2701,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-WB
-#PARAM_MODE  FULL
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -2708,9 +2734,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -2816,11 +2842,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -2921,7 +2947,7 @@
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
 242    0xFA00    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
+243    0xF400    //TX_THR_SN_EST_1
 244    0xF700    //TX_THR_SN_EST_2
 245    0xFC00    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
@@ -2931,7 +2957,7 @@
 250    0x0000    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0100    //TX_DELTA_THR_SN_EST_6
@@ -2960,28 +2986,28 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0014    //TX_NS_LVL_CTRL_1
+282    0x001C    //TX_NS_LVL_CTRL_1
 283    0x001C    //TX_NS_LVL_CTRL_2
-284    0x0012    //TX_NS_LVL_CTRL_3
+284    0x0020    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
 287    0x0018    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
+290    0x0004    //TX_MIN_GAIN_S_1
 291    0x000C    //TX_MIN_GAIN_S_2
-292    0x0009    //TX_MIN_GAIN_S_3
+292    0x000C    //TX_MIN_GAIN_S_3
 293    0x000C    //TX_MIN_GAIN_S_4
 294    0x000C    //TX_MIN_GAIN_S_5
 295    0x000C    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
+297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x3000    //TX_SNRI_SUP_1
 302    0x2000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
+303    0x5000    //TX_SNRI_SUP_3
 304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
 306    0x7FFF    //TX_SNRI_SUP_6
@@ -2993,7 +3019,7 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
+315    0x2000    //TX_A_POST_FILT_S_1
 316    0x5000    //TX_A_POST_FILT_S_2
 317    0x5000    //TX_A_POST_FILT_S_3
 318    0x5000    //TX_A_POST_FILT_S_4
@@ -3001,9 +3027,9 @@
 320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x3000    //TX_B_POST_FILT_1
 324    0x3000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
+325    0x4000    //TX_B_POST_FILT_3
 326    0x1000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -3026,7 +3052,7 @@
 345    0x7F00    //TX_LAMBDA_PFILT_S_6
 346    0x7B00    //TX_LAMBDA_PFILT_S_7
 347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
+348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0800    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -3045,13 +3071,13 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0102    //TX_NOISE_TH_0
+367    0x0096    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x0900    //TX_NOISE_TH_1
 371    0x009B    //TX_NOISE_TH_2
-372    0x4149    //TX_NOISE_TH_3
-373    0x0331    //TX_NOISE_TH_4
+372    0x36B0    //TX_NOISE_TH_3
+373    0x03C0    //TX_NOISE_TH_4
 374    0x542C    //TX_NOISE_TH_5
 375    0x55E5    //TX_NOISE_TH_5_2
 376    0x7FFF    //TX_NOISE_TH_5_3
@@ -3075,7 +3101,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -3084,7 +3110,7 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x00DC    //TX_MINENOISE_MIC0_TH
+406    0x0006    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -3202,10 +3228,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -3223,26 +3249,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -3449,12 +3475,12 @@
 768    0x0062    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
 770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
+771    0x0048    //TX_MIC_PWR_BIAS_2
+772    0x0048    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0000    //TX_GAIN_LIMIT_1
+775    0x0003    //TX_GAIN_LIMIT_2
+776    0x0003    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -3501,12 +3527,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -3584,7 +3610,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -3611,37 +3637,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x242C    //RX_RECVFUNC_MODE_0
+0    0xA43C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -3663,11 +3715,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -3832,10 +3884,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3895,7 +3947,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000A    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -3931,10 +3983,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -3994,7 +4046,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0011    //RX_SPK_VOL
+129    0x0012    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4030,10 +4082,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -4093,7 +4145,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001D    //RX_SPK_VOL
+129    0x001E    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4129,10 +4181,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -4192,7 +4244,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0030    //RX_SPK_VOL
+129    0x0031    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4228,10 +4280,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -4291,7 +4343,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0050    //RX_SPK_VOL
+129    0x0052    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4327,10 +4379,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -4390,7 +4442,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0087    //RX_SPK_VOL
+129    0x008B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4426,10 +4478,10 @@
 45    0x484B    //RX_FDEQ_GAIN_6
 46    0x4B48    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4846    //RX_FDEQ_GAIN_10
 50    0x403F    //RX_FDEQ_GAIN_11
-51    0x3F40    //RX_FDEQ_GAIN_12
+51    0x3F3F    //RX_FDEQ_GAIN_12
 52    0x4248    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
@@ -4492,7 +4544,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x242C    //RX_RECVFUNC_MODE_0
+157    0xA43C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -4514,11 +4566,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -4683,10 +4735,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -4782,10 +4834,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -4845,7 +4897,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0011    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4881,10 +4933,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -4944,7 +4996,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001D    //RX_SPK_VOL
+286    0x001E    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -4980,10 +5032,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -5043,7 +5095,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0030    //RX_SPK_VOL
+286    0x0031    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -5079,10 +5131,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -5142,7 +5194,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0050    //RX_SPK_VOL
+286    0x0052    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -5178,10 +5230,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -5241,7 +5293,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0087    //RX_SPK_VOL
+286    0x008B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -5277,10 +5329,10 @@
 202    0x484B    //RX_FDEQ_GAIN_6
 203    0x4B48    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4846    //RX_FDEQ_GAIN_10
 207    0x403F    //RX_FDEQ_GAIN_11
-208    0x3F40    //RX_FDEQ_GAIN_12
+208    0x3F3F    //RX_FDEQ_GAIN_12
 209    0x4248    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
@@ -5344,14 +5396,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x6B68    //TX_SENDFUNC_MODE_0
+3    0x6F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
@@ -5378,9 +5429,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -5486,11 +5537,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -5545,9 +5596,9 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7D00    //TX_DTD_THR1_0
+197    0x6590    //TX_DTD_THR1_0
 198    0x7D00    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
+199    0x6590    //TX_DTD_THR1_2
 200    0x7FFF    //TX_DTD_THR1_3
 201    0x7FFF    //TX_DTD_THR1_4
 202    0x7FFF    //TX_DTD_THR1_5
@@ -5601,7 +5652,7 @@
 250    0x0000    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0100    //TX_DELTA_THR_SN_EST_6
@@ -5632,10 +5683,10 @@
 281    0x000F    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
 283    0x0018    //TX_NS_LVL_CTRL_2
-284    0x0012    //TX_NS_LVL_CTRL_3
+284    0x0018    //TX_NS_LVL_CTRL_3
 285    0x000F    //TX_NS_LVL_CTRL_4
 286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x0018    //TX_NS_LVL_CTRL_6
+287    0x001C    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000C    //TX_MIN_GAIN_S_0
 290    0x000F    //TX_MIN_GAIN_S_1
@@ -5645,16 +5696,16 @@
 294    0x000C    //TX_MIN_GAIN_S_5
 295    0x000C    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
+297    0x6000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x6000    //TX_SNRI_SUP_1
+301    0x5000    //TX_SNRI_SUP_1
 302    0x5000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
+303    0x4000    //TX_SNRI_SUP_3
 304    0x7FFF    //TX_SNRI_SUP_4
 305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
+306    0x3000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x000E    //TX_G_LFNS
@@ -5671,9 +5722,9 @@
 320    0x4000    //TX_A_POST_FILT_S_6
 321    0x5000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
+323    0x2000    //TX_B_POST_FILT_1
 324    0x3000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
+325    0x3000    //TX_B_POST_FILT_3
 326    0x1000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -5715,13 +5766,13 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0190    //TX_NDETCT
-367    0x0383    //TX_NOISE_TH_0
+367    0x00FA    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
+370    0x0C80    //TX_NOISE_TH_1
 371    0x00C8    //TX_NOISE_TH_2
-372    0x2904    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x07D0    //TX_NOISE_TH_4
 374    0x157C    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x7FFF    //TX_NOISE_TH_5_3
@@ -5745,7 +5796,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -5754,7 +5805,7 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x02F3    //TX_MINENOISE_MIC0_TH
+406    0x0064    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0800    //TX_METAL_RTO_THR
@@ -5872,10 +5923,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -5893,26 +5944,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -6118,13 +6169,13 @@
 767    0x0062    //TX_MIC_CALIBRATION_2
 768    0x0062    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
+770    0x0050    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
 779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
@@ -6171,12 +6222,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -6254,7 +6305,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -6281,37 +6332,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x242C    //RX_RECVFUNC_MODE_0
+0    0xA43C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -6333,11 +6410,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -6437,7 +6514,7 @@
 123    0x0CCD    //RX_TDDRC_SMT_W
 124    0x023E    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x280A    //RX_TPKA_FP
+126    0x0D90    //RX_TPKA_FP
 127    0x032D    //RX_MIN_G_FP
 128    0x0A00    //RX_MAX_G_FP
 129    0x000B    //RX_SPK_VOL
@@ -6491,7 +6568,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -6590,7 +6667,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -6689,7 +6766,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -6763,7 +6840,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001C    //RX_SPK_VOL
+129    0x001D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -6788,7 +6865,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -6862,7 +6939,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002F    //RX_SPK_VOL
+129    0x0030    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -6887,7 +6964,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -6961,7 +7038,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004F    //RX_SPK_VOL
+129    0x0050    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -6986,7 +7063,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -7060,7 +7137,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0086    //RX_SPK_VOL
+129    0x0089    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -7085,7 +7162,7 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0214    //RX_TDDRC_DRC_GAIN
+124    0x04CA    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x6270    //RX_FDEQ_GAIN_0
 40    0x7A70    //RX_FDEQ_GAIN_1
@@ -7162,7 +7239,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x242C    //RX_RECVFUNC_MODE_0
+157    0xA43C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -7184,11 +7261,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0x9000    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -7288,7 +7365,7 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x023E    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x280A    //RX_TPKA_FP
+283    0x0D90    //RX_TPKA_FP
 284    0x032D    //RX_MIN_G_FP
 285    0x0A00    //RX_MAX_G_FP
 286    0x000B    //RX_SPK_VOL
@@ -7342,7 +7419,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -7441,7 +7518,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -7540,7 +7617,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -7614,7 +7691,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001C    //RX_SPK_VOL
+286    0x001D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -7639,7 +7716,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -7713,7 +7790,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x002F    //RX_SPK_VOL
+286    0x0030    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -7738,7 +7815,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -7812,7 +7889,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004F    //RX_SPK_VOL
+286    0x0050    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -7837,7 +7914,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -7911,7 +7988,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0086    //RX_SPK_VOL
+286    0x0089    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -7936,7 +8013,7 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0214    //RX_TDDRC_DRC_GAIN
+281    0x04CA    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x6270    //RX_FDEQ_GAIN_0
 197    0x7A70    //RX_FDEQ_GAIN_1
@@ -8014,7 +8091,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-USB_BLACKBIRD-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -8048,9 +8124,9 @@
 27    0x0B4C    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -8140,7 +8216,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -8156,11 +8232,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -8415,7 +8491,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -8542,10 +8618,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -8563,26 +8639,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -8841,12 +8917,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -8924,7 +9000,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -8951,35 +9027,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x242C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -9003,11 +9105,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0500    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -9854,11 +9956,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0500    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -10683,19 +10785,18 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
-#PARAM_MODE  Full
+#CASE_NAME  HEADSET-USB_BLACKBIRD-RESERVE2-SWB
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
+1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x6F68    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
 9    0x000A    //TX_FRAME_SZ
 10    0x0000    //TX_DELAY_OPT
@@ -10717,10 +10818,10 @@
 26    0x0000    //TX_MMIC
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -10816,6 +10917,2701 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x6D60    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x6590    //TX_DTD_THR1_0
+198    0x7D00    //TX_DTD_THR1_1
+199    0x6590    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xF700    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0100    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0018    //TX_NS_LVL_CTRL_2
+284    0x0018    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x001C    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x0009    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x6000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x5000    //TX_SNRI_SUP_1
+302    0x5000    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x3000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x3000    //TX_B_POST_FILT_2
+325    0x3000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7000    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x00FA    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x2EE0    //TX_NOISE_TH_3
+373    0x07D0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0064    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4040    //TX_FDEQ_GAIN_6
+574    0x4040    //TX_FDEQ_GAIN_7
+575    0x4040    //TX_FDEQ_GAIN_8
+576    0x3838    //TX_FDEQ_GAIN_9
+577    0x3838    //TX_FDEQ_GAIN_10
+578    0x3828    //TX_FDEQ_GAIN_11
+579    0x2828    //TX_FDEQ_GAIN_12
+580    0x2828    //TX_FDEQ_GAIN_13
+581    0x1C1C    //TX_FDEQ_GAIN_14
+582    0x1C1C    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x284A    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0050    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0002    //TX_GAIN_LIMIT_1
+775    0x0000    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0020    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x803C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4E52    //RX_FDEQ_GAIN_0
+40    0x5252    //RX_FDEQ_GAIN_1
+41    0x5252    //RX_FDEQ_GAIN_2
+42    0x5250    //RX_FDEQ_GAIN_3
+43    0x4C46    //RX_FDEQ_GAIN_4
+44    0x4748    //RX_FDEQ_GAIN_5
+45    0x5768    //RX_FDEQ_GAIN_6
+46    0x6162    //RX_FDEQ_GAIN_7
+47    0x5252    //RX_FDEQ_GAIN_8
+48    0x5256    //RX_FDEQ_GAIN_9
+49    0x5248    //RX_FDEQ_GAIN_10
+50    0x3434    //RX_FDEQ_GAIN_11
+51    0x3436    //RX_FDEQ_GAIN_12
+52    0x2A18    //RX_FDEQ_GAIN_13
+53    0x1830    //RX_FDEQ_GAIN_14
+54    0x3648    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x023E    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x0D90    //RX_TPKA_FP
+127    0x032D    //RX_MIN_G_FP
+128    0x0A00    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000A    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0011    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x001D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0030    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0050    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0089    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7220    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1800    //RX_TDDRC_THRD_2
+115    0x1800    //RX_TDDRC_THRD_3
+116    0x7FFF    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x04CA    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x6270    //RX_FDEQ_GAIN_0
+40    0x7A70    //RX_FDEQ_GAIN_1
+41    0x7270    //RX_FDEQ_GAIN_2
+42    0x6A70    //RX_FDEQ_GAIN_3
+43    0x645A    //RX_FDEQ_GAIN_4
+44    0x5A5E    //RX_FDEQ_GAIN_5
+45    0x6E72    //RX_FDEQ_GAIN_6
+46    0x7268    //RX_FDEQ_GAIN_7
+47    0x665A    //RX_FDEQ_GAIN_8
+48    0x5A5A    //RX_FDEQ_GAIN_9
+49    0x5A64    //RX_FDEQ_GAIN_10
+50    0x6448    //RX_FDEQ_GAIN_11
+51    0x4949    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x284A    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x803C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4E52    //RX_FDEQ_GAIN_0
+197    0x5252    //RX_FDEQ_GAIN_1
+198    0x5252    //RX_FDEQ_GAIN_2
+199    0x5250    //RX_FDEQ_GAIN_3
+200    0x4C46    //RX_FDEQ_GAIN_4
+201    0x4748    //RX_FDEQ_GAIN_5
+202    0x5768    //RX_FDEQ_GAIN_6
+203    0x6162    //RX_FDEQ_GAIN_7
+204    0x5252    //RX_FDEQ_GAIN_8
+205    0x5256    //RX_FDEQ_GAIN_9
+206    0x5248    //RX_FDEQ_GAIN_10
+207    0x3434    //RX_FDEQ_GAIN_11
+208    0x3436    //RX_FDEQ_GAIN_12
+209    0x2A18    //RX_FDEQ_GAIN_13
+210    0x1830    //RX_FDEQ_GAIN_14
+211    0x3648    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x023E    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x0D90    //RX_TPKA_FP
+284    0x032D    //RX_MIN_G_FP
+285    0x0A00    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000A    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0011    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x001D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0030    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0050    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0089    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7220    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1800    //RX_TDDRC_THRD_2
+272    0x1800    //RX_TDDRC_THRD_3
+273    0x7FFF    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x04CA    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x6270    //RX_FDEQ_GAIN_0
+197    0x7A70    //RX_FDEQ_GAIN_1
+198    0x7270    //RX_FDEQ_GAIN_2
+199    0x6A70    //RX_FDEQ_GAIN_3
+200    0x645A    //RX_FDEQ_GAIN_4
+201    0x5A5E    //RX_FDEQ_GAIN_5
+202    0x6E72    //RX_FDEQ_GAIN_6
+203    0x7268    //RX_FDEQ_GAIN_7
+204    0x665A    //RX_FDEQ_GAIN_8
+205    0x5A5A    //RX_FDEQ_GAIN_9
+206    0x5A64    //RX_FDEQ_GAIN_10
+207    0x6448    //RX_FDEQ_GAIN_11
+208    0x4949    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x284A    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
 128    0x7646    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x7CCC    //TX_THR_PITCH_DET_0
@@ -10826,11 +13622,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -11085,7 +13881,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -11212,10 +14008,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -11233,26 +14029,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
 567    0x6048    //TX_FDEQ_GAIN_0
@@ -11262,9 +14058,9 @@
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
 573    0x4844    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4040    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
+574    0x4242    //TX_FDEQ_GAIN_7
+575    0x3C34    //TX_FDEQ_GAIN_8
+576    0x343A    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -11511,12 +14307,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -11554,7 +14350,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x0650    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -11594,7 +14390,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -11621,37 +14417,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -11673,11 +14495,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -11839,10 +14661,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -11938,10 +14760,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -12037,10 +14859,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -12136,10 +14958,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -12235,10 +15057,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -12334,10 +15156,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -12433,10 +15255,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -12502,7 +15324,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -12524,11 +15346,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -12690,10 +15512,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -12789,10 +15611,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -12888,10 +15710,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -12987,10 +15809,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -13086,10 +15908,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -13185,10 +16007,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -13284,10 +16106,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -13354,14 +16176,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2B28    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -13388,9 +16209,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -13480,7 +16301,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -13496,11 +16317,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -13755,7 +16576,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -13882,10 +16703,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -13903,29 +16724,29 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
-567    0x5850    //TX_FDEQ_GAIN_0
+567    0x6056    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
@@ -14181,12 +17002,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -14224,7 +17045,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x0619    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -14264,7 +17085,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -14291,37 +17112,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -14343,11 +17190,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -15172,7 +18019,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA024    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -15194,11 +18041,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -16024,14 +18871,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2B28    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
@@ -16058,9 +18904,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -16150,7 +18996,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -16166,11 +19012,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -16425,7 +19271,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -16552,10 +19398,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -16573,26 +19419,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -16851,12 +19697,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -16934,7 +19780,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -16961,37 +19807,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -17013,11 +19885,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -17842,7 +20714,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -17864,11 +20736,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0x9000    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -18694,14 +21566,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0020    //TX_PATCH_REG
-3    0x6B6A    //TX_SENDFUNC_MODE_0
+3    0x6B2A    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -18728,9 +21599,9 @@
 27    0x0B4C    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -18820,7 +21691,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -18836,11 +21707,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -19095,7 +21966,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -19222,10 +22093,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -19243,26 +22114,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -19521,12 +22392,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -19604,7 +22475,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -19631,37 +22502,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -19683,11 +22580,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0500    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -20512,7 +23409,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -20534,2681 +23431,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0500    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-NB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0000    //TX_SAMPLINGFREQ_SIG
-7    0x0000    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B80    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x7CCC    //TX_THR_PITCH_DET_0
-131    0x7000    //TX_THR_PITCH_DET_1
-132    0x6333    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0010    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x1000    //TX_THR_RE_EST
-152    0x1000    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x2000    //TX_C_POST_FLT
-168    0x2000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x0064    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x5000    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7F00    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x2000    //TX_DTD_THR2_0
-205    0x2000    //TX_DTD_THR2_1
-206    0x2000    //TX_DTD_THR2_2
-207    0x2000    //TX_DTD_THR2_3
-208    0x2000    //TX_DTD_THR2_4
-209    0x2000    //TX_DTD_THR2_5
-210    0x2000    //TX_DTD_THR2_6
-211    0x4100    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x1000    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0010    //TX_EPD_OFFSET_00
-233    0x0010    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xFA00    //TX_THR_SN_EST_5
-248    0xFA00    //TX_THR_SN_EST_6
-249    0xFA00    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0000    //TX_DELTA_THR_SN_EST_1
-252    0x0000    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
-254    0x0000    //TX_DELTA_THR_SN_EST_4
-255    0x0000    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0000    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x0400    //TX_B_POST_FLT_0
-280    0x0400    //TX_B_POST_FLT_1
-281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0010    //TX_NS_LVL_CTRL_1
-283    0x0010    //TX_NS_LVL_CTRL_2
-284    0x0010    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0010    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000D    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
-291    0x000D    //TX_MIN_GAIN_S_2
-292    0x000D    //TX_MIN_GAIN_S_3
-293    0x000D    //TX_MIN_GAIN_S_4
-294    0x000D    //TX_MIN_GAIN_S_5
-295    0x000D    //TX_MIN_GAIN_S_6
-296    0x000D    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0014    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x1000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x4000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x4000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x4000    //TX_A_POST_FILT_S_7
-322    0x0400    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x0400    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7E14    //TX_LAMBDA_PFILT
-339    0x7C29    //TX_LAMBDA_PFILT_S_0
-340    0x7C29    //TX_LAMBDA_PFILT_S_1
-341    0x7C29    //TX_LAMBDA_PFILT_S_2
-342    0x7C29    //TX_LAMBDA_PFILT_S_3
-343    0x7C29    //TX_LAMBDA_PFILT_S_4
-344    0x7C29    //TX_LAMBDA_PFILT_S_5
-345    0x7C29    //TX_LAMBDA_PFILT_S_6
-346    0x7C29    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x0FA0    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x4000    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x003B    //TX_NOISE_TH_0
-368    0x1B58    //TX_NOISE_TH_0_2
-369    0x2134    //TX_NOISE_TH_0_3
-370    0x02BC    //TX_NOISE_TH_1
-371    0x1F40    //TX_NOISE_TH_2
-372    0x4650    //TX_NOISE_TH_3
-373    0x7148    //TX_NOISE_TH_4
-374    0x044C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x0000    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x0032    //TX_NOISE_TH_6
-379    0x00C8    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
-385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
-387    0x0029    //TX_OUT_ENER_TH_NOISE
-388    0x00CE    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0032    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0280    //TX_N_HOLD_HS
-416    0x006E    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0333    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2400    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x2000    //TX_WTA_EN_RTO_TH
-429    0x1400    //TX_TOP_ENER_TH_F
-430    0x0064    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x003C    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x0D9A    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x2A3D    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x0000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0014    //TX_FDEQ_SUBNUM
-567    0x6048    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4844    //TX_FDEQ_GAIN_6
-574    0x4444    //TX_FDEQ_GAIN_7
-575    0x4040    //TX_FDEQ_GAIN_8
-576    0x3C3C    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0401    //TX_FDEQ_BIN_0
-592    0x0103    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
-601    0x0000    //TX_FDEQ_BIN_10
-602    0x0000    //TX_FDEQ_BIN_11
-603    0x0000    //TX_FDEQ_BIN_12
-604    0x0000    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0010    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0802    //TX_PREEQ_BIN_MIC0_7
-649    0x0000    //TX_PREEQ_BIN_MIC0_8
-650    0x0000    //TX_PREEQ_BIN_MIC0_9
-651    0x0000    //TX_PREEQ_BIN_MIC0_10
-652    0x0000    //TX_PREEQ_BIN_MIC0_11
-653    0x0000    //TX_PREEQ_BIN_MIC0_12
-654    0x0000    //TX_PREEQ_BIN_MIC0_13
-655    0x0000    //TX_PREEQ_BIN_MIC0_14
-656    0x0000    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0010    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0802    //TX_PREEQ_BIN_MIC1_7
-698    0x0000    //TX_PREEQ_BIN_MIC1_8
-699    0x0000    //TX_PREEQ_BIN_MIC1_9
-700    0x0000    //TX_PREEQ_BIN_MIC1_10
-701    0x0000    //TX_PREEQ_BIN_MIC1_11
-702    0x0000    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
-704    0x0000    //TX_PREEQ_BIN_MIC1_14
-705    0x0000    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0010    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0802    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
-749    0x0000    //TX_PREEQ_BIN_MIC2_10
-750    0x0000    //TX_PREEQ_BIN_MIC2_11
-751    0x0000    //TX_PREEQ_BIN_MIC2_12
-752    0x0000    //TX_PREEQ_BIN_MIC2_13
-753    0x0000    //TX_PREEQ_BIN_MIC2_14
-754    0x0000    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0065    //TX_MIC_CALIBRATION_0
-766    0x0065    //TX_MIC_CALIBRATION_1
-767    0x0065    //TX_MIC_CALIBRATION_2
-768    0x0065    //TX_MIC_CALIBRATION_3
-769    0x0044    //TX_MIC_PWR_BIAS_0
-770    0x0044    //TX_MIC_PWR_BIAS_1
-771    0x0044    //TX_MIC_PWR_BIAS_2
-772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x000B    //TX_GAIN_LIMIT_0
-774    0x000B    //TX_GAIN_LIMIT_1
-775    0x000B    //TX_GAIN_LIMIT_2
-776    0x000B    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0001    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0xF800    //TX_TFMASKLTH_DOA
-875    0x0CCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0000    //RX_SAMPLINGFREQ_SIG
-3    0x0000    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x0000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0200    //RX_TDDRC_DRC_GAIN
-38    0x0014    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
-73    0x0000    //RX_FDEQ_BIN_10
-74    0x0000    //RX_FDEQ_BIN_11
-75    0x0000    //RX_FDEQ_BIN_12
-76    0x0000    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0000    //RX_SAMPLINGFREQ_SIG
-160    0x0000    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x0000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23220,7 +23447,7 @@
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
-195    0x0014    //RX_FDEQ_SUBNUM
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23247,20 +23474,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23296,17 +23523,17 @@
 268    0x0002    //RX_FILTINDX
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
+281    0x0240    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x2000    //RX_TPKA_FP
 284    0x2000    //RX_MIN_G_FP
@@ -23340,10 +23567,10 @@
 312    0x0000    //RX_BWE_RESRV_1
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23352,18 +23579,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23390,20 +23617,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23439,10 +23666,10 @@
 286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23451,18 +23678,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23489,20 +23716,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23538,10 +23765,10 @@
 286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23550,18 +23777,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23588,20 +23815,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23637,10 +23864,10 @@
 286    0x0020    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23649,18 +23876,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23687,20 +23914,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23736,10 +23963,10 @@
 286    0x0036    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23748,18 +23975,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23786,20 +24013,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23835,10 +24062,10 @@
 286    0x005B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23847,18 +24074,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23885,20 +24112,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -23934,10 +24161,10 @@
 286    0x0099    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -23946,18 +24173,18 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0200    //RX_TDDRC_DRC_GAIN
-195    0x0014    //RX_FDEQ_SUBNUM
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
 197    0x4848    //RX_FDEQ_GAIN_1
 198    0x4848    //RX_FDEQ_GAIN_2
@@ -23984,20 +24211,20 @@
 219    0x4848    //RX_FDEQ_GAIN_23
 220    0x0202    //RX_FDEQ_BIN_0
 221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D08    //RX_FDEQ_BIN_9
-230    0x0000    //RX_FDEQ_BIN_10
-231    0x0000    //RX_FDEQ_BIN_11
-232    0x0000    //RX_FDEQ_BIN_12
-233    0x0000    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -24033,2685 +24260,14 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-WB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0008    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0001    //TX_SAMPLINGFREQ_SIG
-7    0x0001    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B80    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0080    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7000    //TX_EAD_THR
-151    0x0800    //TX_THR_RE_EST
-152    0x0800    //TX_MIN_EQ_RE_EST_0
-153    0x0800    //TX_MIN_EQ_RE_EST_1
-154    0x0800    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x0800    //TX_MIN_EQ_RE_EST_6
-159    0x0800    //TX_MIN_EQ_RE_EST_7
-160    0x0800    //TX_MIN_EQ_RE_EST_8
-161    0x0800    //TX_MIN_EQ_RE_EST_9
-162    0x0800    //TX_MIN_EQ_RE_EST_10
-163    0x0800    //TX_MIN_EQ_RE_EST_11
-164    0x0800    //TX_MIN_EQ_RE_EST_12
-165    0x4000    //TX_LAMBDA_RE_EST
-166    0x2000    //TX_LAMBDA_CB_NLE
-167    0x6000    //TX_C_POST_FLT
-168    0x7000    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7800    //TX_DTD_THR1_0
-198    0x7000    //TX_DTD_THR1_1
-199    0x7FFF    //TX_DTD_THR1_2
-200    0x7FFF    //TX_DTD_THR1_3
-201    0x7FFF    //TX_DTD_THR1_4
-202    0x7FFF    //TX_DTD_THR1_5
-203    0x7FFF    //TX_DTD_THR1_6
-204    0x7FFF    //TX_DTD_THR2_0
-205    0x7FFF    //TX_DTD_THR2_1
-206    0x7FFF    //TX_DTD_THR2_2
-207    0x7FFF    //TX_DTD_THR2_3
-208    0x7FFF    //TX_DTD_THR2_4
-209    0x7FFF    //TX_DTD_THR2_5
-210    0x7FFF    //TX_DTD_THR2_6
-211    0x1000    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x0BB8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x0019    //TX_EPD_OFFSET_00
-233    0x0019    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
-243    0xF400    //TX_THR_SN_EST_1
-244    0xF600    //TX_THR_SN_EST_2
-245    0xF400    //TX_THR_SN_EST_3
-246    0xF400    //TX_THR_SN_EST_4
-247    0xF400    //TX_THR_SN_EST_5
-248    0xF400    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0000    //TX_DELTA_THR_SN_EST_0
-251    0x0200    //TX_DELTA_THR_SN_EST_1
-252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0200    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0000    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x6000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x6000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x1000    //TX_B_POST_FLT_0
-280    0x1000    //TX_B_POST_FLT_1
-281    0x000F    //TX_NS_LVL_CTRL_0
-282    0x0011    //TX_NS_LVL_CTRL_1
-283    0x000F    //TX_NS_LVL_CTRL_2
-284    0x000F    //TX_NS_LVL_CTRL_3
-285    0x000F    //TX_NS_LVL_CTRL_4
-286    0x000F    //TX_NS_LVL_CTRL_5
-287    0x000F    //TX_NS_LVL_CTRL_6
-288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000F    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000C    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x000C    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7FFF    //TX_SNRI_SUP_0
-301    0x7FFF    //TX_SNRI_SUP_1
-302    0x7FFF    //TX_SNRI_SUP_2
-303    0x7FFF    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x7FFF    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x000E    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x4000    //TX_A_POST_FILT_S_0
-315    0x5000    //TX_A_POST_FILT_S_1
-316    0x5000    //TX_A_POST_FILT_S_2
-317    0x5000    //TX_A_POST_FILT_S_3
-318    0x5000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x4000    //TX_A_POST_FILT_S_6
-321    0x5000    //TX_A_POST_FILT_S_7
-322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x1000    //TX_B_POST_FILT_3
-326    0x1000    //TX_B_POST_FILT_4
-327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
-329    0x1000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7B00    //TX_LAMBDA_PFILT_S_0
-340    0x7B00    //TX_LAMBDA_PFILT_S_1
-341    0x7B00    //TX_LAMBDA_PFILT_S_2
-342    0x7B00    //TX_LAMBDA_PFILT_S_3
-343    0x7B00    //TX_LAMBDA_PFILT_S_4
-344    0x7B00    //TX_LAMBDA_PFILT_S_5
-345    0x7B00    //TX_LAMBDA_PFILT_S_6
-346    0x7B00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0800    //TX_A_PEPPER
-349    0x1EAA    //TX_K_PEPPER_HF
-350    0x0800    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x0102    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
-371    0x00C8    //TX_NOISE_TH_2
-372    0x3A98    //TX_NOISE_TH_3
-373    0x0FA0    //TX_NOISE_TH_4
-374    0x157C    //TX_NOISE_TH_5
-375    0x7FFF    //TX_NOISE_TH_5_2
-376    0x7FFF    //TX_NOISE_TH_5_3
-377    0x7FFF    //TX_NOISE_TH_5_4
-378    0x044C    //TX_NOISE_TH_6
-379    0x00F8    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0002    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x00DC    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x0000    //TX_NS_FP_K_METAL
-411    0x7FFF    //TX_NOISEDET_BOOST_TH
-412    0x0000    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x0230    //TX_NOR_OFF_THR
-498    0x0CCD    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x001C    //TX_FDEQ_SUBNUM
-567    0x5850    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0302    //TX_FDEQ_BIN_1
-593    0x0303    //TX_FDEQ_BIN_2
-594    0x0304    //TX_FDEQ_BIN_3
-595    0x0405    //TX_FDEQ_BIN_4
-596    0x0506    //TX_FDEQ_BIN_5
-597    0x0708    //TX_FDEQ_BIN_6
-598    0x090A    //TX_FDEQ_BIN_7
-599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D07    //TX_FDEQ_BIN_9
-601    0x0E0F    //TX_FDEQ_BIN_10
-602    0x0F10    //TX_FDEQ_BIN_11
-603    0x1011    //TX_FDEQ_BIN_12
-604    0x1119    //TX_FDEQ_BIN_13
-605    0x0000    //TX_FDEQ_BIN_14
-606    0x0000    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0608    //TX_PREEQ_BIN_MIC0_0
-642    0x0808    //TX_PREEQ_BIN_MIC0_1
-643    0x0808    //TX_PREEQ_BIN_MIC0_2
-644    0x0808    //TX_PREEQ_BIN_MIC0_3
-645    0x0808    //TX_PREEQ_BIN_MIC0_4
-646    0x0808    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0808    //TX_PREEQ_BIN_MIC0_7
-649    0x0808    //TX_PREEQ_BIN_MIC0_8
-650    0x0808    //TX_PREEQ_BIN_MIC0_9
-651    0x0808    //TX_PREEQ_BIN_MIC0_10
-652    0x0808    //TX_PREEQ_BIN_MIC0_11
-653    0x0808    //TX_PREEQ_BIN_MIC0_12
-654    0x0808    //TX_PREEQ_BIN_MIC0_13
-655    0x0808    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0608    //TX_PREEQ_BIN_MIC1_0
-691    0x0808    //TX_PREEQ_BIN_MIC1_1
-692    0x0808    //TX_PREEQ_BIN_MIC1_2
-693    0x0808    //TX_PREEQ_BIN_MIC1_3
-694    0x0808    //TX_PREEQ_BIN_MIC1_4
-695    0x0808    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0808    //TX_PREEQ_BIN_MIC1_7
-698    0x0808    //TX_PREEQ_BIN_MIC1_8
-699    0x0808    //TX_PREEQ_BIN_MIC1_9
-700    0x0808    //TX_PREEQ_BIN_MIC1_10
-701    0x0808    //TX_PREEQ_BIN_MIC1_11
-702    0x0808    //TX_PREEQ_BIN_MIC1_12
-703    0x0808    //TX_PREEQ_BIN_MIC1_13
-704    0x0808    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
-744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x0800    //TX_NND_WEIGHT
-765    0x0062    //TX_MIC_CALIBRATION_0
-766    0x0062    //TX_MIC_CALIBRATION_1
-767    0x0062    //TX_MIC_CALIBRATION_2
-768    0x0062    //TX_MIC_CALIBRATION_3
-769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0046    //TX_MIC_PWR_BIAS_1
-771    0x0046    //TX_MIC_PWR_BIAS_2
-772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x000C    //TX_GAIN_LIMIT_0
-774    0x000C    //TX_GAIN_LIMIT_1
-775    0x000C    //TX_GAIN_LIMIT_2
-776    0x000C    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x1000    //TX_TDDRC_ALPHA_UP_01
-784    0x1000    //TX_TDDRC_ALPHA_UP_02
-785    0x1000    //TX_TDDRC_ALPHA_UP_03
-786    0x1000    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x0000    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0001    //TX_FILTINDX
-854    0x0000    //TX_TDDRC_THRD_0
-855    0x0000    //TX_TDDRC_THRD_1
-856    0x2000    //TX_TDDRC_THRD_2
-857    0x2000    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x6E00    //TX_TDDRC_SLANT_1
-860    0x1000    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x00C8    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0001    //RX_SAMPLINGFREQ_SIG
-3    0x0001    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7FFF    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x3800    //RX_THR_PITCH_DET_0
-14    0x3000    //RX_THR_PITCH_DET_1
-15    0x2800    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0600    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
-23    0xF800    //RX_THR_SN_EST
-24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x3000    //RX_TDDRC_ALPHA_UP_1
-7    0x3000    //RX_TDDRC_ALPHA_UP_2
-8    0x3000    //RX_TDDRC_ALPHA_UP_3
-9    0x3000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x2000    //RX_TDDRC_THRD_2
-115    0x3000    //RX_TDDRC_THRD_3
-116    0x0800    //RX_TDDRC_SLANT_0
-117    0x7EB8    //RX_TDDRC_SLANT_1
-118    0x3000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0196    //RX_TDDRC_DRC_GAIN
-38    0x001C    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0405    //RX_FDEQ_BIN_4
-68    0x0506    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
-77    0x0000    //RX_FDEQ_BIN_14
-78    0x0000    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0001    //RX_SAMPLINGFREQ_SIG
-160    0x0001    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7FFF    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x3800    //RX_THR_PITCH_DET_0
-171    0x3000    //RX_THR_PITCH_DET_1
-172    0x2800    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0600    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
-180    0xF800    //RX_THR_SN_EST
-181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x3000    //RX_TDDRC_ALPHA_UP_1
-164    0x3000    //RX_TDDRC_ALPHA_UP_2
-165    0x3000    //RX_TDDRC_ALPHA_UP_3
-166    0x3000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x2000    //RX_TDDRC_THRD_2
-272    0x3000    //RX_TDDRC_THRD_3
-273    0x0800    //RX_TDDRC_SLANT_0
-274    0x7EB8    //RX_TDDRC_SLANT_1
-275    0x3000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0196    //RX_TDDRC_DRC_GAIN
-195    0x001C    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
-224    0x0405    //RX_FDEQ_BIN_4
-225    0x0506    //RX_FDEQ_BIN_5
-226    0x0708    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x0E0F    //RX_FDEQ_BIN_10
-231    0x0F10    //RX_FDEQ_BIN_11
-232    0x1011    //RX_FDEQ_BIN_12
-233    0x1104    //RX_FDEQ_BIN_13
-234    0x0000    //RX_FDEQ_BIN_14
-235    0x0000    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
+#CASE_NAME  HEADSET-GOOGLE_CONDOR-RESERVE2-SWB
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2B28    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
@@ -26738,9 +24294,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -26830,7 +24386,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -26846,11 +24402,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -27105,7 +24661,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -27232,10 +24788,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -27253,26 +24809,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -27531,12 +25087,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -27614,7 +25170,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -27641,37 +25197,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0x8020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -27693,11 +25275,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -28522,7 +26104,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0x8020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -28544,11 +26126,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0x9000    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -29373,2686 +26955,15 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
-#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-FB
-#PARAM_MODE  Full
-#PARAM_TYPE  TX+2RX
-#TOTAL_CUSTOM_STEP  7+7
-#TX
-0    0x0009    //TX_OPERATION_MODE_0
-1    0x0009    //TX_OPERATION_MODE_1
-2    0x0020    //TX_PATCH_REG
-3    0x6B6A    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0001    //TX_NUM_MIC
-6    0x0004    //TX_SAMPLINGFREQ_SIG
-7    0x0004    //TX_SAMPLINGFREQ_PROC
-8    0x000A    //TX_FRAME_SZ_SIG
-9    0x000A    //TX_FRAME_SZ
-10    0x0000    //TX_DELAY_OPT
-11    0x0028    //TX_MAX_TAIL_LENGTH
-12    0x0001    //TX_NUM_LOUTCHN
-13    0x0001    //TX_MAXNUM_AECREF
-14    0x0000    //TX_DBG_FUNC_REG
-15    0x0000    //TX_DBG_FUNC_REG1
-16    0x0000    //TX_SYS_RESRV_0
-17    0x0000    //TX_SYS_RESRV_1
-18    0x0000    //TX_SYS_RESRV_2
-19    0x0000    //TX_SYS_RESRV_3
-20    0x0000    //TX_DIST2REF0
-21    0x009B    //TX_DIST2REF1
-22    0x0000    //TX_DIST2REF_02
-23    0x0000    //TX_DIST2REF_03
-24    0x0000    //TX_DIST2REF_04
-25    0x0000    //TX_DIST2REF_05
-26    0x0000    //TX_MMIC
-27    0x0B4C    //TX_PGA_0
-28    0x0800    //TX_PGA_1
-29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
-33    0x0000    //TX_MIC_PAIRS
-34    0x0000    //TX_MIC_PAIRS_HS
-35    0x0002    //TX_MICS_FOR_BF
-36    0x0000    //TX_MIC_PAIRS_FORL1
-37    0x0002    //TX_MICS_OF_PAIR0
-38    0x0002    //TX_MICS_OF_PAIR1
-39    0x0002    //TX_MICS_OF_PAIR2
-40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0000    //TX_MIC_DATA_SRC0
-42    0x0001    //TX_MIC_DATA_SRC1
-43    0x0002    //TX_MIC_DATA_SRC2
-44    0x0000    //TX_MIC_DATA_SRC3
-45    0x0000    //TX_MIC_PAIR_CH_04
-46    0x0000    //TX_MIC_PAIR_CH_05
-47    0x0000    //TX_MIC_PAIR_CH_10
-48    0x0000    //TX_MIC_PAIR_CH_11
-49    0x0000    //TX_MIC_PAIR_CH_12
-50    0x0000    //TX_MIC_PAIR_CH_13
-51    0x0000    //TX_MIC_PAIR_CH_14
-52    0x05DC    //TX_HD_BIN_MASK
-53    0x0010    //TX_HD_SUBAND_MASK
-54    0x19A1    //TX_HD_FRAME_AVG_MASK
-55    0x0320    //TX_HD_MIN_FRQ
-56    0x1000    //TX_HD_ALPHA_PSD
-57    0x1100    //TX_T_PHPR1
-58    0x0000    //TX_T_PHPR2
-59    0x0000    //TX_T_PTPR
-60    0x0000    //TX_T_PNPR
-61    0x0000    //TX_T_PAPR1
-62    0xEE6C    //TX_T_PSDVAT
-63    0x0800    //TX_CNT
-64    0x4000    //TX_ANTI_HOWL_GAIN
-65    0x0001    //TX_MICFORBFMARK_0
-66    0x0001    //TX_MICFORBFMARK_1
-67    0x0001    //TX_MICFORBFMARK_2
-68    0x0001    //TX_MICFORBFMARK_3
-69    0x0001    //TX_MICFORBFMARK_4
-70    0x0001    //TX_MICFORBFMARK_5
-71    0x0000    //TX_DIST2REF_10
-72    0x3E00    //TX_DIST2REF_11
-73    0x0000    //TX_DIST2REF2
-74    0x0000    //TX_DIST2REF_13
-75    0x0000    //TX_DIST2REF_14
-76    0x0000    //TX_DIST2REF_15
-77    0x0000    //TX_DIST2REF_20
-78    0x0000    //TX_DIST2REF_21
-79    0x0000    //TX_DIST2REF_22
-80    0x0000    //TX_DIST2REF_23
-81    0x0000    //TX_DIST2REF_24
-82    0x0000    //TX_DIST2REF_25
-83    0x0000    //TX_DIST2REF_30
-84    0x0000    //TX_DIST2REF_31
-85    0x0000    //TX_DIST2REF_32
-86    0x0000    //TX_DIST2REF_33
-87    0x0000    //TX_DIST2REF_34
-88    0x0000    //TX_DIST2REF_35
-89    0x0000    //TX_MIC_LOC_00
-90    0x0000    //TX_MIC_LOC_01
-91    0x0000    //TX_MIC_LOC_02
-92    0x0000    //TX_MIC_LOC_03
-93    0x0000    //TX_MIC_LOC_04
-94    0x0000    //TX_MIC_LOC_05
-95    0x0000    //TX_MIC_LOC_10
-96    0x0000    //TX_MIC_LOC_11
-97    0x0000    //TX_MIC_LOC_12
-98    0x0000    //TX_MIC_LOC_13
-99    0x0000    //TX_MIC_LOC_14
-100    0x0000    //TX_MIC_LOC_15
-101    0x0000    //TX_MIC_LOC_20
-102    0x0000    //TX_MIC_LOC_21
-103    0x0000    //TX_MIC_LOC_22
-104    0x0000    //TX_MIC_LOC_23
-105    0x0000    //TX_MIC_LOC_24
-106    0x0000    //TX_MIC_LOC_25
-107    0x0200    //TX_MIC_REFBLK_VOLUME
-108    0x0800    //TX_MIC_BLOCK_VOLUME
-109    0x0000    //TX_INVERSE_MASK
-110    0x0000    //TX_ADCS_MASK
-111    0x04D0    //TX_ADCS_GAIN
-112    0x4000    //TX_NFC_GAINFAC
-113    0x0000    //TX_MAINMIC_BLKFACTOR
-114    0x0000    //TX_REFMIC_BLKFACTOR
-115    0x0000    //TX_BLMIC_BLKFACTOR
-116    0x0000    //TX_BRMIC_BLKFACTOR
-117    0x0031    //TX_MICBLK_START_BIN
-118    0x0060    //TX_MICBLK_END_BIN
-119    0x0015    //TX_MICBLK_FE_HOLD
-120    0xFFF2    //TX_MICBLK_MR_EXP_TH
-121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
-123    0x4000    //TX_FE_ENER_TH_MTS
-124    0x0004    //TX_FE_ENER_TH_EXP
-125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
-126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
-127    0x0010    //TX_MIC_BLOCK_N
-128    0x7E56    //TX_A_HP
-129    0x4000    //TX_B_PE
-130    0x6800    //TX_THR_PITCH_DET_0
-131    0x6000    //TX_THR_PITCH_DET_1
-132    0x5800    //TX_THR_PITCH_DET_2
-133    0x0008    //TX_PITCH_BFR_LEN
-134    0x0003    //TX_SBD_PITCH_DET
-135    0x0050    //TX_TD_AEC_L
-136    0x4000    //TX_MU0_UNP_TD_AEC
-137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
-143    0x0000    //TX_PP_RESRV_5
-144    0x0000    //TX_PP_RESRV_6
-145    0x0000    //TX_PP_RESRV_7
-146    0x001E    //TX_TAIL_LENGTH
-147    0x0200    //TX_AEC_REF_GAIN_0
-148    0x0800    //TX_AEC_REF_GAIN_1
-149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x61A8    //TX_EAD_THR
-151    0x0400    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x3000    //TX_MIN_EQ_RE_EST_1
-154    0x4000    //TX_MIN_EQ_RE_EST_2
-155    0x0800    //TX_MIN_EQ_RE_EST_3
-156    0x0800    //TX_MIN_EQ_RE_EST_4
-157    0x0800    //TX_MIN_EQ_RE_EST_5
-158    0x6000    //TX_MIN_EQ_RE_EST_6
-159    0x6000    //TX_MIN_EQ_RE_EST_7
-160    0x6000    //TX_MIN_EQ_RE_EST_8
-161    0x6000    //TX_MIN_EQ_RE_EST_9
-162    0x4000    //TX_MIN_EQ_RE_EST_10
-163    0x4000    //TX_MIN_EQ_RE_EST_11
-164    0x4000    //TX_MIN_EQ_RE_EST_12
-165    0x3000    //TX_LAMBDA_RE_EST
-166    0x4000    //TX_LAMBDA_CB_NLE
-167    0x3000    //TX_C_POST_FLT
-168    0x7FFF    //TX_GAIN_NP
-169    0x00C8    //TX_SE_HOLD_N
-170    0x00C8    //TX_DT_HOLD_N
-171    0x03E8    //TX_DT2_HOLD_N
-172    0x6666    //TX_AEC_RESRV_0
-173    0x0000    //TX_AEC_RESRV_1
-174    0x0014    //TX_AEC_RESRV_2
-175    0x0000    //TX_MIC_DELAY_LENGTH
-176    0x0000    //TX_REF_DELAY_LENGTH
-177    0x0000    //TX_ADD_LINEIN_GAINL
-178    0x0000    //TX_ADD_LINEIN_GAINH
-179    0x0000    //TX_MIN_EQ_RE_EST_14
-180    0x0000    //TX_DTD_THR1_8
-181    0x7FFF    //TX_DTD_THR2_8
-182    0x0000    //TX_DTD_MIC_BLK2
-183    0x0008    //TX_FRQ_LIN_LEN
-184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
-185    0x6000    //TX_MU0_UNP_FRQ_AEC
-186    0x4000    //TX_MU0_PTD_FRQ_AEC
-187    0x000A    //TX_MINENOISETH
-188    0x0800    //TX_MU0_RE_EST
-189    0x0001    //TX_AEC_NUM_CH
-190    0x0000    //TX_BIGECHOATTENUATION_MAX
-191    0x2000    //TX_A_POST_FLT_MICBLK
-192    0x0000    //TX_BLKENERTH
-193    0x0000    //TX_BLKENERHIGHTH
-194    0x0000    //TX_NORMENERTH
-195    0x0000    //TX_NORMENERHIGHTH
-196    0x0000    //TX_NORMENERHIGHTHL
-197    0x0800    //TX_DTD_THR1_0
-198    0x0800    //TX_DTD_THR1_1
-199    0x0800    //TX_DTD_THR1_2
-200    0x0800    //TX_DTD_THR1_3
-201    0x0800    //TX_DTD_THR1_4
-202    0x0800    //TX_DTD_THR1_5
-203    0x0800    //TX_DTD_THR1_6
-204    0x0800    //TX_DTD_THR2_0
-205    0x0800    //TX_DTD_THR2_1
-206    0x0800    //TX_DTD_THR2_2
-207    0x0800    //TX_DTD_THR2_3
-208    0x0800    //TX_DTD_THR2_4
-209    0x0100    //TX_DTD_THR2_5
-210    0x0100    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
-212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0CCD    //TX_DT_CUT_THR
-215    0x04EB    //TX_COMFORT_G
-216    0x01F4    //TX_POWER_YOUT_TH
-217    0x4000    //TX_FDPFGAINECHO
-218    0x0000    //TX_DTD_HD_THR
-219    0x0000    //TX_SPK_CUT_K_S
-220    0x0000    //TX_DTD_MIC_BLK
-221    0x0400    //TX_ADPT_STRICT_L
-222    0x0200    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
-224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x0800    //TX_B_POST_FILT_ECHO_L
-229    0x7FFF    //TX_B_POST_FILT_ECHO_H
-230    0x0200    //TX_MIN_G_CTRL_ECHO
-231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
-232    0x00C0    //TX_EPD_OFFSET_00
-233    0x00C0    //TX_EPD_OFFST_01
-234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
-235    0x3A98    //TX_RATIO_DT_H_TH_CUT
-236    0x7FFF    //TX_MIN_EQ_RE_EST_13
-237    0x7FFF    //TX_DTD_THR1_7
-238    0x7FFF    //TX_DTD_THR2_7
-239    0x0800    //TX_DT_RESRV_7
-240    0x0800    //TX_DT_RESRV_8
-241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
-243    0xFB00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF700    //TX_THR_SN_EST_3
-246    0xFA00    //TX_THR_SN_EST_4
-247    0xF600    //TX_THR_SN_EST_5
-248    0xF600    //TX_THR_SN_EST_6
-249    0xF600    //TX_THR_SN_EST_7
-250    0x0200    //TX_DELTA_THR_SN_EST_0
-251    0x0400    //TX_DELTA_THR_SN_EST_1
-252    0x0300    //TX_DELTA_THR_SN_EST_2
-253    0x0600    //TX_DELTA_THR_SN_EST_3
-254    0x0200    //TX_DELTA_THR_SN_EST_4
-255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0200    //TX_DELTA_THR_SN_EST_6
-257    0x0200    //TX_DELTA_THR_SN_EST_7
-258    0x4000    //TX_LAMBDA_NN_EST_0
-259    0x4000    //TX_LAMBDA_NN_EST_1
-260    0x4000    //TX_LAMBDA_NN_EST_2
-261    0x4000    //TX_LAMBDA_NN_EST_3
-262    0x4000    //TX_LAMBDA_NN_EST_4
-263    0x4000    //TX_LAMBDA_NN_EST_5
-264    0x4000    //TX_LAMBDA_NN_EST_6
-265    0x4000    //TX_LAMBDA_NN_EST_7
-266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
-268    0x0041    //TX_INBEAMHOLDT
-269    0x2000    //TX_G_STRICT
-270    0x2000    //TX_EQ_THR_BF
-271    0x799A    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
-273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
-276    0x0800    //TX_MAINREFRTO_TH_H
-277    0x0800    //TX_MAINREFRTO_TH_L
-278    0x0200    //TX_MAINREFRTO_TH_EQ
-279    0x2000    //TX_B_POST_FLT_0
-280    0x2000    //TX_B_POST_FLT_1
-281    0x0012    //TX_NS_LVL_CTRL_0
-282    0x0016    //TX_NS_LVL_CTRL_1
-283    0x0016    //TX_NS_LVL_CTRL_2
-284    0x0019    //TX_NS_LVL_CTRL_3
-285    0x0010    //TX_NS_LVL_CTRL_4
-286    0x0010    //TX_NS_LVL_CTRL_5
-287    0x0019    //TX_NS_LVL_CTRL_6
-288    0x0010    //TX_NS_LVL_CTRL_7
-289    0x000C    //TX_MIN_GAIN_S_0
-290    0x000C    //TX_MIN_GAIN_S_1
-291    0x000C    //TX_MIN_GAIN_S_2
-292    0x000F    //TX_MIN_GAIN_S_3
-293    0x000C    //TX_MIN_GAIN_S_4
-294    0x000C    //TX_MIN_GAIN_S_5
-295    0x0011    //TX_MIN_GAIN_S_6
-296    0x000C    //TX_MIN_GAIN_S_7
-297    0x7FFF    //TX_NMOS_SUP
-298    0x0000    //TX_NS_MAX_PRI_SNR_TH
-299    0x0000    //TX_NMOS_SUP_MENSA
-300    0x7000    //TX_SNRI_SUP_0
-301    0x7000    //TX_SNRI_SUP_1
-302    0x7000    //TX_SNRI_SUP_2
-303    0x6000    //TX_SNRI_SUP_3
-304    0x7FFF    //TX_SNRI_SUP_4
-305    0x7FFF    //TX_SNRI_SUP_5
-306    0x6000    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
-308    0x7FFF    //TX_THR_LFNS
-309    0x0016    //TX_G_LFNS
-310    0x09C4    //TX_GAIN0_NTH
-311    0x000A    //TX_MUSIC_MORENS
-312    0x7FFF    //TX_A_POST_FILT_0
-313    0x2000    //TX_A_POST_FILT_1
-314    0x6000    //TX_A_POST_FILT_S_0
-315    0x6000    //TX_A_POST_FILT_S_1
-316    0x6000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
-318    0x6000    //TX_A_POST_FILT_S_4
-319    0x6000    //TX_A_POST_FILT_S_5
-320    0x6000    //TX_A_POST_FILT_S_6
-321    0x6000    //TX_A_POST_FILT_S_7
-322    0x2000    //TX_B_POST_FILT_0
-323    0x4000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x2000    //TX_B_POST_FILT_3
-326    0x2000    //TX_B_POST_FILT_4
-327    0x2000    //TX_B_POST_FILT_5
-328    0x2000    //TX_B_POST_FILT_6
-329    0x2000    //TX_B_POST_FILT_7
-330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
-331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
-332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
-333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
-334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
-335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
-336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
-337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7CCD    //TX_LAMBDA_PFILT
-339    0x7CCD    //TX_LAMBDA_PFILT_S_0
-340    0x7CCD    //TX_LAMBDA_PFILT_S_1
-341    0x7CCD    //TX_LAMBDA_PFILT_S_2
-342    0x7CCD    //TX_LAMBDA_PFILT_S_3
-343    0x7CCD    //TX_LAMBDA_PFILT_S_4
-344    0x7CCD    //TX_LAMBDA_PFILT_S_5
-345    0x7CCD    //TX_LAMBDA_PFILT_S_6
-346    0x7CCD    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0500    //TX_A_PEPPER
-349    0x1600    //TX_K_PEPPER_HF
-350    0x0400    //TX_A_PEPPER_HF
-351    0x0001    //TX_HMNC_BST_FLG
-352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
-356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0000    //TX_C_POST_FLT_DT
-359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
-360    0x0100    //TX_DT_BOOST
-361    0x0000    //TX_BF_SGRAD_FLG
-362    0x0005    //TX_BF_DVG_TH
-363    0x001E    //TX_SN_C_F
-364    0x0000    //TX_K_APT
-365    0x0001    //TX_NOISEDET
-366    0x0190    //TX_NDETCT
-367    0x04E8    //TX_NOISE_TH_0
-368    0x7FFF    //TX_NOISE_TH_0_2
-369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x02A6    //TX_NOISE_TH_1
-371    0x04B0    //TX_NOISE_TH_2
-372    0x3194    //TX_NOISE_TH_3
-373    0x0960    //TX_NOISE_TH_4
-374    0x5555    //TX_NOISE_TH_5
-375    0x3FF4    //TX_NOISE_TH_5_2
-376    0x0001    //TX_NOISE_TH_5_3
-377    0x0000    //TX_NOISE_TH_5_4
-378    0x02BC    //TX_NOISE_TH_6
-379    0x02BC    //TX_MINENOISE_TH
-380    0xD508    //TX_MORENS_TFMASK_TH
-381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
-384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
-385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
-386    0x0333    //TX_OUT_ENER_S_TH_NOISY
-387    0x019A    //TX_OUT_ENER_TH_NOISE
-388    0x0333    //TX_OUT_ENER_TH_SPEECH
-389    0x2000    //TX_SN_NPB_GAIN
-390    0x0000    //TX_NN_NPB_GAIN
-391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
-393    0x4000    //TX_B_LESSCUT_RTO_WTA
-394    0x0000    //TX_MEL_G_R
-395    0x0080    //TX_SUPHIGH_TH
-396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
-398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
-400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
-402    0x00B4    //TX_STN_NOISE_TH
-403    0x4000    //TX_POST_MASK_SUP
-404    0x7FFF    //TX_POST_MASK_ADJUST
-405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x04E7    //TX_MINENOISE_MIC0_TH
-407    0x012C    //TX_MINENOISE_MIC0_S_TH
-408    0x2900    //TX_MIN_G_CTRL_SSNS
-409    0x0800    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
-411    0x3A98    //TX_NOISEDET_BOOST_TH
-412    0x0FA0    //TX_NSMOOTH_TH
-413    0x0000    //TX_NS_RESRV_8
-414    0x1800    //TX_RHO_UPB
-415    0x0BB8    //TX_N_HOLD_HS
-416    0x0050    //TX_N_RHO_BFR0
-417    0x7FFF    //TX_LAMBDA_ARSP_EST
-418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
-419    0x0CCD    //TX_THR_STD_NSR
-420    0x019A    //TX_THR_STD_PLH
-421    0x2AF8    //TX_N_HOLD_STD
-422    0x0066    //TX_THR_STD_RHO
-423    0x2000    //TX_BF_RESET_THR_HS
-424    0x09C4    //TX_SB_RTO_MEAN_TH
-425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
-426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
-427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
-428    0x0000    //TX_WTA_EN_RTO_TH
-429    0x0000    //TX_TOP_ENER_TH_F
-430    0x0000    //TX_DESIRED_TALK_HOLDT
-431    0x0800    //TX_MIC_BLOCK_FACTOR
-432    0x0000    //TX_NSEST_BFRLRNRDC
-433    0x0000    //TX_THR_POST_FLT_HS
-434    0x0010    //TX_HS_VAD_BIN
-435    0x2666    //TX_THR_VAD_HS
-436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
-437    0x0032    //TX_SILENCE_T
-438    0x0000    //TX_A_POST_FLT_WTA
-439    0x799A    //TX_LAMBDA_PFLT_WTA
-440    0x0000    //TX_SB_RHO_MEAN2_TH
-441    0x0190    //TX_SB_RHO_MEAN3_TH
-442    0x0000    //TX_HS_RESRV_4
-443    0x0000    //TX_HS_RESRV_5
-444    0x003C    //TX_DOA_VAD_THR_1
-445    0x0000    //TX_DOA_VAD_THR_2
-446    0x0028    //TX_DOA_VAD_THR1_0
-447    0x0028    //TX_DOA_VAD_THR1_1
-448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
-449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
-450    0x005A    //TX_DFLT_SRC_DOA_0A
-451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
-452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
-453    0x0000    //TX_DFLT_SRC_DOA_0B
-454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
-455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
-456    0x0000    //TX_DFLT_SRC_DOA_0C
-457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
-458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
-459    0x0000    //TX_DFLT_SRC_DOA_0D
-460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
-461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
-462    0x005A    //TX_DFLT_SRC_DOA_1A
-463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
-464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
-465    0x005A    //TX_DFLT_SRC_DOA_1B
-466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
-467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
-468    0x005A    //TX_DFLT_SRC_DOA_1C
-469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
-470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
-471    0x005A    //TX_DFLT_SRC_DOA_1D
-472    0x0100    //TX_BF_HOLDOFF_T
-473    0x7FFF    //TX_DOA_COST_FACTOR
-474    0x4000    //TX_MAINTOREFR_TH0
-475    0x071C    //TX_DOA_TRK_THR
-476    0x012C    //TX_DOA_TRACK_HT
-477    0x0200    //TX_N1_HOLD_HF
-478    0x0100    //TX_N2_HOLD_HF
-479    0x3000    //TX_BF_RESET_THR_HF
-480    0x7333    //TX_DOA_SMOOTH
-481    0x0800    //TX_MU_BF
-482    0x0800    //TX_BF_MU_LF_B2
-483    0x0040    //TX_BF_FC_END_BIN_B2
-484    0x0020    //TX_BF_FC_END_BIN
-485    0x0000    //TX_HF_RESRV_25
-486    0x0000    //TX_HF_RESRV_26
-487    0x0007    //TX_N_DOA_SEED
-488    0x0001    //TX_FINE_DOA_SEARCH_FLG
-489    0x0000    //TX_HF_RESRV_27
-490    0x038E    //TX_DLT_SRC_DOA_RNG
-491    0x0200    //TX_BF_MU_LF
-492    0x0000    //TX_DFLT_SRC_LOC_0
-493    0x7FFF    //TX_DFLT_SRC_LOC_1
-494    0x0000    //TX_DFLT_SRC_LOC_2
-495    0x038E    //TX_DOA_TRACK_VADTH
-496    0x0000    //TX_DOA_TRACK_NEW
-497    0x01E0    //TX_NOR_OFF_THR
-498    0x7C00    //TX_MORE_ON_700HZ_THR
-499    0x2000    //TX_MU_BF_ADPT_NS
-500    0x0000    //TX_ADAPT_LEN
-501    0x6666    //TX_MORE_SNS
-502    0x0000    //TX_NOR_OFF_TH1
-503    0x0000    //TX_WIDE_MASK_TH
-504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
-505    0x6000    //TX_C_POST_FLT_CUT
-506    0x2000    //TX_RADIODTLV
-507    0x0320    //TX_POWER_LINEIN_TH
-508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
-510    0x0C80    //TX_ECHO_TH
-511    0x6666    //TX_MIC_TO_BFGAIN
-512    0x0000    //TX_MICTOBFGAIN0
-513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
-519    0x0000    //TX_DEREVERB_ALPHA
-520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
-528    0x1333    //TX_WIND_MARK_TH
-529    0x399A    //TX_CORR_THR
-530    0x0004    //TX_SNR_THR
-531    0x0010    //TX_ENGY_THR
-532    0x1770    //TX_CORR_HIGH_TH
-533    0x6000    //TX_ENGY_THR_2
-534    0x3400    //TX_MEAN_RTO_THR
-535    0x0028    //TX_WNS_ENOISE_MIC0_TH
-536    0x3000    //TX_RATIOMICL_TH
-537    0x64CD    //TX_CALIG_HS
-538    0x0000    //TX_LVL_CTRL
-539    0x0014    //TX_WIND_SUPRTO
-540    0x000A    //TX_WNS_MIN_G
-541    0x0000    //TX_WNS_B_POST_FLT
-542    0x2800    //TX_RATIOMICH_TH
-543    0xD120    //TX_WIND_INBEAM_L_TH
-544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
-548    0x0000    //TX_WNS_RESRV_3
-549    0x0000    //TX_WNS_RESRV_4
-550    0x0000    //TX_WNS_RESRV_5
-551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
-565    0x0000    //TX_PB_RESRV_1
-566    0x0020    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
-568    0x4848    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
-581    0x4848    //TX_FDEQ_GAIN_14
-582    0x4848    //TX_FDEQ_GAIN_15
-583    0x4848    //TX_FDEQ_GAIN_16
-584    0x4848    //TX_FDEQ_GAIN_17
-585    0x4848    //TX_FDEQ_GAIN_18
-586    0x4848    //TX_FDEQ_GAIN_19
-587    0x4848    //TX_FDEQ_GAIN_20
-588    0x4848    //TX_FDEQ_GAIN_21
-589    0x4848    //TX_FDEQ_GAIN_22
-590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
-593    0x0304    //TX_FDEQ_BIN_2
-594    0x0405    //TX_FDEQ_BIN_3
-595    0x0607    //TX_FDEQ_BIN_4
-596    0x0809    //TX_FDEQ_BIN_5
-597    0x0A0B    //TX_FDEQ_BIN_6
-598    0x0C0D    //TX_FDEQ_BIN_7
-599    0x0E0F    //TX_FDEQ_BIN_8
-600    0x1011    //TX_FDEQ_BIN_9
-601    0x1214    //TX_FDEQ_BIN_10
-602    0x1618    //TX_FDEQ_BIN_11
-603    0x1C1C    //TX_FDEQ_BIN_12
-604    0x2020    //TX_FDEQ_BIN_13
-605    0x2020    //TX_FDEQ_BIN_14
-606    0x2011    //TX_FDEQ_BIN_15
-607    0x0000    //TX_FDEQ_BIN_16
-608    0x0000    //TX_FDEQ_BIN_17
-609    0x0000    //TX_FDEQ_BIN_18
-610    0x0000    //TX_FDEQ_BIN_19
-611    0x0000    //TX_FDEQ_BIN_20
-612    0x0000    //TX_FDEQ_BIN_21
-613    0x0000    //TX_FDEQ_BIN_22
-614    0x0000    //TX_FDEQ_BIN_23
-615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
-617    0x4848    //TX_PREEQ_GAIN_MIC0_0
-618    0x4848    //TX_PREEQ_GAIN_MIC0_1
-619    0x4848    //TX_PREEQ_GAIN_MIC0_2
-620    0x4848    //TX_PREEQ_GAIN_MIC0_3
-621    0x4848    //TX_PREEQ_GAIN_MIC0_4
-622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4848    //TX_PREEQ_GAIN_MIC0_6
-624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4848    //TX_PREEQ_GAIN_MIC0_8
-626    0x4848    //TX_PREEQ_GAIN_MIC0_9
-627    0x4848    //TX_PREEQ_GAIN_MIC0_10
-628    0x4848    //TX_PREEQ_GAIN_MIC0_11
-629    0x4848    //TX_PREEQ_GAIN_MIC0_12
-630    0x4848    //TX_PREEQ_GAIN_MIC0_13
-631    0x4848    //TX_PREEQ_GAIN_MIC0_14
-632    0x4848    //TX_PREEQ_GAIN_MIC0_15
-633    0x4848    //TX_PREEQ_GAIN_MIC0_16
-634    0x4848    //TX_PREEQ_GAIN_MIC0_17
-635    0x4848    //TX_PREEQ_GAIN_MIC0_18
-636    0x4848    //TX_PREEQ_GAIN_MIC0_19
-637    0x4848    //TX_PREEQ_GAIN_MIC0_20
-638    0x4848    //TX_PREEQ_GAIN_MIC0_21
-639    0x4848    //TX_PREEQ_GAIN_MIC0_22
-640    0x4848    //TX_PREEQ_GAIN_MIC0_23
-641    0x0E10    //TX_PREEQ_BIN_MIC0_0
-642    0x1010    //TX_PREEQ_BIN_MIC0_1
-643    0x1010    //TX_PREEQ_BIN_MIC0_2
-644    0x1010    //TX_PREEQ_BIN_MIC0_3
-645    0x1010    //TX_PREEQ_BIN_MIC0_4
-646    0x1010    //TX_PREEQ_BIN_MIC0_5
-647    0x1010    //TX_PREEQ_BIN_MIC0_6
-648    0x1010    //TX_PREEQ_BIN_MIC0_7
-649    0x1010    //TX_PREEQ_BIN_MIC0_8
-650    0x1010    //TX_PREEQ_BIN_MIC0_9
-651    0x1010    //TX_PREEQ_BIN_MIC0_10
-652    0x1010    //TX_PREEQ_BIN_MIC0_11
-653    0x1010    //TX_PREEQ_BIN_MIC0_12
-654    0x1010    //TX_PREEQ_BIN_MIC0_13
-655    0x1010    //TX_PREEQ_BIN_MIC0_14
-656    0x0200    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
-658    0x0000    //TX_PREEQ_BIN_MIC0_17
-659    0x0000    //TX_PREEQ_BIN_MIC0_18
-660    0x0000    //TX_PREEQ_BIN_MIC0_19
-661    0x0000    //TX_PREEQ_BIN_MIC0_20
-662    0x0000    //TX_PREEQ_BIN_MIC0_21
-663    0x0000    //TX_PREEQ_BIN_MIC0_22
-664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
-666    0x4848    //TX_PREEQ_GAIN_MIC1_0
-667    0x4848    //TX_PREEQ_GAIN_MIC1_1
-668    0x4848    //TX_PREEQ_GAIN_MIC1_2
-669    0x4848    //TX_PREEQ_GAIN_MIC1_3
-670    0x4848    //TX_PREEQ_GAIN_MIC1_4
-671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4848    //TX_PREEQ_GAIN_MIC1_7
-674    0x4848    //TX_PREEQ_GAIN_MIC1_8
-675    0x4848    //TX_PREEQ_GAIN_MIC1_9
-676    0x4848    //TX_PREEQ_GAIN_MIC1_10
-677    0x4848    //TX_PREEQ_GAIN_MIC1_11
-678    0x4848    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
-680    0x4848    //TX_PREEQ_GAIN_MIC1_14
-681    0x4848    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
-683    0x4848    //TX_PREEQ_GAIN_MIC1_17
-684    0x4848    //TX_PREEQ_GAIN_MIC1_18
-685    0x4848    //TX_PREEQ_GAIN_MIC1_19
-686    0x4848    //TX_PREEQ_GAIN_MIC1_20
-687    0x4848    //TX_PREEQ_GAIN_MIC1_21
-688    0x4848    //TX_PREEQ_GAIN_MIC1_22
-689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0E10    //TX_PREEQ_BIN_MIC1_0
-691    0x1010    //TX_PREEQ_BIN_MIC1_1
-692    0x1010    //TX_PREEQ_BIN_MIC1_2
-693    0x1010    //TX_PREEQ_BIN_MIC1_3
-694    0x1010    //TX_PREEQ_BIN_MIC1_4
-695    0x1010    //TX_PREEQ_BIN_MIC1_5
-696    0x1010    //TX_PREEQ_BIN_MIC1_6
-697    0x1010    //TX_PREEQ_BIN_MIC1_7
-698    0x1010    //TX_PREEQ_BIN_MIC1_8
-699    0x1010    //TX_PREEQ_BIN_MIC1_9
-700    0x1010    //TX_PREEQ_BIN_MIC1_10
-701    0x1010    //TX_PREEQ_BIN_MIC1_11
-702    0x1010    //TX_PREEQ_BIN_MIC1_12
-703    0x1010    //TX_PREEQ_BIN_MIC1_13
-704    0x1010    //TX_PREEQ_BIN_MIC1_14
-705    0x0200    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
-707    0x0000    //TX_PREEQ_BIN_MIC1_17
-708    0x0000    //TX_PREEQ_BIN_MIC1_18
-709    0x0000    //TX_PREEQ_BIN_MIC1_19
-710    0x0000    //TX_PREEQ_BIN_MIC1_20
-711    0x0000    //TX_PREEQ_BIN_MIC1_21
-712    0x0000    //TX_PREEQ_BIN_MIC1_22
-713    0x0000    //TX_PREEQ_BIN_MIC1_23
-714    0x0020    //TX_PREEQ_SUBNUM_MIC2
-715    0x4848    //TX_PREEQ_GAIN_MIC2_0
-716    0x4848    //TX_PREEQ_GAIN_MIC2_1
-717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
-731    0x4848    //TX_PREEQ_GAIN_MIC2_16
-732    0x4848    //TX_PREEQ_GAIN_MIC2_17
-733    0x4848    //TX_PREEQ_GAIN_MIC2_18
-734    0x4848    //TX_PREEQ_GAIN_MIC2_19
-735    0x4848    //TX_PREEQ_GAIN_MIC2_20
-736    0x4848    //TX_PREEQ_GAIN_MIC2_21
-737    0x4848    //TX_PREEQ_GAIN_MIC2_22
-738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0E10    //TX_PREEQ_BIN_MIC2_0
-740    0x1010    //TX_PREEQ_BIN_MIC2_1
-741    0x1010    //TX_PREEQ_BIN_MIC2_2
-742    0x1010    //TX_PREEQ_BIN_MIC2_3
-743    0x1010    //TX_PREEQ_BIN_MIC2_4
-744    0x1010    //TX_PREEQ_BIN_MIC2_5
-745    0x1010    //TX_PREEQ_BIN_MIC2_6
-746    0x1010    //TX_PREEQ_BIN_MIC2_7
-747    0x1010    //TX_PREEQ_BIN_MIC2_8
-748    0x1010    //TX_PREEQ_BIN_MIC2_9
-749    0x1010    //TX_PREEQ_BIN_MIC2_10
-750    0x1010    //TX_PREEQ_BIN_MIC2_11
-751    0x1010    //TX_PREEQ_BIN_MIC2_12
-752    0x1010    //TX_PREEQ_BIN_MIC2_13
-753    0x1010    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
-755    0x0000    //TX_PREEQ_BIN_MIC2_16
-756    0x0000    //TX_PREEQ_BIN_MIC2_17
-757    0x0000    //TX_PREEQ_BIN_MIC2_18
-758    0x0000    //TX_PREEQ_BIN_MIC2_19
-759    0x0000    //TX_PREEQ_BIN_MIC2_20
-760    0x0000    //TX_PREEQ_BIN_MIC2_21
-761    0x0000    //TX_PREEQ_BIN_MIC2_22
-762    0x0000    //TX_PREEQ_BIN_MIC2_23
-763    0x0006    //TX_MASKING_ABILITY
-764    0x2000    //TX_NND_WEIGHT
-765    0x0060    //TX_MIC_CALIBRATION_0
-766    0x0060    //TX_MIC_CALIBRATION_1
-767    0x0070    //TX_MIC_CALIBRATION_2
-768    0x0070    //TX_MIC_CALIBRATION_3
-769    0x0050    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
-771    0x0040    //TX_MIC_PWR_BIAS_2
-772    0x0040    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
-775    0x000F    //TX_GAIN_LIMIT_2
-776    0x000F    //TX_GAIN_LIMIT_3
-777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
-778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
-779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
-780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
-781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
-782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
-783    0x0C00    //TX_TDDRC_ALPHA_UP_01
-784    0x0C00    //TX_TDDRC_ALPHA_UP_02
-785    0x0C00    //TX_TDDRC_ALPHA_UP_03
-786    0x0C00    //TX_TDDRC_ALPHA_UP_04
-787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
-788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
-789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
-790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
-792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
-793    0x0000    //TX_TDDRC_RESRV_0
-794    0x0000    //TX_TDDRC_RESRV_1
-795    0x0018    //TX_FDDRC_BAND_MARGIN_0
-796    0x0030    //TX_FDDRC_BAND_MARGIN_1
-797    0x0050    //TX_FDDRC_BAND_MARGIN_2
-798    0x0080    //TX_FDDRC_BAND_MARGIN_3
-799    0x0007    //TX_FDDRC_BLOCK_EXP
-800    0x5000    //TX_FDDRC_THRD_2_0
-801    0x5000    //TX_FDDRC_THRD_2_1
-802    0x5000    //TX_FDDRC_THRD_2_2
-803    0x5000    //TX_FDDRC_THRD_2_3
-804    0x6400    //TX_FDDRC_THRD_3_0
-805    0x6400    //TX_FDDRC_THRD_3_1
-806    0x6400    //TX_FDDRC_THRD_3_2
-807    0x6400    //TX_FDDRC_THRD_3_3
-808    0x2000    //TX_FDDRC_SLANT_0_0
-809    0x2000    //TX_FDDRC_SLANT_0_1
-810    0x2000    //TX_FDDRC_SLANT_0_2
-811    0x2000    //TX_FDDRC_SLANT_0_3
-812    0x5333    //TX_FDDRC_SLANT_1_0
-813    0x5333    //TX_FDDRC_SLANT_1_1
-814    0x5333    //TX_FDDRC_SLANT_1_2
-815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0000    //TX_DEADMIC_SILENCE_TH
-817    0x0000    //TX_MIC_DEGRADE_TH
-818    0x0000    //TX_DEADMIC_CNT
-819    0x0000    //TX_MIC_DEGRADE_CNT
-820    0x0000    //TX_FDDRC_RESRV_4
-821    0x0000    //TX_FDDRC_RESRV_5
-822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
-829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
-833    0x4848    //TX_FFP_FP_K_METAL
-834    0x4000    //TX_A_POST_FLT_FP
-835    0x0F5C    //TX_RTO_OUTBEAM_TH
-836    0x4CCD    //TX_TPKA_FP_THD
-837    0x0000    //TX_MAX_G_FP_BLK
-838    0x0000    //TX_FFP_FADEIN
-839    0x0000    //TX_FFP_FADEOUT
-840    0x0000    //TX_WHISPERCTH
-841    0x0000    //TX_WHISPERHOLDT
-842    0x0000    //TX_WHISP_ENTHH
-843    0x0000    //TX_WHISP_ENTHL
-844    0x0000    //TX_WHISP_RTOTH
-845    0x0000    //TX_WHISP_RTOTH2
-846    0x0000    //TX_MUTE_PERIOD
-847    0x0000    //TX_FADE_IN_PERIOD
-848    0x0100    //TX_FFP_RESRV_2
-849    0x0020    //TX_FFP_RESRV_3
-850    0x0000    //TX_FFP_RESRV_4
-851    0x0000    //TX_FFP_RESRV_5
-852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0001    //TX_TDDRC_THRD_1
-856    0x1900    //TX_TDDRC_THRD_2
-857    0x1900    //TX_TDDRC_THRD_3
-858    0x3000    //TX_TDDRC_SLANT_0
-859    0x7B00    //TX_TDDRC_SLANT_1
-860    0x0C00    //TX_TDDRC_ALPHA_UP_00
-861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
-862    0x0000    //TX_TDDRC_HMNC_FLAG
-863    0x199A    //TX_TDDRC_HMNC_GAIN
-864    0x0000    //TX_TDDRC_SMT_FLAG
-865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x07F2    //TX_TDDRC_DRC_GAIN
-867    0x7FFF    //TX_TDDRC_LMT_THRD
-868    0x0000    //TX_TDDRC_LMT_ALPHA
-869    0x0000    //TX_TFMASKLTH
-870    0x0000    //TX_TFMASKLTHL
-871    0x0CCD    //TX_TFMASKHTH
-872    0x0CCD    //TX_TFMASKLTH_BINVAD
-873    0xF333    //TX_TFMASKLTH_NS_EST
-874    0x2CCD    //TX_TFMASKLTH_DOA
-875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
-877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
-878    0x2000    //TX_B_POST_FLT_MASK
-879    0x0000    //TX_B_POST_FLT_MASK1
-880    0x5333    //TX_GAIN_WIND_MASK
-881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
-882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
-883    0x7333    //TX_FASTNS_OUTIN_TH
-884    0x0CCD    //TX_FASTNS_TFMASK_TH
-885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
-886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
-887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
-888    0x0028    //TX_FASTNS_ARSPC_TH
-889    0xC000    //TX_FASTNS_MASK5_TH
-890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
-892    0x1770    //TX_FASTNS_NOISETH
-893    0xC000    //TX_FASTNS_SSA_THLFL
-894    0xC000    //TX_FASTNS_SSA_THHFL
-895    0xCCCC    //TX_FASTNS_SSA_THLFH
-896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
-902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
-904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
-907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
-910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
-921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
-927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
-928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
-929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
-930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
-931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
-932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
-938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
-941    0x0008    //TX_MIC1MUTE_CVG_TIME
-942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
-#RX
-0    0x202C    //RX_RECVFUNC_MODE_0
-1    0x0000    //RX_RECVFUNC_MODE_1
-2    0x0004    //RX_SAMPLINGFREQ_SIG
-3    0x0004    //RX_SAMPLINGFREQ_PROC
-4    0x000A    //RX_FRAME_SZ
-5    0x0000    //RX_DELAY_OPT
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0800    //RX_PGA
-11    0x7B02    //RX_A_HP
-12    0x4000    //RX_B_PE
-13    0x7800    //RX_THR_PITCH_DET_0
-14    0x7000    //RX_THR_PITCH_DET_1
-15    0x6000    //RX_THR_PITCH_DET_2
-16    0x0008    //RX_PITCH_BFR_LEN
-17    0x0003    //RX_SBD_PITCH_DET
-18    0x0100    //RX_PP_RESRV_0
-19    0x0020    //RX_PP_RESRV_1
-20    0x0500    //RX_N_SN_EST
-21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
-23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-30    0x0002    //RX_EXTRA_NS_L
-31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-35    0x199A    //RX_A_POST_FLT
-36    0x0000    //RX_LMT_THRD
-37    0x4000    //RX_LMT_ALPHA
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0002    //RX_FILTINDX
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x2000    //RX_TPKA_FP
-127    0x2000    //RX_MIN_G_FP
-128    0x0080    //RX_MAX_G_FP
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-131    0x0000    //RX_MAXLEVEL_CNG
-132    0x3000    //RX_BWE_UV_TH
-133    0x3000    //RX_BWE_UV_TH2
-134    0x1800    //RX_BWE_UV_TH3
-135    0x1000    //RX_BWE_V_TH
-136    0x04CD    //RX_BWE_GAIN1_V_TH1
-137    0x0F33    //RX_BWE_GAIN1_V_TH2
-138    0x7333    //RX_BWE_UV_EQ
-139    0x199A    //RX_BWE_V_EQ
-140    0x7333    //RX_BWE_TONE_TH
-141    0x0004    //RX_BWE_UV_HOLD_T
-142    0x6CCD    //RX_BWE_GAIN2_ALPHA
-143    0x799A    //RX_BWE_GAIN3_ALPHA
-144    0x001E    //RX_BWE_CUTOFF
-145    0x3000    //RX_BWE_GAINFILL
-146    0x3200    //RX_BWE_MAXTH_TONE
-147    0x2000    //RX_BWE_EQ_0
-148    0x2000    //RX_BWE_EQ_1
-149    0x2000    //RX_BWE_EQ_2
-150    0x2000    //RX_BWE_EQ_3
-151    0x2000    //RX_BWE_EQ_4
-152    0x2000    //RX_BWE_EQ_5
-153    0x2000    //RX_BWE_EQ_6
-154    0x0000    //RX_BWE_RESRV_0
-155    0x0000    //RX_BWE_RESRV_1
-156    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0013    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0020    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x005B    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0099    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
-9    0x1000    //RX_TDDRC_ALPHA_UP_4
-27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-33    0x7FFF    //RX_TDDRC_LIMITER_THRD
-34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0000    //RX_TDDRC_THRD_0
-113    0x0000    //RX_TDDRC_THRD_1
-114    0x1200    //RX_TDDRC_THRD_2
-115    0x1900    //RX_TDDRC_THRD_3
-116    0x3000    //RX_TDDRC_SLANT_0
-117    0x6E00    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
-119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-120    0x0000    //RX_TDDRC_HMNC_FLAG
-121    0x199A    //RX_TDDRC_HMNC_GAIN
-122    0x0001    //RX_TDDRC_SMT_FLAG
-123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0240    //RX_TDDRC_DRC_GAIN
-38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
-49    0x4848    //RX_FDEQ_GAIN_10
-50    0x4848    //RX_FDEQ_GAIN_11
-51    0x4848    //RX_FDEQ_GAIN_12
-52    0x4848    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x4848    //RX_FDEQ_GAIN_15
-55    0x4848    //RX_FDEQ_GAIN_16
-56    0x4848    //RX_FDEQ_GAIN_17
-57    0x4848    //RX_FDEQ_GAIN_18
-58    0x4848    //RX_FDEQ_GAIN_19
-59    0x4848    //RX_FDEQ_GAIN_20
-60    0x4848    //RX_FDEQ_GAIN_21
-61    0x4848    //RX_FDEQ_GAIN_22
-62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0304    //RX_FDEQ_BIN_2
-66    0x0405    //RX_FDEQ_BIN_3
-67    0x0607    //RX_FDEQ_BIN_4
-68    0x0809    //RX_FDEQ_BIN_5
-69    0x0A0B    //RX_FDEQ_BIN_6
-70    0x0C0D    //RX_FDEQ_BIN_7
-71    0x0E0F    //RX_FDEQ_BIN_8
-72    0x1011    //RX_FDEQ_BIN_9
-73    0x1214    //RX_FDEQ_BIN_10
-74    0x1618    //RX_FDEQ_BIN_11
-75    0x1C1C    //RX_FDEQ_BIN_12
-76    0x2020    //RX_FDEQ_BIN_13
-77    0x2020    //RX_FDEQ_BIN_14
-78    0x2011    //RX_FDEQ_BIN_15
-79    0x0000    //RX_FDEQ_BIN_16
-80    0x0000    //RX_FDEQ_BIN_17
-81    0x0000    //RX_FDEQ_BIN_18
-82    0x0000    //RX_FDEQ_BIN_19
-83    0x0000    //RX_FDEQ_BIN_20
-84    0x0000    //RX_FDEQ_BIN_21
-85    0x0000    //RX_FDEQ_BIN_22
-86    0x0000    //RX_FDEQ_BIN_23
-87    0x4000    //RX_FDEQ_RESRV_0
-88    0x0320    //RX_FDEQ_RESRV_1
-89    0x0018    //RX_FDDRC_BAND_MARGIN_0
-90    0x0030    //RX_FDDRC_BAND_MARGIN_1
-91    0x0050    //RX_FDDRC_BAND_MARGIN_2
-92    0x0080    //RX_FDDRC_BAND_MARGIN_3
-93    0x0007    //RX_FDDRC_BLOCK_EXP
-94    0x5000    //RX_FDDRC_THRD_2_0
-95    0x5000    //RX_FDDRC_THRD_2_1
-96    0x5000    //RX_FDDRC_THRD_2_2
-97    0x5000    //RX_FDDRC_THRD_2_3
-98    0x6400    //RX_FDDRC_THRD_3_0
-99    0x6400    //RX_FDDRC_THRD_3_1
-100    0x6400    //RX_FDDRC_THRD_3_2
-101    0x6400    //RX_FDDRC_THRD_3_3
-102    0x2000    //RX_FDDRC_SLANT_0_0
-103    0x2000    //RX_FDDRC_SLANT_0_1
-104    0x2000    //RX_FDDRC_SLANT_0_2
-105    0x2000    //RX_FDDRC_SLANT_0_3
-106    0x5333    //RX_FDDRC_SLANT_1_0
-107    0x5333    //RX_FDDRC_SLANT_1_1
-108    0x5333    //RX_FDDRC_SLANT_1_2
-109    0x5333    //RX_FDDRC_SLANT_1_3
-110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0100    //RX_SPK_VOL
-130    0x0000    //RX_VOL_RESRV_0
-#RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
-158    0x0000    //RX_RECVFUNC_MODE_1
-159    0x0004    //RX_SAMPLINGFREQ_SIG
-160    0x0004    //RX_SAMPLINGFREQ_PROC
-161    0x000A    //RX_FRAME_SZ
-162    0x0000    //RX_DELAY_OPT
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0800    //RX_PGA
-168    0x7B02    //RX_A_HP
-169    0x4000    //RX_B_PE
-170    0x7800    //RX_THR_PITCH_DET_0
-171    0x7000    //RX_THR_PITCH_DET_1
-172    0x6000    //RX_THR_PITCH_DET_2
-173    0x0008    //RX_PITCH_BFR_LEN
-174    0x0003    //RX_SBD_PITCH_DET
-175    0x0100    //RX_PP_RESRV_0
-176    0x0020    //RX_PP_RESRV_1
-177    0x0500    //RX_N_SN_EST
-178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
-180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-187    0x0002    //RX_EXTRA_NS_L
-188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-192    0x199A    //RX_A_POST_FLT
-193    0x0000    //RX_LMT_THRD
-194    0x4000    //RX_LMT_ALPHA
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-268    0x0002    //RX_FILTINDX
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x2000    //RX_TPKA_FP
-284    0x2000    //RX_MIN_G_FP
-285    0x0080    //RX_MAX_G_FP
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-288    0x0000    //RX_MAXLEVEL_CNG
-289    0x3000    //RX_BWE_UV_TH
-290    0x3000    //RX_BWE_UV_TH2
-291    0x1800    //RX_BWE_UV_TH3
-292    0x1000    //RX_BWE_V_TH
-293    0x04CD    //RX_BWE_GAIN1_V_TH1
-294    0x0F33    //RX_BWE_GAIN1_V_TH2
-295    0x7333    //RX_BWE_UV_EQ
-296    0x199A    //RX_BWE_V_EQ
-297    0x7333    //RX_BWE_TONE_TH
-298    0x0004    //RX_BWE_UV_HOLD_T
-299    0x6CCD    //RX_BWE_GAIN2_ALPHA
-300    0x799A    //RX_BWE_GAIN3_ALPHA
-301    0x001E    //RX_BWE_CUTOFF
-302    0x3000    //RX_BWE_GAINFILL
-303    0x3200    //RX_BWE_MAXTH_TONE
-304    0x2000    //RX_BWE_EQ_0
-305    0x2000    //RX_BWE_EQ_1
-306    0x2000    //RX_BWE_EQ_2
-307    0x2000    //RX_BWE_EQ_3
-308    0x2000    //RX_BWE_EQ_4
-309    0x2000    //RX_BWE_EQ_5
-310    0x2000    //RX_BWE_EQ_6
-311    0x0000    //RX_BWE_RESRV_0
-312    0x0000    //RX_BWE_RESRV_1
-313    0x0000    //RX_BWE_RESRV_2
-#VOL    0
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    1
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0013    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    2
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0020    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    3
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    4
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x005B    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    5
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0099    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-#VOL    6
-163    0x1000    //RX_TDDRC_ALPHA_UP_1
-164    0x1000    //RX_TDDRC_ALPHA_UP_2
-165    0x1000    //RX_TDDRC_ALPHA_UP_3
-166    0x1000    //RX_TDDRC_ALPHA_UP_4
-184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
-190    0x7FFF    //RX_TDDRC_LIMITER_THRD
-191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0000    //RX_TDDRC_THRD_0
-270    0x0000    //RX_TDDRC_THRD_1
-271    0x1200    //RX_TDDRC_THRD_2
-272    0x1900    //RX_TDDRC_THRD_3
-273    0x3000    //RX_TDDRC_SLANT_0
-274    0x6E00    //RX_TDDRC_SLANT_1
-275    0x1000    //RX_TDDRC_ALPHA_UP_0
-276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
-277    0x0000    //RX_TDDRC_HMNC_FLAG
-278    0x199A    //RX_TDDRC_HMNC_GAIN
-279    0x0001    //RX_TDDRC_SMT_FLAG
-280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0240    //RX_TDDRC_DRC_GAIN
-195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
-206    0x4848    //RX_FDEQ_GAIN_10
-207    0x4848    //RX_FDEQ_GAIN_11
-208    0x4848    //RX_FDEQ_GAIN_12
-209    0x4848    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x4848    //RX_FDEQ_GAIN_15
-212    0x4848    //RX_FDEQ_GAIN_16
-213    0x4848    //RX_FDEQ_GAIN_17
-214    0x4848    //RX_FDEQ_GAIN_18
-215    0x4848    //RX_FDEQ_GAIN_19
-216    0x4848    //RX_FDEQ_GAIN_20
-217    0x4848    //RX_FDEQ_GAIN_21
-218    0x4848    //RX_FDEQ_GAIN_22
-219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0304    //RX_FDEQ_BIN_2
-223    0x0405    //RX_FDEQ_BIN_3
-224    0x0607    //RX_FDEQ_BIN_4
-225    0x0809    //RX_FDEQ_BIN_5
-226    0x0A0B    //RX_FDEQ_BIN_6
-227    0x0C0D    //RX_FDEQ_BIN_7
-228    0x0E0F    //RX_FDEQ_BIN_8
-229    0x1011    //RX_FDEQ_BIN_9
-230    0x1214    //RX_FDEQ_BIN_10
-231    0x1618    //RX_FDEQ_BIN_11
-232    0x1C1C    //RX_FDEQ_BIN_12
-233    0x2020    //RX_FDEQ_BIN_13
-234    0x2020    //RX_FDEQ_BIN_14
-235    0x2011    //RX_FDEQ_BIN_15
-236    0x0000    //RX_FDEQ_BIN_16
-237    0x0000    //RX_FDEQ_BIN_17
-238    0x0000    //RX_FDEQ_BIN_18
-239    0x0000    //RX_FDEQ_BIN_19
-240    0x0000    //RX_FDEQ_BIN_20
-241    0x0000    //RX_FDEQ_BIN_21
-242    0x0000    //RX_FDEQ_BIN_22
-243    0x0000    //RX_FDEQ_BIN_23
-244    0x4000    //RX_FDEQ_RESRV_0
-245    0x0320    //RX_FDEQ_RESRV_1
-246    0x0018    //RX_FDDRC_BAND_MARGIN_0
-247    0x0030    //RX_FDDRC_BAND_MARGIN_1
-248    0x0050    //RX_FDDRC_BAND_MARGIN_2
-249    0x0080    //RX_FDDRC_BAND_MARGIN_3
-250    0x0007    //RX_FDDRC_BLOCK_EXP
-251    0x5000    //RX_FDDRC_THRD_2_0
-252    0x5000    //RX_FDDRC_THRD_2_1
-253    0x5000    //RX_FDDRC_THRD_2_2
-254    0x5000    //RX_FDDRC_THRD_2_3
-255    0x6400    //RX_FDDRC_THRD_3_0
-256    0x6400    //RX_FDDRC_THRD_3_1
-257    0x6400    //RX_FDDRC_THRD_3_2
-258    0x6400    //RX_FDDRC_THRD_3_3
-259    0x2000    //RX_FDDRC_SLANT_0_0
-260    0x2000    //RX_FDDRC_SLANT_0_1
-261    0x2000    //RX_FDDRC_SLANT_0_2
-262    0x2000    //RX_FDDRC_SLANT_0_3
-263    0x5333    //RX_FDDRC_SLANT_1_0
-264    0x5333    //RX_FDDRC_SLANT_1_1
-265    0x5333    //RX_FDDRC_SLANT_1_2
-266    0x5333    //RX_FDDRC_SLANT_1_3
-267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0100    //RX_SPK_VOL
-287    0x0000    //RX_VOL_RESRV_0
-
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-NB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -32069,18 +26980,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -32089,8 +27000,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -32176,7 +27087,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
+128    0x7652    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x5000    //TX_THR_PITCH_DET_0
 131    0x4800    //TX_THR_PITCH_DET_1
@@ -32186,11 +27097,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -32198,28 +27109,28 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
+150    0x7B00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0200    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1800    //TX_MIN_EQ_RE_EST_7
-160    0x1800    //TX_MIN_EQ_RE_EST_8
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x2000    //TX_MIN_EQ_RE_EST_3
+156    0x2000    //TX_MIN_EQ_RE_EST_4
+157    0x2000    //TX_MIN_EQ_RE_EST_5
+158    0x2000    //TX_MIN_EQ_RE_EST_6
+159    0x2000    //TX_MIN_EQ_RE_EST_7
+160    0x2000    //TX_MIN_EQ_RE_EST_8
 161    0x3000    //TX_MIN_EQ_RE_EST_9
 162    0x4000    //TX_MIN_EQ_RE_EST_10
 163    0x6000    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
+165    0x6000    //TX_LAMBDA_RE_EST
 166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x4000    //TX_C_POST_FLT
+167    0x2000    //TX_C_POST_FLT
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0008    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -32245,14 +27156,14 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FEE    //TX_DTD_THR1_0
+198    0x7FEE    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x7EF4    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
+204    0x0CCD    //TX_DTD_THR2_0
 205    0x0CCD    //TX_DTD_THR2_1
 206    0x0CCD    //TX_DTD_THR2_2
 207    0x0CCD    //TX_DTD_THR2_3
@@ -32261,7 +27172,7 @@
 210    0x0CCD    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x1F40    //TX_DT_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -32271,18 +27182,18 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x1000    //TX_ADPT_STRICT_L
 222    0x1000    //TX_ADPT_STRICT_H
-223    0x0001    //TX_RATIO_DT_L_TH_LOW
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x0640    //TX_RATIO_DT_L_TH_HIGH
+225    0x157C    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
+228    0x1000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x05DC    //TX_RATIO_DT_L0_TH_HIGH
+234    0x0BB8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -32290,10 +27201,10 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -32301,7 +27212,7 @@
 250    0x0050    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0080    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x01A0    //TX_DELTA_THR_SN_EST_6
@@ -32315,12 +27226,12 @@
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
+267    0x0018    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
 269    0x2000    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
+272    0x0800    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
 274    0x0800    //TX_MAINREFRTOH_TH_H
 275    0x0800    //TX_MAINREFRTOH_TH_L
@@ -32330,7 +27241,7 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0012    //TX_NS_LVL_CTRL_1
+282    0x0020    //TX_NS_LVL_CTRL_1
 283    0x0015    //TX_NS_LVL_CTRL_2
 284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
@@ -32338,20 +27249,20 @@
 287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
+290    0x0004    //TX_MIN_GAIN_S_1
 291    0x000F    //TX_MIN_GAIN_S_2
 292    0x000F    //TX_MIN_GAIN_S_3
 293    0x000F    //TX_MIN_GAIN_S_4
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
+297    0x2000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x3000    //TX_SNRI_SUP_1
+301    0x4000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -32363,17 +27274,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x3000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
+323    0x7000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
 326    0x3000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -32387,8 +27298,8 @@
 336    0x6000    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
+339    0x7000    //TX_LAMBDA_PFILT_S_0
+340    0x7400    //TX_LAMBDA_PFILT_S_1
 341    0x7900    //TX_LAMBDA_PFILT_S_2
 342    0x7000    //TX_LAMBDA_PFILT_S_3
 343    0x7D00    //TX_LAMBDA_PFILT_S_4
@@ -32402,32 +27313,32 @@
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
 353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0100    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x7000    //TX_C_POST_FLT_DT
+358    0x0080    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
-360    0x01B0    //TX_DT_BOOST
+360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
 362    0x0005    //TX_BF_DVG_TH
 363    0x001E    //TX_SN_C_F
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x003B    //TX_NOISE_TH_0
+367    0x0023    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0FA0    //TX_NOISE_TH_6
-379    0x00C8    //TX_MINENOISE_TH
+379    0x000A    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x3A98    //TX_RATIODTL_CUT_TH
@@ -32440,12 +27351,12 @@
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
+392    0x7000    //TX_TAIL_DET_TH
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -32454,7 +27365,7 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0032    //TX_MINENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -32557,25 +27468,25 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -32593,38 +27504,38 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x5050    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
+567    0x5250    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x483C    //TX_FDEQ_GAIN_3
-571    0x3034    //TX_FDEQ_GAIN_4
-572    0x3048    //TX_FDEQ_GAIN_5
-573    0x4840    //TX_FDEQ_GAIN_6
-574    0x403C    //TX_FDEQ_GAIN_7
-575    0x262C    //TX_FDEQ_GAIN_8
-576    0x3A3C    //TX_FDEQ_GAIN_9
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x303C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -32673,8 +27584,8 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4A4C    //TX_PREEQ_GAIN_MIC0_8
-626    0x4E50    //TX_PREEQ_GAIN_MIC0_9
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
 627    0x4848    //TX_PREEQ_GAIN_MIC0_10
 628    0x4848    //TX_PREEQ_GAIN_MIC0_11
 629    0x4848    //TX_PREEQ_GAIN_MIC0_12
@@ -32721,9 +27632,9 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4846    //TX_PREEQ_GAIN_MIC1_7
-674    0x4544    //TX_PREEQ_GAIN_MIC1_8
-675    0x4241    //TX_PREEQ_GAIN_MIC1_9
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -32769,10 +27680,10 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
 725    0x4848    //TX_PREEQ_GAIN_MIC2_10
 726    0x4848    //TX_PREEQ_GAIN_MIC2_11
 727    0x4848    //TX_PREEQ_GAIN_MIC2_12
@@ -32787,16 +27698,16 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0000    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
 749    0x0000    //TX_PREEQ_BIN_MIC2_10
 750    0x0000    //TX_PREEQ_BIN_MIC2_11
 751    0x0000    //TX_PREEQ_BIN_MIC2_12
@@ -32821,7 +27732,7 @@
 770    0x0044    //TX_MIC_PWR_BIAS_1
 771    0x0044    //TX_MIC_PWR_BIAS_2
 772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
@@ -32839,7 +27750,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -32864,23 +27775,23 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
+830    0x0130    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
 833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
@@ -32902,8 +27813,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
 856    0x1800    //TX_TDDRC_THRD_2
 857    0x1800    //TX_TDDRC_THRD_3
 858    0x7FFF    //TX_TDDRC_SLANT_0
@@ -32914,7 +27825,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0A00    //TX_TDDRC_DRC_GAIN
+866    0x1C2F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -32924,7 +27835,7 @@
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
 875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
@@ -32946,72 +27857,98 @@
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0300    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7F00    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7F44    //TX_DTD_THR1_MICMUTE_0
+912    0x7EF4    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x7F26    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -33033,11 +27970,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -33199,10 +28136,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33298,10 +28235,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33397,10 +28334,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33496,10 +28433,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33595,10 +28532,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33694,10 +28631,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33793,10 +28730,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -33862,7 +28799,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -33884,11 +28821,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -34050,10 +28987,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34149,10 +29086,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34248,10 +29185,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34347,10 +29284,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34446,10 +29383,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34545,10 +29482,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34644,10 +29581,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -34714,15 +29651,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -34739,18 +29675,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -34759,8 +29695,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -34831,8 +29767,8 @@
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
 112    0x4000    //TX_NFC_GAINFAC
-113    0x0004    //TX_MAINMIC_BLKFACTOR
-114    0x0004    //TX_REFMIC_BLKFACTOR
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
 115    0x0000    //TX_BLMIC_BLKFACTOR
 116    0x0000    //TX_BRMIC_BLKFACTOR
 117    0x0031    //TX_MICBLK_START_BIN
@@ -34856,11 +29792,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -34868,10 +29804,10 @@
 147    0x0300    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6800    //TX_EAD_THR
+150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
 154    0x0200    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
 156    0x0200    //TX_MIN_EQ_RE_EST_4
@@ -34882,14 +29818,14 @@
 161    0x1000    //TX_MIN_EQ_RE_EST_9
 162    0x1000    //TX_MIN_EQ_RE_EST_10
 163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x1B00    //TX_LAMBDA_RE_EST
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0020    //TX_DT2_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -34915,15 +29851,15 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x76D0    //TX_DTD_THR1_0
-198    0x76D0    //TX_DTD_THR1_1
-199    0x76D0    //TX_DTD_THR1_2
+197    0x7FF8    //TX_DTD_THR1_0
+198    0x7FF8    //TX_DTD_THR1_1
+199    0x7FEE    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
 206    0x5000    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
@@ -34931,8 +29867,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0010    //TX_DT_CUT_THR
+213    0x1F40    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -34941,18 +29877,18 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x044C    //TX_RATIO_DT_L_TH_HIGH
-226    0x7800    //TX_RATIO_DT_H_TH_HIGH
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+228    0x4000    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -34960,10 +29896,10 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
+244    0xF400    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -34971,7 +29907,7 @@
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
@@ -35001,30 +29937,30 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
+283    0x0014    //TX_NS_LVL_CTRL_2
 284    0x0016    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
 287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
+290    0x0020    //TX_MIN_GAIN_S_1
 291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
+292    0x0018    //TX_MIN_GAIN_S_3
 293    0x0010    //TX_MIN_GAIN_S_4
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x0010    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
+297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x2000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -35035,15 +29971,15 @@
 314    0x5000    //TX_A_POST_FILT_S_0
 315    0x4C00    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
+317    0x7FFF    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x7FFF    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -35058,9 +29994,9 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -35071,12 +30007,12 @@
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -35085,23 +30021,23 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0102    //TX_NOISE_TH_0
+367    0x001E    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
-371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
+370    0x0320    //TX_NOISE_TH_1
+371    0x0384    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
-379    0x00F8    //TX_MINENOISE_TH
+379    0x0033    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -35110,25 +30046,25 @@
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
+392    0x7FFF    //TX_TAIL_DET_TH
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x00DC    //TX_MINENOISE_MIC0_TH
+406    0x001E    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -35227,25 +30163,25 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -35263,42 +30199,42 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
-567    0x5454    //TX_FDEQ_GAIN_0
-568    0x5448    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4850    //TX_FDEQ_GAIN_5
-573    0x5050    //TX_FDEQ_GAIN_6
-574    0x5448    //TX_FDEQ_GAIN_7
-575    0x464C    //TX_FDEQ_GAIN_8
-576    0x5050    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
+567    0x5048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x5152    //TX_FDEQ_GAIN_6
+574    0x584F    //TX_FDEQ_GAIN_7
+575    0x4950    //TX_FDEQ_GAIN_8
+576    0x4C48    //TX_FDEQ_GAIN_9
+577    0x3D40    //TX_FDEQ_GAIN_10
+578    0x4240    //TX_FDEQ_GAIN_11
+579    0x4C4C    //TX_FDEQ_GAIN_12
+580    0x4C4C    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -35343,12 +30279,12 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x484A    //TX_PREEQ_GAIN_MIC0_8
-626    0x4B4C    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4A    //TX_PREEQ_GAIN_MIC0_10
-628    0x4A48    //TX_PREEQ_GAIN_MIC0_11
-629    0x4C4C    //TX_PREEQ_GAIN_MIC0_12
-630    0x4C4C    //TX_PREEQ_GAIN_MIC0_13
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
@@ -35391,13 +30327,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4846    //TX_PREEQ_GAIN_MIC1_7
-674    0x4544    //TX_PREEQ_GAIN_MIC1_8
-675    0x4241    //TX_PREEQ_GAIN_MIC1_9
-676    0x403E    //TX_PREEQ_GAIN_MIC1_10
-677    0x3D3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3C3C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -35417,11 +30353,11 @@
 696    0x0708    //TX_PREEQ_BIN_MIC1_6
 697    0x090A    //TX_PREEQ_BIN_MIC1_7
 698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0F10    //TX_PREEQ_BIN_MIC1_9
-700    0x1011    //TX_PREEQ_BIN_MIC1_10
-701    0x1112    //TX_PREEQ_BIN_MIC1_11
-702    0x1208    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -35436,19 +30372,19 @@
 715    0x4848    //TX_PREEQ_GAIN_MIC2_0
 716    0x4848    //TX_PREEQ_GAIN_MIC2_1
 717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -35472,7 +30408,7 @@
 751    0x0808    //TX_PREEQ_BIN_MIC2_12
 752    0x0808    //TX_PREEQ_BIN_MIC2_13
 753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -35491,8 +30427,8 @@
 770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -35509,7 +30445,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -35534,23 +30470,23 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
 833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
@@ -35572,19 +30508,19 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
 856    0x1800    //TX_TDDRC_THRD_2
 857    0x1800    //TX_TDDRC_THRD_3
 858    0x7FFF    //TX_TDDRC_SLANT_0
 859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0C97    //TX_TDDRC_DRC_GAIN
+866    0x20C6    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -35616,72 +30552,98 @@
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02EE    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7FFF    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+914    0x7918    //TX_DTD_THR1_MICMUTE_3
+915    0x7000    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C0A    //TX_TFMASKM4_2_DT_THR
+945    0x2710    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -35703,11 +30665,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -36532,7 +31494,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -36554,11 +31516,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -37384,15 +32346,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -37409,18 +32370,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -37429,8 +32390,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -37516,7 +32477,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
+128    0x7B02    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x5000    //TX_THR_PITCH_DET_0
 131    0x4800    //TX_THR_PITCH_DET_1
@@ -37526,11 +32487,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -37538,28 +32499,28 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
 159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x0880    //TX_LAMBDA_RE_EST
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
 166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -37586,23 +32547,23 @@
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
 197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+198    0x7FF3    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
 204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
 209    0x5000    //TX_DTD_THR2_5
 210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
+211    0x6CCC    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -37611,18 +32572,18 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x733C    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x3A98    //TX_RATIO_DT_L0_TH_HIGH
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -37630,21 +32591,21 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
+256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -37662,61 +32623,61 @@
 271    0x799A    //TX_LAMBDA_EQ_BF
 272    0x1000    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
 276    0x0800    //TX_MAINREFRTO_TH_H
 277    0x0800    //TX_MAINREFRTO_TH_L
 278    0x0200    //TX_MAINREFRTO_TH_EQ
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1400    //TX_SNRI_SUP_1
-302    0x1400    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x1400    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
 317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x7C00    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
+324    0x7000    //TX_B_POST_FILT_2
 325    0x6000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
+328    0x6000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
@@ -37726,17 +32687,17 @@
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
 336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -37744,9 +32705,9 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
+356    0x2000    //TX_DT_BINVAD_TH_3
 357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -37755,23 +32716,23 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0383    //TX_NOISE_TH_0
+367    0x0050    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
+370    0x0FA0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0DAC    //TX_NOISE_TH_6
-379    0x044C    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
+383    0x07D0    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -37785,20 +32746,20 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x02F3    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -37897,25 +32858,25 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -37933,44 +32894,44 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
-567    0x5450    //TX_FDEQ_GAIN_0
-568    0x4C48    //TX_FDEQ_GAIN_1
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
+571    0x4B48    //TX_FDEQ_GAIN_4
 572    0x484E    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x584E    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x564E    //TX_FDEQ_GAIN_9
-577    0x5058    //TX_FDEQ_GAIN_10
-578    0x625C    //TX_FDEQ_GAIN_11
-579    0x6C6C    //TX_FDEQ_GAIN_12
-580    0x7086    //TX_FDEQ_GAIN_13
-581    0x869C    //TX_FDEQ_GAIN_14
-582    0xB0B0    //TX_FDEQ_GAIN_15
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -37994,7 +32955,7 @@
 603    0x1B1E    //TX_FDEQ_BIN_12
 604    0x1E1E    //TX_FDEQ_BIN_13
 605    0x1E28    //TX_FDEQ_BIN_14
-606    0x284A    //TX_FDEQ_BIN_15
+606    0x282C    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -38004,7 +32965,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -38013,14 +32974,14 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x494A    //TX_PREEQ_GAIN_MIC0_8
-626    0x4B4C    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4A    //TX_PREEQ_GAIN_MIC0_10
-628    0x484B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4C4C    //TX_PREEQ_GAIN_MIC0_12
-630    0x4B48    //TX_PREEQ_GAIN_MIC0_13
-631    0x3838    //TX_PREEQ_GAIN_MIC0_14
-632    0x3835    //TX_PREEQ_GAIN_MIC0_15
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
@@ -38035,17 +32996,17 @@
 644    0x0304    //TX_PREEQ_BIN_MIC0_3
 645    0x0405    //TX_PREEQ_BIN_MIC0_4
 646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
 651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -38053,7 +33014,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -38061,16 +33022,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4846    //TX_PREEQ_GAIN_MIC1_7
-674    0x4544    //TX_PREEQ_GAIN_MIC1_8
-675    0x4241    //TX_PREEQ_GAIN_MIC1_9
-676    0x403E    //TX_PREEQ_GAIN_MIC1_10
-677    0x3D3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3C3C    //TX_PREEQ_GAIN_MIC1_12
-679    0x3C39    //TX_PREEQ_GAIN_MIC1_13
-680    0x3838    //TX_PREEQ_GAIN_MIC1_14
-681    0x3A3C    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -38084,17 +33045,17 @@
 693    0x0304    //TX_PREEQ_BIN_MIC1_3
 694    0x0405    //TX_PREEQ_BIN_MIC1_4
 695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
 700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1719    //TX_PREEQ_BIN_MIC1_11
-702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
-704    0x1E28    //TX_PREEQ_BIN_MIC1_14
-705    0x282C    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -38109,16 +33070,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -38127,22 +33088,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
 744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -38158,12 +33119,12 @@
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
+775    0x000F    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
@@ -38179,7 +33140,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -38204,23 +33165,23 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
 833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
@@ -38242,8 +33203,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
 856    0x1800    //TX_TDDRC_THRD_2
 857    0x1800    //TX_TDDRC_THRD_3
 858    0x7FFF    //TX_TDDRC_SLANT_0
@@ -38254,7 +33215,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
+866    0x237B    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -38279,79 +33240,105 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -38373,11 +33360,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -39202,7 +34189,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -39224,11 +34211,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0x9000    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -40054,16 +35041,15 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x6B7C    //TX_SENDFUNC_MODE_0
+3    0x4B7C    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
+5    0x0003    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -40079,18 +35065,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -40196,11 +35182,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -40223,7 +35209,7 @@
 162    0x7FFF    //TX_MIN_EQ_RE_EST_10
 163    0x7FFF    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x0700    //TX_LAMBDA_RE_EST
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x0CCD    //TX_LAMBDA_CB_NLE
 167    0x2000    //TX_C_POST_FLT
 168    0x7FFF    //TX_GAIN_NP
@@ -40283,16 +35269,16 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1194    //TX_RATIO_DT_L_TH_HIGH
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+228    0x2000    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x0A28    //TX_RATIO_DT_L0_TH_HIGH
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -40300,7 +35286,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
 245    0xFB00    //TX_THR_SN_EST_3
@@ -40405,14 +35391,14 @@
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
 346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0180    //TX_K_PEPPER
+347    0x0000    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x2000    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
 355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0200    //TX_DT_BINVAD_TH_3
 357    0x1F40    //TX_DT_BINVAD_ENDF
@@ -40425,7 +35411,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x04E8    //TX_NOISE_TH_0
+367    0x0050    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -40437,11 +35423,11 @@
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x2710    //TX_NOISE_TH_6
-379    0x02BC    //TX_MINENOISE_TH
+379    0x0033    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -40455,16 +35441,16 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x04E7    //TX_MINENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -40572,20 +35558,20 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -40603,44 +35589,44 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x484C    //TX_FDEQ_GAIN_3
-571    0x4C4C    //TX_FDEQ_GAIN_4
-572    0x544C    //TX_FDEQ_GAIN_5
-573    0x5454    //TX_FDEQ_GAIN_6
-574    0x5454    //TX_FDEQ_GAIN_7
-575    0x585A    //TX_FDEQ_GAIN_8
-576    0x5C5C    //TX_FDEQ_GAIN_9
-577    0x6068    //TX_FDEQ_GAIN_10
-578    0x8894    //TX_FDEQ_GAIN_11
-579    0x94B4    //TX_FDEQ_GAIN_12
-580    0xB4C7    //TX_FDEQ_GAIN_13
-581    0xC7C6    //TX_FDEQ_GAIN_14
-582    0xC6C6    //TX_FDEQ_GAIN_15
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -40674,24 +35660,24 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4849    //TX_PREEQ_GAIN_MIC0_6
-624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4838    //TX_PREEQ_GAIN_MIC0_12
-630    0x3858    //TX_PREEQ_GAIN_MIC0_13
-631    0x7060    //TX_PREEQ_GAIN_MIC0_14
-632    0x9870    //TX_PREEQ_GAIN_MIC0_15
-633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
 636    0x4848    //TX_PREEQ_GAIN_MIC0_19
@@ -40705,17 +35691,17 @@
 644    0x0304    //TX_PREEQ_BIN_MIC0_3
 645    0x0405    //TX_PREEQ_BIN_MIC0_4
 646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
 650    0x0C10    //TX_PREEQ_BIN_MIC0_9
 651    0x1013    //TX_PREEQ_BIN_MIC0_10
 652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -40730,15 +35716,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4645    //TX_PREEQ_GAIN_MIC1_6
-673    0x4442    //TX_PREEQ_GAIN_MIC1_7
-674    0x4140    //TX_PREEQ_GAIN_MIC1_8
-675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
-676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
-677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3938    //TX_PREEQ_GAIN_MIC1_12
-679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
-680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -40748,23 +35734,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -40849,7 +35835,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -40881,12 +35867,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -40911,20 +35897,20 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
+853    0x0004    //TX_FILTINDX
 854    0x0004    //TX_TDDRC_THRD_0
 855    0x0016    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
 860    0x0C00    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0B39    //TX_TDDRC_DRC_GAIN
+866    0x0A98    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -40949,7 +35935,7 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -40964,7 +35950,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -40991,37 +35977,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -41043,11 +36055,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0500    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -41872,7 +36884,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -41894,11 +36906,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0500    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -42723,15 +37735,2709 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_HEADPHONE-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF3    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x6CCC    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x27D0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x8020    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8020    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-NB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2B28    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
@@ -42758,9 +40464,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -42850,7 +40556,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -42866,11 +40572,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -43125,7 +40831,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -43252,10 +40958,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -43273,38 +40979,38 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x6048    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
 571    0x4848    //TX_FDEQ_GAIN_4
 572    0x4848    //TX_FDEQ_GAIN_5
-573    0x4848    //TX_FDEQ_GAIN_6
-574    0x4848    //TX_FDEQ_GAIN_7
-575    0x4848    //TX_FDEQ_GAIN_8
-576    0x4848    //TX_FDEQ_GAIN_9
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4242    //TX_FDEQ_GAIN_7
+575    0x3C34    //TX_FDEQ_GAIN_8
+576    0x343A    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -43319,8 +41025,8 @@
 588    0x4848    //TX_FDEQ_GAIN_21
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
-591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
 593    0x0303    //TX_FDEQ_BIN_2
 594    0x0304    //TX_FDEQ_BIN_3
 595    0x0405    //TX_FDEQ_BIN_4
@@ -43328,7 +41034,7 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D08    //TX_FDEQ_BIN_9
+600    0x0D0E    //TX_FDEQ_BIN_9
 601    0x0000    //TX_FDEQ_BIN_10
 602    0x0000    //TX_FDEQ_BIN_11
 603    0x0000    //TX_FDEQ_BIN_12
@@ -43551,12 +41257,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -43594,7 +41300,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x0650    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -43634,7 +41340,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -43661,37 +41367,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x2024    //RX_RECVFUNC_MODE_0
+0    0xA024    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -43713,11 +41445,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -43805,8 +41537,8 @@
 111    0x0002    //RX_FILTINDX
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -43815,12 +41547,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0478    //RX_TDDRC_DRC_GAIN
+124    0x0200    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -43861,8 +41593,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -43879,10 +41611,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -43945,7 +41677,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -43960,8 +41692,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -43978,10 +41710,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -44044,7 +41776,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -44059,8 +41791,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44077,10 +41809,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -44143,7 +41875,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -44158,8 +41890,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44176,10 +41908,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -44242,7 +41974,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -44257,8 +41989,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44275,10 +42007,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -44356,8 +42088,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44374,10 +42106,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -44455,8 +42187,8 @@
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0000    //RX_TDDRC_THRD_0
 113    0x0000    //RX_TDDRC_THRD_1
-114    0x2030    //RX_TDDRC_THRD_2
-115    0x2030    //RX_TDDRC_THRD_3
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
 116    0x0800    //RX_TDDRC_SLANT_0
 117    0x7EB8    //RX_TDDRC_SLANT_1
 118    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44473,10 +42205,10 @@
 42    0x4848    //RX_FDEQ_GAIN_3
 43    0x4848    //RX_FDEQ_GAIN_4
 44    0x4848    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4444    //RX_FDEQ_GAIN_7
 47    0x4848    //RX_FDEQ_GAIN_8
-48    0x4848    //RX_FDEQ_GAIN_9
+48    0x4444    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -44542,7 +42274,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
+157    0xA024    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -44564,11 +42296,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -44656,8 +42388,8 @@
 268    0x0002    //RX_FILTINDX
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44666,12 +42398,12 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0478    //RX_TDDRC_DRC_GAIN
+281    0x0200    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
 283    0x2000    //RX_TPKA_FP
 284    0x2000    //RX_MIN_G_FP
 285    0x0080    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -44712,8 +42444,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44730,10 +42462,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -44796,7 +42528,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -44811,8 +42543,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44829,10 +42561,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -44895,7 +42627,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -44910,8 +42642,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -44928,10 +42660,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -44994,7 +42726,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0021    //RX_SPK_VOL
+286    0x0020    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45009,8 +42741,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -45027,10 +42759,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -45093,7 +42825,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0037    //RX_SPK_VOL
+286    0x0036    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -45108,8 +42840,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -45126,10 +42858,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -45207,8 +42939,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -45225,10 +42957,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -45306,8 +43038,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0000    //RX_TDDRC_THRD_0
 270    0x0000    //RX_TDDRC_THRD_1
-271    0x2030    //RX_TDDRC_THRD_2
-272    0x2030    //RX_TDDRC_THRD_3
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
 273    0x0800    //RX_TDDRC_SLANT_0
 274    0x7EB8    //RX_TDDRC_SLANT_1
 275    0x3000    //RX_TDDRC_ALPHA_UP_0
@@ -45324,10 +43056,10 @@
 199    0x4848    //RX_FDEQ_GAIN_3
 200    0x4848    //RX_FDEQ_GAIN_4
 201    0x4848    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4444    //RX_FDEQ_GAIN_7
 204    0x4848    //RX_FDEQ_GAIN_8
-205    0x4848    //RX_FDEQ_GAIN_9
+205    0x4444    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -45394,14 +43126,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0008    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2B28    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
@@ -45428,9 +43159,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -45520,7 +43251,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -45536,11 +43267,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -45795,7 +43526,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -45922,10 +43653,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -45943,29 +43674,29 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x001C    //TX_FDEQ_SUBNUM
-567    0x4848    //TX_FDEQ_GAIN_0
+567    0x6056    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
 570    0x4848    //TX_FDEQ_GAIN_3
@@ -45990,7 +43721,7 @@
 589    0x4848    //TX_FDEQ_GAIN_22
 590    0x4848    //TX_FDEQ_GAIN_23
 591    0x0202    //TX_FDEQ_BIN_0
-592    0x0203    //TX_FDEQ_BIN_1
+592    0x0302    //TX_FDEQ_BIN_1
 593    0x0303    //TX_FDEQ_BIN_2
 594    0x0304    //TX_FDEQ_BIN_3
 595    0x0405    //TX_FDEQ_BIN_4
@@ -45998,11 +43729,11 @@
 597    0x0708    //TX_FDEQ_BIN_6
 598    0x090A    //TX_FDEQ_BIN_7
 599    0x0B0C    //TX_FDEQ_BIN_8
-600    0x0D0E    //TX_FDEQ_BIN_9
+600    0x0D07    //TX_FDEQ_BIN_9
 601    0x0E0F    //TX_FDEQ_BIN_10
 602    0x0F10    //TX_FDEQ_BIN_11
 603    0x1011    //TX_FDEQ_BIN_12
-604    0x1104    //TX_FDEQ_BIN_13
+604    0x1119    //TX_FDEQ_BIN_13
 605    0x0000    //TX_FDEQ_BIN_14
 606    0x0000    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
@@ -46221,12 +43952,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -46264,7 +43995,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x05A0    //TX_TDDRC_DRC_GAIN
+866    0x0619    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -46304,7 +44035,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -46331,37 +44062,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x2024    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -46383,11 +44140,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0600    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -46490,7 +44247,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -46615,7 +44372,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -46714,7 +44471,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -46813,7 +44570,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -46912,7 +44669,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47212,7 +44969,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -47234,11 +44991,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0600    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -47341,7 +45098,7 @@
 283    0x2000    //RX_TPKA_FP
 284    0x2000    //RX_MIN_G_FP
 285    0x0080    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -47466,7 +45223,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47565,7 +45322,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47664,7 +45421,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0021    //RX_SPK_VOL
+286    0x0020    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -47763,7 +45520,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0037    //RX_SPK_VOL
+286    0x0036    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x3000    //RX_TDDRC_ALPHA_UP_1
@@ -48064,14 +45821,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x2B68    //TX_SENDFUNC_MODE_0
+3    0x2B28    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
@@ -48098,9 +45854,9 @@
 27    0x0B80    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -48190,7 +45946,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -48206,11 +45962,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -48465,7 +46221,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -48592,10 +46348,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -48613,26 +46369,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -48891,12 +46647,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -48974,7 +46730,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -49001,37 +46757,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x2024    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -49053,11 +46835,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0003    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0x9000    //RX_THR_SN_EST
 24    0x7CCD    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -49160,7 +46942,7 @@
 126    0x2000    //RX_TPKA_FP
 127    0x2000    //RX_MIN_G_FP
 128    0x0080    //RX_MAX_G_FP
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -49285,7 +47067,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x000C    //RX_SPK_VOL
+129    0x000B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -49384,7 +47166,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0014    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -49483,7 +47265,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0021    //RX_SPK_VOL
+129    0x0020    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -49582,7 +47364,7 @@
 108    0x5333    //RX_FDDRC_SLANT_1_2
 109    0x5333    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0036    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -49882,7 +47664,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2024    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
@@ -49904,11 +47686,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0003    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0x9000    //RX_THR_SN_EST
 181    0x7CCD    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -50011,7 +47793,7 @@
 283    0x2000    //RX_TPKA_FP
 284    0x2000    //RX_MIN_G_FP
 285    0x0080    //RX_MAX_G_FP
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -50136,7 +47918,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x000C    //RX_SPK_VOL
+286    0x000B    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -50235,7 +48017,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0014    //RX_SPK_VOL
+286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -50334,7 +48116,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0021    //RX_SPK_VOL
+286    0x0020    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -50433,7 +48215,7 @@
 265    0x5333    //RX_FDDRC_SLANT_1_2
 266    0x5333    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0037    //RX_SPK_VOL
+286    0x0036    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x5000    //RX_TDDRC_ALPHA_UP_1
@@ -50734,14 +48516,13 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0009    //TX_OPERATION_MODE_0
 1    0x0009    //TX_OPERATION_MODE_1
 2    0x0020    //TX_PATCH_REG
-3    0x6B6A    //TX_SENDFUNC_MODE_0
+3    0x6B2A    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
 5    0x0001    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
@@ -50768,9 +48549,9 @@
 27    0x0B4C    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -50860,7 +48641,7 @@
 119    0x0015    //TX_MICBLK_FE_HOLD
 120    0xFFF2    //TX_MICBLK_MR_EXP_TH
 121    0xFFF2    //TX_MICBLK_LR_EXP_TH
-122    0x0000    //TX_FENE_HOLD
+122    0x0015    //TX_FENE_HOLD
 123    0x4000    //TX_FE_ENER_TH_MTS
 124    0x0004    //TX_FE_ENER_TH_EXP
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
@@ -50876,11 +48657,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -51135,7 +48916,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -51262,10 +49043,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -51283,26 +49064,26 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -51561,12 +49342,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -51644,7 +49425,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -51671,37 +49452,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x202C    //RX_RECVFUNC_MODE_0
+0    0xA020    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -51723,11 +49530,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0500    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x000A    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF600    //RX_THR_SN_EST
-24    0x7000    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -52552,7 +50359,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x202C    //RX_RECVFUNC_MODE_0
+157    0xA020    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -52574,11 +50381,11 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0500    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x000A    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF600    //RX_THR_SN_EST
-181    0x7000    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -53403,8 +51210,2702 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-GOOGLE_CONDOR_CERTIFICATION1-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x05A0    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x8020    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8020    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-NB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -53438,9 +53939,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -53546,11 +54047,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -53597,7 +54098,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -53805,7 +54306,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -53932,10 +54433,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -53953,26 +54454,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -54231,12 +54732,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -54314,7 +54815,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -54341,37 +54842,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0000    //RX_SAMPLINGFREQ_SIG
 3    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -54381,8 +54908,8 @@
 7    0x1000    //RX_TDDRC_ALPHA_UP_2
 8    0x1000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0403    //RX_PGA
-11    0x7646    //RX_A_HP
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
 14    0x7000    //RX_THR_PITCH_DET_1
@@ -54393,11 +54920,11 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x4000    //RX_TDDRC_ALPHA_DWN_2
 29    0x4000    //RX_TDDRC_ALPHA_DWN_3
@@ -54410,16 +54937,16 @@
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8054    //RX_FDEQ_GAIN_1
-41    0x5050    //RX_FDEQ_GAIN_2
-42    0x5058    //RX_FDEQ_GAIN_3
-43    0x5C70    //RX_FDEQ_GAIN_4
-44    0x4848    //RX_FDEQ_GAIN_5
-45    0x484C    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x485A    //RX_FDEQ_GAIN_8
-48    0x5A58    //RX_FDEQ_GAIN_9
+39    0x5252    //RX_FDEQ_GAIN_0
+40    0x4E4F    //RX_FDEQ_GAIN_1
+41    0x4743    //RX_FDEQ_GAIN_2
+42    0x454C    //RX_FDEQ_GAIN_3
+43    0x4C49    //RX_FDEQ_GAIN_4
+44    0x584A    //RX_FDEQ_GAIN_5
+45    0x4642    //RX_FDEQ_GAIN_6
+46    0x4043    //RX_FDEQ_GAIN_7
+47    0x454A    //RX_FDEQ_GAIN_8
+48    0x4C53    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -54438,8 +54965,8 @@
 64    0x0203    //RX_FDEQ_BIN_1
 65    0x0303    //RX_FDEQ_BIN_2
 66    0x0304    //RX_FDEQ_BIN_3
-67    0x0604    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
+67    0x0503    //RX_FDEQ_BIN_4
+68    0x0107    //RX_FDEQ_BIN_5
 69    0x0708    //RX_FDEQ_BIN_6
 70    0x090A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
@@ -54482,7 +55009,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-111    0x0005    //RX_FILTINDX
+111    0x0004    //RX_FILTINDX
 112    0x0002    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
 114    0x1A00    //RX_TDDRC_THRD_2
@@ -54495,12 +55022,12 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x03C3    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1194    //RX_TPKA_FP
+126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0800    //RX_MAX_G_FP
-129    0x0015    //RX_SPK_VOL
+128    0x1500    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -54529,40 +55056,40 @@
 155    0x0000    //RX_BWE_RESRV_1
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4C68    //RX_FDEQ_GAIN_4
-44    0x403C    //RX_FDEQ_GAIN_5
-45    0x3C38    //RX_FDEQ_GAIN_6
-46    0x3430    //RX_FDEQ_GAIN_7
-47    0x303C    //RX_FDEQ_GAIN_8
-48    0x4C50    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -54577,16 +55104,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -54625,43 +55152,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x005B    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4C68    //RX_FDEQ_GAIN_4
-44    0x403C    //RX_FDEQ_GAIN_5
-45    0x3C38    //RX_FDEQ_GAIN_6
-46    0x3430    //RX_FDEQ_GAIN_7
-47    0x303C    //RX_FDEQ_GAIN_8
-48    0x4C50    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -54676,16 +55203,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -54724,43 +55251,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001B    //RX_SPK_VOL
+129    0x0089    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4C68    //RX_FDEQ_GAIN_4
-44    0x403C    //RX_FDEQ_GAIN_5
-45    0x3C38    //RX_FDEQ_GAIN_6
-46    0x3430    //RX_FDEQ_GAIN_7
-47    0x303C    //RX_FDEQ_GAIN_8
-48    0x4C50    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -54775,16 +55302,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -54823,43 +55350,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0026    //RX_SPK_VOL
+129    0x00C0    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0112    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4C68    //RX_FDEQ_GAIN_4
-44    0x403C    //RX_FDEQ_GAIN_5
-45    0x3C38    //RX_FDEQ_GAIN_6
-46    0x3430    //RX_FDEQ_GAIN_7
-47    0x303C    //RX_FDEQ_GAIN_8
-48    0x4C50    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -54874,16 +55401,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -54922,43 +55449,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0037    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0D56    //RX_TDDRC_DRC_GAIN
+124    0x0191    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4470    //RX_FDEQ_GAIN_4
-44    0x383C    //RX_FDEQ_GAIN_5
-45    0x3C3C    //RX_FDEQ_GAIN_6
-46    0x3434    //RX_FDEQ_GAIN_7
-47    0x344C    //RX_FDEQ_GAIN_8
-48    0x585C    //RX_FDEQ_GAIN_9
+39    0x8484    //RX_FDEQ_GAIN_0
+40    0x8866    //RX_FDEQ_GAIN_1
+41    0x6858    //RX_FDEQ_GAIN_2
+42    0x7077    //RX_FDEQ_GAIN_3
+43    0x8E89    //RX_FDEQ_GAIN_4
+44    0x7B71    //RX_FDEQ_GAIN_5
+45    0x6655    //RX_FDEQ_GAIN_6
+46    0x5452    //RX_FDEQ_GAIN_7
+47    0x524D    //RX_FDEQ_GAIN_8
+48    0x5A60    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -54973,16 +55500,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -55021,43 +55548,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x002C    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0D56    //RX_TDDRC_DRC_GAIN
+124    0x02A9    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4470    //RX_FDEQ_GAIN_4
-44    0x383C    //RX_FDEQ_GAIN_5
-45    0x3C3C    //RX_FDEQ_GAIN_6
-46    0x3434    //RX_FDEQ_GAIN_7
-47    0x344C    //RX_FDEQ_GAIN_8
-48    0x585C    //RX_FDEQ_GAIN_9
+39    0x9C9C    //RX_FDEQ_GAIN_0
+40    0x9D74    //RX_FDEQ_GAIN_1
+41    0x706C    //RX_FDEQ_GAIN_2
+42    0x809A    //RX_FDEQ_GAIN_3
+43    0xA6A4    //RX_FDEQ_GAIN_4
+44    0xAA99    //RX_FDEQ_GAIN_5
+45    0x775F    //RX_FDEQ_GAIN_6
+46    0x5F4A    //RX_FDEQ_GAIN_7
+47    0x4A4A    //RX_FDEQ_GAIN_8
+48    0x5060    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -55072,16 +55599,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -55120,43 +55647,43 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0051    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
-6    0x1000    //RX_TDDRC_ALPHA_UP_1
-7    0x1000    //RX_TDDRC_ALPHA_UP_2
-8    0x1000    //RX_TDDRC_ALPHA_UP_3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
-118    0x1000    //RX_TDDRC_ALPHA_UP_0
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0D56    //RX_TDDRC_DRC_GAIN
+124    0x04BB    //RX_TDDRC_DRC_GAIN
 38    0x0014    //RX_FDEQ_SUBNUM
-39    0x8080    //RX_FDEQ_GAIN_0
-40    0x8050    //RX_FDEQ_GAIN_1
-41    0x4840    //RX_FDEQ_GAIN_2
-42    0x4040    //RX_FDEQ_GAIN_3
-43    0x4470    //RX_FDEQ_GAIN_4
-44    0x383C    //RX_FDEQ_GAIN_5
-45    0x3C3C    //RX_FDEQ_GAIN_6
-46    0x3434    //RX_FDEQ_GAIN_7
-47    0x344C    //RX_FDEQ_GAIN_8
-48    0x585C    //RX_FDEQ_GAIN_9
+39    0x9C9C    //RX_FDEQ_GAIN_0
+40    0x9D74    //RX_FDEQ_GAIN_1
+41    0x706C    //RX_FDEQ_GAIN_2
+42    0x809A    //RX_FDEQ_GAIN_3
+43    0xA6A4    //RX_FDEQ_GAIN_4
+44    0xAA99    //RX_FDEQ_GAIN_5
+45    0x775F    //RX_FDEQ_GAIN_6
+46    0x5F4A    //RX_FDEQ_GAIN_7
+47    0x4A4A    //RX_FDEQ_GAIN_8
+48    0x5060    //RX_FDEQ_GAIN_9
 49    0x4848    //RX_FDEQ_GAIN_10
 50    0x4848    //RX_FDEQ_GAIN_11
 51    0x4848    //RX_FDEQ_GAIN_12
@@ -55171,16 +55698,16 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0703    //RX_FDEQ_BIN_4
-68    0x0406    //RX_FDEQ_BIN_5
-69    0x0708    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
+63    0x0302    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0C08    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D08    //RX_FDEQ_BIN_9
+72    0x1407    //RX_FDEQ_BIN_9
 73    0x0000    //RX_FDEQ_BIN_10
 74    0x0000    //RX_FDEQ_BIN_11
 75    0x0000    //RX_FDEQ_BIN_12
@@ -55222,7 +55749,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0x027C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -55232,8 +55759,8 @@
 164    0x1000    //RX_TDDRC_ALPHA_UP_2
 165    0x1000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0403    //RX_PGA
-168    0x7646    //RX_A_HP
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
 171    0x7000    //RX_THR_PITCH_DET_1
@@ -55247,8 +55774,8 @@
 179    0x0010    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x4000    //RX_TDDRC_ALPHA_DWN_2
 186    0x4000    //RX_TDDRC_ALPHA_DWN_3
@@ -55348,10 +55875,10 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x0780    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x1194    //RX_TPKA_FP
-284    0x0400    //RX_MIN_G_FP
-285    0x0800    //RX_MAX_G_FP
-286    0x0015    //RX_SPK_VOL
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -55392,8 +55919,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55405,15 +55932,15 @@
 281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4C68    //RX_FDEQ_GAIN_4
-201    0x403C    //RX_FDEQ_GAIN_5
-202    0x3C38    //RX_FDEQ_GAIN_6
-203    0x3430    //RX_FDEQ_GAIN_7
-204    0x303C    //RX_FDEQ_GAIN_8
-205    0x4C50    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -55432,7 +55959,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -55476,7 +56003,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
+286    0x0015    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -55491,8 +56018,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55504,15 +56031,15 @@
 281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4C68    //RX_FDEQ_GAIN_4
-201    0x403C    //RX_FDEQ_GAIN_5
-202    0x3C38    //RX_FDEQ_GAIN_6
-203    0x3430    //RX_FDEQ_GAIN_7
-204    0x303C    //RX_FDEQ_GAIN_8
-205    0x4C50    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -55531,7 +56058,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -55575,7 +56102,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001B    //RX_SPK_VOL
+286    0x001E    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -55590,8 +56117,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55603,15 +56130,15 @@
 281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4C68    //RX_FDEQ_GAIN_4
-201    0x403C    //RX_FDEQ_GAIN_5
-202    0x3C38    //RX_FDEQ_GAIN_6
-203    0x3430    //RX_FDEQ_GAIN_7
-204    0x303C    //RX_FDEQ_GAIN_8
-205    0x4C50    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -55630,7 +56157,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -55674,7 +56201,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0026    //RX_SPK_VOL
+286    0x002A    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -55689,8 +56216,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55702,15 +56229,15 @@
 281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4C68    //RX_FDEQ_GAIN_4
-201    0x403C    //RX_FDEQ_GAIN_5
-202    0x3C38    //RX_FDEQ_GAIN_6
-203    0x3430    //RX_FDEQ_GAIN_7
-204    0x303C    //RX_FDEQ_GAIN_8
-205    0x4C50    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -55729,7 +56256,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -55773,7 +56300,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0037    //RX_SPK_VOL
+286    0x003C    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -55788,8 +56315,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55798,18 +56325,18 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0D56    //RX_TDDRC_DRC_GAIN
+281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4470    //RX_FDEQ_GAIN_4
-201    0x383C    //RX_FDEQ_GAIN_5
-202    0x3C3C    //RX_FDEQ_GAIN_6
-203    0x3434    //RX_FDEQ_GAIN_7
-204    0x344C    //RX_FDEQ_GAIN_8
-205    0x585C    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -55828,7 +56355,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -55872,7 +56399,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x002C    //RX_SPK_VOL
+286    0x0058    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -55887,8 +56414,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55897,18 +56424,18 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0D56    //RX_TDDRC_DRC_GAIN
+281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4470    //RX_FDEQ_GAIN_4
-201    0x383C    //RX_FDEQ_GAIN_5
-202    0x3C3C    //RX_FDEQ_GAIN_6
-203    0x3434    //RX_FDEQ_GAIN_7
-204    0x344C    //RX_FDEQ_GAIN_8
-205    0x585C    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -55927,7 +56454,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -55971,7 +56498,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0051    //RX_SPK_VOL
+286    0x0082    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x1000    //RX_TDDRC_ALPHA_UP_1
@@ -55986,8 +56513,8 @@
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x1000    //RX_TDDRC_ALPHA_UP_0
@@ -55996,18 +56523,18 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0D56    //RX_TDDRC_DRC_GAIN
+281    0x0780    //RX_TDDRC_DRC_GAIN
 195    0x0014    //RX_FDEQ_SUBNUM
 196    0x8080    //RX_FDEQ_GAIN_0
-197    0x8050    //RX_FDEQ_GAIN_1
-198    0x4840    //RX_FDEQ_GAIN_2
-199    0x4040    //RX_FDEQ_GAIN_3
-200    0x4470    //RX_FDEQ_GAIN_4
-201    0x383C    //RX_FDEQ_GAIN_5
-202    0x3C3C    //RX_FDEQ_GAIN_6
-203    0x3434    //RX_FDEQ_GAIN_7
-204    0x344C    //RX_FDEQ_GAIN_8
-205    0x585C    //RX_FDEQ_GAIN_9
+197    0x8054    //RX_FDEQ_GAIN_1
+198    0x5050    //RX_FDEQ_GAIN_2
+199    0x5058    //RX_FDEQ_GAIN_3
+200    0x5C70    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x484C    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x485A    //RX_FDEQ_GAIN_8
+205    0x5A58    //RX_FDEQ_GAIN_9
 206    0x4848    //RX_FDEQ_GAIN_10
 207    0x4848    //RX_FDEQ_GAIN_11
 208    0x4848    //RX_FDEQ_GAIN_12
@@ -56026,7 +56553,7 @@
 221    0x0203    //RX_FDEQ_BIN_1
 222    0x0303    //RX_FDEQ_BIN_2
 223    0x0304    //RX_FDEQ_BIN_3
-224    0x0703    //RX_FDEQ_BIN_4
+224    0x0604    //RX_FDEQ_BIN_4
 225    0x0406    //RX_FDEQ_BIN_5
 226    0x0708    //RX_FDEQ_BIN_6
 227    0x090A    //RX_FDEQ_BIN_7
@@ -56074,7 +56601,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -56108,9 +56634,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -56216,11 +56742,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -56267,7 +56793,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -56475,7 +57001,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -56602,10 +57128,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -56623,26 +57149,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -56901,12 +57427,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -56984,7 +57510,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -57011,47 +57537,73 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0001    //RX_SAMPLINGFREQ_SIG
 3    0x0001    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0403    //RX_PGA
+10    0x0800    //RX_PGA
 11    0x7B02    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -57063,37 +57615,37 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6864    //RX_FDEQ_GAIN_1
-41    0x7070    //RX_FDEQ_GAIN_2
-42    0x6058    //RX_FDEQ_GAIN_3
-43    0x5C5C    //RX_FDEQ_GAIN_4
-44    0x8854    //RX_FDEQ_GAIN_5
-45    0x5448    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x8070    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x7070    //RX_FDEQ_GAIN_13
+39    0x847A    //RX_FDEQ_GAIN_0
+40    0x6C66    //RX_FDEQ_GAIN_1
+41    0x6868    //RX_FDEQ_GAIN_2
+42    0x7084    //RX_FDEQ_GAIN_3
+43    0x7E82    //RX_FDEQ_GAIN_4
+44    0x7874    //RX_FDEQ_GAIN_5
+45    0x5864    //RX_FDEQ_GAIN_6
+46    0x625C    //RX_FDEQ_GAIN_7
+47    0x5C50    //RX_FDEQ_GAIN_8
+48    0x545A    //RX_FDEQ_GAIN_9
+49    0x5C58    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57104,20 +57656,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
-67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0202    //RX_FDEQ_BIN_3
+67    0x0704    //RX_FDEQ_BIN_4
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57153,11 +57705,11 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1C00    //RX_TDDRC_THRD_2
-115    0x1C00    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57165,11 +57717,11 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0715    //RX_TDDRC_DRC_GAIN
+124    0x03FC    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x157C    //RX_TPKA_FP
+126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0800    //RX_MAX_G_FP
+128    0x1000    //RX_MAX_G_FP
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
@@ -57200,20 +57752,20 @@
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57221,22 +57773,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x5C5C    //RX_FDEQ_GAIN_0
-40    0x5448    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4840    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6048    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4038    //RX_FDEQ_GAIN_7
-47    0x3C48    //RX_FDEQ_GAIN_8
-48    0x545C    //RX_FDEQ_GAIN_9
-49    0x6864    //RX_FDEQ_GAIN_10
-50    0x7058    //RX_FDEQ_GAIN_11
-51    0x443C    //RX_FDEQ_GAIN_12
-52    0x3838    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57247,20 +57799,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57295,24 +57847,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0011    //RX_SPK_VOL
+129    0x005C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57320,22 +57872,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x5C5C    //RX_FDEQ_GAIN_0
-40    0x5448    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4840    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6048    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4038    //RX_FDEQ_GAIN_7
-47    0x3C48    //RX_FDEQ_GAIN_8
-48    0x545C    //RX_FDEQ_GAIN_9
-49    0x6864    //RX_FDEQ_GAIN_10
-50    0x7058    //RX_FDEQ_GAIN_11
-51    0x443C    //RX_FDEQ_GAIN_12
-52    0x3838    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57346,20 +57898,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57394,24 +57946,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0019    //RX_SPK_VOL
+129    0x0087    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57419,22 +57971,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x5C5C    //RX_FDEQ_GAIN_0
-40    0x5448    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4840    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6048    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4038    //RX_FDEQ_GAIN_7
-47    0x3C48    //RX_FDEQ_GAIN_8
-48    0x545C    //RX_FDEQ_GAIN_9
-49    0x6864    //RX_FDEQ_GAIN_10
-50    0x7058    //RX_FDEQ_GAIN_11
-51    0x443C    //RX_FDEQ_GAIN_12
-52    0x3838    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57445,20 +57997,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57493,24 +58045,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0024    //RX_SPK_VOL
+129    0x00BE    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57518,22 +58070,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0118    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x5C5C    //RX_FDEQ_GAIN_0
-40    0x5448    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4840    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x6048    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4038    //RX_FDEQ_GAIN_7
-47    0x3C48    //RX_FDEQ_GAIN_8
-48    0x545C    //RX_FDEQ_GAIN_9
-49    0x6864    //RX_FDEQ_GAIN_10
-50    0x7058    //RX_FDEQ_GAIN_11
-51    0x443C    //RX_FDEQ_GAIN_12
-52    0x3838    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57544,20 +58096,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57592,24 +58144,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57617,22 +58169,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0B39    //RX_TDDRC_DRC_GAIN
+124    0x018B    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x685C    //RX_FDEQ_GAIN_1
-41    0x6868    //RX_FDEQ_GAIN_2
-42    0x544C    //RX_FDEQ_GAIN_3
-43    0x4C54    //RX_FDEQ_GAIN_4
-44    0x704C    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x445C    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x7C74    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6C6C    //RX_FDEQ_GAIN_13
+39    0x845C    //RX_FDEQ_GAIN_0
+40    0x5050    //RX_FDEQ_GAIN_1
+41    0x545A    //RX_FDEQ_GAIN_2
+42    0x6773    //RX_FDEQ_GAIN_3
+43    0x7A77    //RX_FDEQ_GAIN_4
+44    0x6D6C    //RX_FDEQ_GAIN_5
+45    0x6361    //RX_FDEQ_GAIN_6
+46    0x635D    //RX_FDEQ_GAIN_7
+47    0x5A5E    //RX_FDEQ_GAIN_8
+48    0x6060    //RX_FDEQ_GAIN_9
+49    0x605C    //RX_FDEQ_GAIN_10
+50    0x5858    //RX_FDEQ_GAIN_11
+51    0x6460    //RX_FDEQ_GAIN_12
+52    0x5048    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57643,20 +58195,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
-69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+68    0x0605    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57691,24 +58243,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0038    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57716,22 +58268,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0B39    //RX_TDDRC_DRC_GAIN
+124    0x0274    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x685C    //RX_FDEQ_GAIN_1
-41    0x6868    //RX_FDEQ_GAIN_2
-42    0x544C    //RX_FDEQ_GAIN_3
-43    0x4C54    //RX_FDEQ_GAIN_4
-44    0x704C    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x445C    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x7C74    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6C6C    //RX_FDEQ_GAIN_13
+39    0x8060    //RX_FDEQ_GAIN_0
+40    0x535B    //RX_FDEQ_GAIN_1
+41    0x6061    //RX_FDEQ_GAIN_2
+42    0x6E78    //RX_FDEQ_GAIN_3
+43    0x8994    //RX_FDEQ_GAIN_4
+44    0x9485    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x4C4F    //RX_FDEQ_GAIN_8
+48    0x4A4B    //RX_FDEQ_GAIN_9
+49    0x4C4C    //RX_FDEQ_GAIN_10
+50    0x4C54    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x8088    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57742,20 +58294,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
+68    0x0605    //RX_FDEQ_BIN_5
 69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57790,24 +58342,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0060    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -57815,22 +58367,22 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0B39    //RX_TDDRC_DRC_GAIN
+124    0x041F    //RX_TDDRC_DRC_GAIN
 38    0x001C    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x685C    //RX_FDEQ_GAIN_1
-41    0x6868    //RX_FDEQ_GAIN_2
-42    0x544C    //RX_FDEQ_GAIN_3
-43    0x4C54    //RX_FDEQ_GAIN_4
-44    0x704C    //RX_FDEQ_GAIN_5
-45    0x4C40    //RX_FDEQ_GAIN_6
-46    0x4040    //RX_FDEQ_GAIN_7
-47    0x445C    //RX_FDEQ_GAIN_8
-48    0x6068    //RX_FDEQ_GAIN_9
-49    0x7070    //RX_FDEQ_GAIN_10
-50    0x7C74    //RX_FDEQ_GAIN_11
-51    0x6060    //RX_FDEQ_GAIN_12
-52    0x6C6C    //RX_FDEQ_GAIN_13
+39    0x8060    //RX_FDEQ_GAIN_0
+40    0x535B    //RX_FDEQ_GAIN_1
+41    0x6061    //RX_FDEQ_GAIN_2
+42    0x6E78    //RX_FDEQ_GAIN_3
+43    0x8994    //RX_FDEQ_GAIN_4
+44    0x9485    //RX_FDEQ_GAIN_5
+45    0x6A52    //RX_FDEQ_GAIN_6
+46    0x4F4E    //RX_FDEQ_GAIN_7
+47    0x4C4F    //RX_FDEQ_GAIN_8
+48    0x4A4B    //RX_FDEQ_GAIN_9
+49    0x4C4C    //RX_FDEQ_GAIN_10
+50    0x4C54    //RX_FDEQ_GAIN_11
+51    0x6C78    //RX_FDEQ_GAIN_12
+52    0x8088    //RX_FDEQ_GAIN_13
 53    0x4848    //RX_FDEQ_GAIN_14
 54    0x4848    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
@@ -57841,20 +58393,20 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0401    //RX_FDEQ_BIN_0
+64    0x0104    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0403    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0204    //RX_FDEQ_BIN_5
+68    0x0605    //RX_FDEQ_BIN_5
 69    0x0A0A    //RX_FDEQ_BIN_6
-70    0x0A0A    //RX_FDEQ_BIN_7
+70    0x050A    //RX_FDEQ_BIN_7
 71    0x0B0C    //RX_FDEQ_BIN_8
 72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x0E0F    //RX_FDEQ_BIN_10
-74    0x0F10    //RX_FDEQ_BIN_11
-75    0x1011    //RX_FDEQ_BIN_12
-76    0x1104    //RX_FDEQ_BIN_13
+73    0x1006    //RX_FDEQ_BIN_10
+74    0x1614    //RX_FDEQ_BIN_11
+75    0x1414    //RX_FDEQ_BIN_12
+76    0x1404    //RX_FDEQ_BIN_13
 77    0x0000    //RX_FDEQ_BIN_14
 78    0x0000    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
@@ -57892,7 +58444,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0x027C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0001    //RX_SAMPLINGFREQ_SIG
 160    0x0001    //RX_SAMPLINGFREQ_PROC
@@ -57902,7 +58454,7 @@
 164    0x6000    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0403    //RX_PGA
+167    0x0800    //RX_PGA
 168    0x7B02    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
@@ -57917,8 +58469,8 @@
 179    0x0010    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
 186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
@@ -57932,19 +58484,19 @@
 194    0x4000    //RX_LMT_ALPHA
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6864    //RX_FDEQ_GAIN_1
-198    0x7070    //RX_FDEQ_GAIN_2
-199    0x6058    //RX_FDEQ_GAIN_3
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
 200    0x5C5C    //RX_FDEQ_GAIN_4
-201    0x8854    //RX_FDEQ_GAIN_5
-202    0x5448    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
 204    0x4860    //RX_FDEQ_GAIN_8
 205    0x6068    //RX_FDEQ_GAIN_9
-206    0x7070    //RX_FDEQ_GAIN_10
-207    0x8070    //RX_FDEQ_GAIN_11
-208    0x6060    //RX_FDEQ_GAIN_12
-209    0x7070    //RX_FDEQ_GAIN_13
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58018,10 +58570,10 @@
 280    0x0CCD    //RX_TDDRC_SMT_W
 281    0x0715    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x157C    //RX_TPKA_FP
-284    0x0400    //RX_MIN_G_FP
-285    0x0800    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0011    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -58055,15 +58607,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58072,22 +58624,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
-196    0x5C5C    //RX_FDEQ_GAIN_0
-197    0x5448    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4840    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x6048    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4038    //RX_FDEQ_GAIN_7
-204    0x3C48    //RX_FDEQ_GAIN_8
-205    0x545C    //RX_FDEQ_GAIN_9
-206    0x6864    //RX_FDEQ_GAIN_10
-207    0x7058    //RX_FDEQ_GAIN_11
-208    0x443C    //RX_FDEQ_GAIN_12
-209    0x3838    //RX_FDEQ_GAIN_13
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58154,15 +58706,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58171,22 +58723,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
-196    0x5C5C    //RX_FDEQ_GAIN_0
-197    0x5448    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4840    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x6048    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4038    //RX_FDEQ_GAIN_7
-204    0x3C48    //RX_FDEQ_GAIN_8
-205    0x545C    //RX_FDEQ_GAIN_9
-206    0x6864    //RX_FDEQ_GAIN_10
-207    0x7058    //RX_FDEQ_GAIN_11
-208    0x443C    //RX_FDEQ_GAIN_12
-209    0x3838    //RX_FDEQ_GAIN_13
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58253,15 +58805,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58270,22 +58822,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
-196    0x5C5C    //RX_FDEQ_GAIN_0
-197    0x5448    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4840    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x6048    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4038    //RX_FDEQ_GAIN_7
-204    0x3C48    //RX_FDEQ_GAIN_8
-205    0x545C    //RX_FDEQ_GAIN_9
-206    0x6864    //RX_FDEQ_GAIN_10
-207    0x7058    //RX_FDEQ_GAIN_11
-208    0x443C    //RX_FDEQ_GAIN_12
-209    0x3838    //RX_FDEQ_GAIN_13
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58352,15 +58904,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58369,22 +58921,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
-196    0x5C5C    //RX_FDEQ_GAIN_0
-197    0x5448    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4840    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x6048    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4038    //RX_FDEQ_GAIN_7
-204    0x3C48    //RX_FDEQ_GAIN_8
-205    0x545C    //RX_FDEQ_GAIN_9
-206    0x6864    //RX_FDEQ_GAIN_10
-207    0x7058    //RX_FDEQ_GAIN_11
-208    0x443C    //RX_FDEQ_GAIN_12
-209    0x3838    //RX_FDEQ_GAIN_13
+196    0x6868    //RX_FDEQ_GAIN_0
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x5C54    //RX_FDEQ_GAIN_5
+202    0x544C    //RX_FDEQ_GAIN_6
+203    0x4A48    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
+205    0x6068    //RX_FDEQ_GAIN_9
+206    0x6C6C    //RX_FDEQ_GAIN_10
+207    0x6C68    //RX_FDEQ_GAIN_11
+208    0x5A5A    //RX_FDEQ_GAIN_12
+209    0x5A5C    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58443,7 +58995,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
+286    0x0033    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -58451,15 +59003,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58468,22 +59020,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0B39    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x6868    //RX_FDEQ_GAIN_0
-197    0x685C    //RX_FDEQ_GAIN_1
-198    0x6868    //RX_FDEQ_GAIN_2
-199    0x544C    //RX_FDEQ_GAIN_3
-200    0x4C54    //RX_FDEQ_GAIN_4
-201    0x704C    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x445C    //RX_FDEQ_GAIN_8
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
 205    0x6068    //RX_FDEQ_GAIN_9
 206    0x7070    //RX_FDEQ_GAIN_10
-207    0x7C74    //RX_FDEQ_GAIN_11
+207    0x8070    //RX_FDEQ_GAIN_11
 208    0x6060    //RX_FDEQ_GAIN_12
-209    0x6C6C    //RX_FDEQ_GAIN_13
+209    0x7070    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58542,7 +59094,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0038    //RX_SPK_VOL
+286    0x0049    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -58550,15 +59102,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58567,22 +59119,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0B39    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x6868    //RX_FDEQ_GAIN_0
-197    0x685C    //RX_FDEQ_GAIN_1
-198    0x6868    //RX_FDEQ_GAIN_2
-199    0x544C    //RX_FDEQ_GAIN_3
-200    0x4C54    //RX_FDEQ_GAIN_4
-201    0x704C    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x445C    //RX_FDEQ_GAIN_8
+197    0x6858    //RX_FDEQ_GAIN_1
+198    0x5858    //RX_FDEQ_GAIN_2
+199    0x5858    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
 205    0x6068    //RX_FDEQ_GAIN_9
 206    0x7070    //RX_FDEQ_GAIN_10
-207    0x7C74    //RX_FDEQ_GAIN_11
+207    0x8070    //RX_FDEQ_GAIN_11
 208    0x6060    //RX_FDEQ_GAIN_12
-209    0x6C6C    //RX_FDEQ_GAIN_13
+209    0x7070    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58641,7 +59193,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0060    //RX_SPK_VOL
+286    0x0074    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
@@ -58649,15 +59201,15 @@
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
+271    0x1C00    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
 273    0x7FFF    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
@@ -58666,22 +59218,22 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0B39    //RX_TDDRC_DRC_GAIN
+281    0x0715    //RX_TDDRC_DRC_GAIN
 195    0x001C    //RX_FDEQ_SUBNUM
 196    0x6868    //RX_FDEQ_GAIN_0
-197    0x685C    //RX_FDEQ_GAIN_1
-198    0x6868    //RX_FDEQ_GAIN_2
-199    0x544C    //RX_FDEQ_GAIN_3
-200    0x4C54    //RX_FDEQ_GAIN_4
-201    0x704C    //RX_FDEQ_GAIN_5
-202    0x4C40    //RX_FDEQ_GAIN_6
-203    0x4040    //RX_FDEQ_GAIN_7
-204    0x445C    //RX_FDEQ_GAIN_8
+197    0x6864    //RX_FDEQ_GAIN_1
+198    0x7070    //RX_FDEQ_GAIN_2
+199    0x6058    //RX_FDEQ_GAIN_3
+200    0x5C5C    //RX_FDEQ_GAIN_4
+201    0x8854    //RX_FDEQ_GAIN_5
+202    0x5448    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4860    //RX_FDEQ_GAIN_8
 205    0x6068    //RX_FDEQ_GAIN_9
 206    0x7070    //RX_FDEQ_GAIN_10
-207    0x7C74    //RX_FDEQ_GAIN_11
+207    0x8070    //RX_FDEQ_GAIN_11
 208    0x6060    //RX_FDEQ_GAIN_12
-209    0x6C6C    //RX_FDEQ_GAIN_13
+209    0x7070    //RX_FDEQ_GAIN_13
 210    0x4848    //RX_FDEQ_GAIN_14
 211    0x4848    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
@@ -58744,7 +59296,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -58778,9 +59329,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -58886,11 +59437,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -58937,7 +59488,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -59145,7 +59696,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -59272,10 +59823,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -59293,26 +59844,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -59571,12 +60122,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -59654,7 +60205,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -59681,48 +60232,74 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x243C    //RX_RECVFUNC_MODE_0
+0    0x247C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0003    //RX_SAMPLINGFREQ_SIG
 3    0x0003    //RX_SAMPLINGFREQ_PROC
 4    0x000A    //RX_FRAME_SZ
 5    0x0000    //RX_DELAY_OPT
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
-10    0x0403    //RX_PGA
-11    0x7D83    //RX_A_HP
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
 14    0x7000    //RX_THR_PITCH_DET_1
@@ -59733,39 +60310,39 @@
 19    0x0020    //RX_PP_RESRV_1
 20    0x0400    //RX_N_SN_EST
 21    0x000C    //RX_N2_SN_EST
-22    0x0010    //RX_NS_LVL_CTRL
+22    0x0006    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
-24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x4848    //RX_FDEQ_GAIN_3
-43    0x4848    //RX_FDEQ_GAIN_4
-44    0x7C48    //RX_FDEQ_GAIN_5
-45    0x4848    //RX_FDEQ_GAIN_6
-46    0x4848    //RX_FDEQ_GAIN_7
-47    0x4860    //RX_FDEQ_GAIN_8
-48    0x7468    //RX_FDEQ_GAIN_9
-49    0x5858    //RX_FDEQ_GAIN_10
-50    0x5858    //RX_FDEQ_GAIN_11
-51    0x5C54    //RX_FDEQ_GAIN_12
-52    0x5448    //RX_FDEQ_GAIN_13
-53    0x4848    //RX_FDEQ_GAIN_14
-54    0x5858    //RX_FDEQ_GAIN_15
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -59774,22 +60351,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -59823,24 +60400,24 @@
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
 111    0x0002    //RX_FILTINDX
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1A00    //RX_TDDRC_THRD_2
-115    0x1A00    //RX_TDDRC_THRD_3
-116    0x7EB8    //RX_TDDRC_SLANT_0
-117    0x2500    //RX_TDDRC_SLANT_1
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0550    //RX_TDDRC_DRC_GAIN
+124    0x03FC    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x0FA0    //RX_TPKA_FP
+126    0x13E0    //RX_TPKA_FP
 127    0x0400    //RX_MIN_G_FP
-128    0x0800    //RX_MAX_G_FP
-129    0x0014    //RX_SPK_VOL
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -59870,20 +60447,20 @@
 156    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -59891,24 +60468,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x3434    //RX_FDEQ_GAIN_3
-43    0x3840    //RX_FDEQ_GAIN_4
-44    0x4838    //RX_FDEQ_GAIN_5
-45    0x5444    //RX_FDEQ_GAIN_6
-46    0x443C    //RX_FDEQ_GAIN_7
-47    0x3C60    //RX_FDEQ_GAIN_8
-48    0x6460    //RX_FDEQ_GAIN_9
-49    0x6064    //RX_FDEQ_GAIN_10
-50    0x5C5C    //RX_FDEQ_GAIN_11
-51    0x5440    //RX_FDEQ_GAIN_12
-52    0x4040    //RX_FDEQ_GAIN_13
-53    0x4040    //RX_FDEQ_GAIN_14
-54    0x5858    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -59917,22 +60494,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -59965,24 +60542,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0011    //RX_SPK_VOL
+129    0x0056    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -59990,24 +60567,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x3434    //RX_FDEQ_GAIN_3
-43    0x3840    //RX_FDEQ_GAIN_4
-44    0x4838    //RX_FDEQ_GAIN_5
-45    0x5444    //RX_FDEQ_GAIN_6
-46    0x443C    //RX_FDEQ_GAIN_7
-47    0x3C60    //RX_FDEQ_GAIN_8
-48    0x6460    //RX_FDEQ_GAIN_9
-49    0x6064    //RX_FDEQ_GAIN_10
-50    0x5C5C    //RX_FDEQ_GAIN_11
-51    0x5440    //RX_FDEQ_GAIN_12
-52    0x4040    //RX_FDEQ_GAIN_13
-53    0x4040    //RX_FDEQ_GAIN_14
-54    0x5858    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -60016,22 +60593,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60064,24 +60641,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0019    //RX_SPK_VOL
+129    0x007D    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60089,24 +60666,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x3434    //RX_FDEQ_GAIN_3
-43    0x3840    //RX_FDEQ_GAIN_4
-44    0x4838    //RX_FDEQ_GAIN_5
-45    0x5444    //RX_FDEQ_GAIN_6
-46    0x443C    //RX_FDEQ_GAIN_7
-47    0x3C60    //RX_FDEQ_GAIN_8
-48    0x6460    //RX_FDEQ_GAIN_9
-49    0x6064    //RX_FDEQ_GAIN_10
-50    0x5C5C    //RX_FDEQ_GAIN_11
-51    0x5440    //RX_FDEQ_GAIN_12
-52    0x4040    //RX_FDEQ_GAIN_13
-53    0x4040    //RX_FDEQ_GAIN_14
-54    0x5858    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -60115,22 +60692,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60163,24 +60740,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
+129    0x00B5    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60188,24 +60765,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0780    //RX_TDDRC_DRC_GAIN
+124    0x0100    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6848    //RX_FDEQ_GAIN_1
-41    0x4848    //RX_FDEQ_GAIN_2
-42    0x3434    //RX_FDEQ_GAIN_3
-43    0x3840    //RX_FDEQ_GAIN_4
-44    0x4838    //RX_FDEQ_GAIN_5
-45    0x5444    //RX_FDEQ_GAIN_6
-46    0x443C    //RX_FDEQ_GAIN_7
-47    0x3C60    //RX_FDEQ_GAIN_8
-48    0x6460    //RX_FDEQ_GAIN_9
-49    0x6064    //RX_FDEQ_GAIN_10
-50    0x5C5C    //RX_FDEQ_GAIN_11
-51    0x5440    //RX_FDEQ_GAIN_12
-52    0x4040    //RX_FDEQ_GAIN_13
-53    0x4040    //RX_FDEQ_GAIN_14
-54    0x5858    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -60214,22 +60791,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60262,24 +60839,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0036    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60287,24 +60864,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0D56    //RX_TDDRC_DRC_GAIN
+124    0x016A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6850    //RX_FDEQ_GAIN_1
-41    0x5048    //RX_FDEQ_GAIN_2
-42    0x383C    //RX_FDEQ_GAIN_3
-43    0x4048    //RX_FDEQ_GAIN_4
-44    0x7040    //RX_FDEQ_GAIN_5
-45    0x4C44    //RX_FDEQ_GAIN_6
-46    0x4448    //RX_FDEQ_GAIN_7
-47    0x4868    //RX_FDEQ_GAIN_8
-48    0x7C70    //RX_FDEQ_GAIN_9
-49    0x707C    //RX_FDEQ_GAIN_10
-50    0x786C    //RX_FDEQ_GAIN_11
-51    0x6454    //RX_FDEQ_GAIN_12
-52    0x604C    //RX_FDEQ_GAIN_13
-53    0x585C    //RX_FDEQ_GAIN_14
-54    0x7480    //RX_FDEQ_GAIN_15
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -60313,22 +60890,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60361,24 +60938,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0034    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
-112    0x0002    //RX_TDDRC_THRD_0
+112    0x0000    //RX_TDDRC_THRD_0
 113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60386,24 +60963,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0D56    //RX_TDDRC_DRC_GAIN
+124    0x022A    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6850    //RX_FDEQ_GAIN_1
-41    0x5048    //RX_FDEQ_GAIN_2
-42    0x383C    //RX_FDEQ_GAIN_3
-43    0x4048    //RX_FDEQ_GAIN_4
-44    0x7040    //RX_FDEQ_GAIN_5
-45    0x4C44    //RX_FDEQ_GAIN_6
-46    0x4448    //RX_FDEQ_GAIN_7
-47    0x4868    //RX_FDEQ_GAIN_8
-48    0x7C70    //RX_FDEQ_GAIN_9
-49    0x707C    //RX_FDEQ_GAIN_10
-50    0x786C    //RX_FDEQ_GAIN_11
-51    0x6454    //RX_FDEQ_GAIN_12
-52    0x604C    //RX_FDEQ_GAIN_13
-53    0x585C    //RX_FDEQ_GAIN_14
-54    0x7480    //RX_FDEQ_GAIN_15
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -60412,22 +60989,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60460,24 +61037,24 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0059    //RX_SPK_VOL
+129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x6000    //RX_TDDRC_ALPHA_UP_1
-7    0x6000    //RX_TDDRC_ALPHA_UP_2
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 8    0x6000    //RX_TDDRC_ALPHA_UP_3
 9    0x1000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
 32    0x4000    //RX_TDDRC_ALPHA_DWN_4
 33    0x7214    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0002    //RX_TDDRC_THRD_0
-113    0x0004    //RX_TDDRC_THRD_1
-114    0x1800    //RX_TDDRC_THRD_2
-115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
 117    0x7FFF    //RX_TDDRC_SLANT_1
 118    0x6000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60485,24 +61062,24 @@
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0D56    //RX_TDDRC_DRC_GAIN
+124    0x038C    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x6868    //RX_FDEQ_GAIN_0
-40    0x6850    //RX_FDEQ_GAIN_1
-41    0x5048    //RX_FDEQ_GAIN_2
-42    0x383C    //RX_FDEQ_GAIN_3
-43    0x4048    //RX_FDEQ_GAIN_4
-44    0x7040    //RX_FDEQ_GAIN_5
-45    0x4C44    //RX_FDEQ_GAIN_6
-46    0x4448    //RX_FDEQ_GAIN_7
-47    0x4868    //RX_FDEQ_GAIN_8
-48    0x7C70    //RX_FDEQ_GAIN_9
-49    0x707C    //RX_FDEQ_GAIN_10
-50    0x786C    //RX_FDEQ_GAIN_11
-51    0x6454    //RX_FDEQ_GAIN_12
-52    0x604C    //RX_FDEQ_GAIN_13
-53    0x585C    //RX_FDEQ_GAIN_14
-54    0x7480    //RX_FDEQ_GAIN_15
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
 57    0x4848    //RX_FDEQ_GAIN_18
@@ -60511,22 +61088,22 @@
 60    0x4848    //RX_FDEQ_GAIN_21
 61    0x4848    //RX_FDEQ_GAIN_22
 62    0x4848    //RX_FDEQ_GAIN_23
-63    0x0202    //RX_FDEQ_BIN_0
-64    0x0203    //RX_FDEQ_BIN_1
-65    0x0303    //RX_FDEQ_BIN_2
-66    0x0304    //RX_FDEQ_BIN_3
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
 67    0x0404    //RX_FDEQ_BIN_4
-68    0x0308    //RX_FDEQ_BIN_5
-69    0x0808    //RX_FDEQ_BIN_6
-70    0x090A    //RX_FDEQ_BIN_7
-71    0x0B0C    //RX_FDEQ_BIN_8
-72    0x0D0E    //RX_FDEQ_BIN_9
-73    0x1013    //RX_FDEQ_BIN_10
-74    0x1719    //RX_FDEQ_BIN_11
-75    0x1B1E    //RX_FDEQ_BIN_12
-76    0x1E1E    //RX_FDEQ_BIN_13
-77    0x1E28    //RX_FDEQ_BIN_14
-78    0x282C    //RX_FDEQ_BIN_15
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
 79    0x0000    //RX_FDEQ_BIN_16
 80    0x0000    //RX_FDEQ_BIN_17
 81    0x0000    //RX_FDEQ_BIN_18
@@ -60562,18 +61139,18 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x243C    //RX_RECVFUNC_MODE_0
+157    0x247C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0003    //RX_SAMPLINGFREQ_SIG
 160    0x0003    //RX_SAMPLINGFREQ_PROC
 161    0x000A    //RX_FRAME_SZ
 162    0x0000    //RX_DELAY_OPT
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
-167    0x0403    //RX_PGA
-168    0x7D83    //RX_A_HP
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
 171    0x7000    //RX_THR_PITCH_DET_1
@@ -60584,39 +61161,39 @@
 176    0x0020    //RX_PP_RESRV_1
 177    0x0400    //RX_N_SN_EST
 178    0x000C    //RX_N2_SN_EST
-179    0x0010    //RX_NS_LVL_CTRL
+179    0x0006    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
-181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
 185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
-186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
-189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x4848    //RX_FDEQ_GAIN_3
-200    0x4848    //RX_FDEQ_GAIN_4
-201    0x7C48    //RX_FDEQ_GAIN_5
-202    0x4848    //RX_FDEQ_GAIN_6
-203    0x4848    //RX_FDEQ_GAIN_7
-204    0x4860    //RX_FDEQ_GAIN_8
-205    0x7468    //RX_FDEQ_GAIN_9
-206    0x5858    //RX_FDEQ_GAIN_10
-207    0x5858    //RX_FDEQ_GAIN_11
-208    0x5C54    //RX_FDEQ_GAIN_12
-209    0x5448    //RX_FDEQ_GAIN_13
-210    0x4848    //RX_FDEQ_GAIN_14
-211    0x5858    //RX_FDEQ_GAIN_15
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -60625,22 +61202,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60674,24 +61251,24 @@
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
 268    0x0002    //RX_FILTINDX
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1A00    //RX_TDDRC_THRD_2
-272    0x1A00    //RX_TDDRC_THRD_3
-273    0x7EB8    //RX_TDDRC_SLANT_0
-274    0x2500    //RX_TDDRC_SLANT_1
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0550    //RX_TDDRC_DRC_GAIN
+281    0x03FC    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x0FA0    //RX_TPKA_FP
+283    0x13E0    //RX_TPKA_FP
 284    0x0400    //RX_MIN_G_FP
-285    0x0800    //RX_MAX_G_FP
-286    0x0014    //RX_SPK_VOL
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -60721,20 +61298,20 @@
 313    0x0000    //RX_BWE_RESRV_2
 #VOL    0
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60742,24 +61319,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x3434    //RX_FDEQ_GAIN_3
-200    0x3840    //RX_FDEQ_GAIN_4
-201    0x4838    //RX_FDEQ_GAIN_5
-202    0x5444    //RX_FDEQ_GAIN_6
-203    0x443C    //RX_FDEQ_GAIN_7
-204    0x3C60    //RX_FDEQ_GAIN_8
-205    0x6460    //RX_FDEQ_GAIN_9
-206    0x6064    //RX_FDEQ_GAIN_10
-207    0x5C5C    //RX_FDEQ_GAIN_11
-208    0x5440    //RX_FDEQ_GAIN_12
-209    0x4040    //RX_FDEQ_GAIN_13
-210    0x4040    //RX_FDEQ_GAIN_14
-211    0x5858    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -60768,22 +61345,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60816,24 +61393,24 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0011    //RX_SPK_VOL
+286    0x0056    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60841,24 +61418,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x3434    //RX_FDEQ_GAIN_3
-200    0x3840    //RX_FDEQ_GAIN_4
-201    0x4838    //RX_FDEQ_GAIN_5
-202    0x5444    //RX_FDEQ_GAIN_6
-203    0x443C    //RX_FDEQ_GAIN_7
-204    0x3C60    //RX_FDEQ_GAIN_8
-205    0x6460    //RX_FDEQ_GAIN_9
-206    0x6064    //RX_FDEQ_GAIN_10
-207    0x5C5C    //RX_FDEQ_GAIN_11
-208    0x5440    //RX_FDEQ_GAIN_12
-209    0x4040    //RX_FDEQ_GAIN_13
-210    0x4040    //RX_FDEQ_GAIN_14
-211    0x5858    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -60867,22 +61444,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -60915,24 +61492,24 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0019    //RX_SPK_VOL
+286    0x007D    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -60940,24 +61517,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x3434    //RX_FDEQ_GAIN_3
-200    0x3840    //RX_FDEQ_GAIN_4
-201    0x4838    //RX_FDEQ_GAIN_5
-202    0x5444    //RX_FDEQ_GAIN_6
-203    0x443C    //RX_FDEQ_GAIN_7
-204    0x3C60    //RX_FDEQ_GAIN_8
-205    0x6460    //RX_FDEQ_GAIN_9
-206    0x6064    //RX_FDEQ_GAIN_10
-207    0x5C5C    //RX_FDEQ_GAIN_11
-208    0x5440    //RX_FDEQ_GAIN_12
-209    0x4040    //RX_FDEQ_GAIN_13
-210    0x4040    //RX_FDEQ_GAIN_14
-211    0x5858    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -60966,22 +61543,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61014,24 +61591,24 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
+286    0x00B5    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -61039,24 +61616,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0780    //RX_TDDRC_DRC_GAIN
+281    0x0100    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6848    //RX_FDEQ_GAIN_1
-198    0x4848    //RX_FDEQ_GAIN_2
-199    0x3434    //RX_FDEQ_GAIN_3
-200    0x3840    //RX_FDEQ_GAIN_4
-201    0x4838    //RX_FDEQ_GAIN_5
-202    0x5444    //RX_FDEQ_GAIN_6
-203    0x443C    //RX_FDEQ_GAIN_7
-204    0x3C60    //RX_FDEQ_GAIN_8
-205    0x6460    //RX_FDEQ_GAIN_9
-206    0x6064    //RX_FDEQ_GAIN_10
-207    0x5C5C    //RX_FDEQ_GAIN_11
-208    0x5440    //RX_FDEQ_GAIN_12
-209    0x4040    //RX_FDEQ_GAIN_13
-210    0x4040    //RX_FDEQ_GAIN_14
-211    0x5858    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -61065,22 +61642,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61113,24 +61690,24 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0036    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
+269    0x0000    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -61138,24 +61715,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0D56    //RX_TDDRC_DRC_GAIN
+281    0x016A    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6850    //RX_FDEQ_GAIN_1
-198    0x5048    //RX_FDEQ_GAIN_2
-199    0x383C    //RX_FDEQ_GAIN_3
-200    0x4048    //RX_FDEQ_GAIN_4
-201    0x7040    //RX_FDEQ_GAIN_5
-202    0x4C44    //RX_FDEQ_GAIN_6
-203    0x4448    //RX_FDEQ_GAIN_7
-204    0x4868    //RX_FDEQ_GAIN_8
-205    0x7C70    //RX_FDEQ_GAIN_9
-206    0x707C    //RX_FDEQ_GAIN_10
-207    0x786C    //RX_FDEQ_GAIN_11
-208    0x6454    //RX_FDEQ_GAIN_12
-209    0x604C    //RX_FDEQ_GAIN_13
-210    0x585C    //RX_FDEQ_GAIN_14
-211    0x7480    //RX_FDEQ_GAIN_15
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -61164,22 +61741,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61212,24 +61789,24 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0034    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
-269    0x0002    //RX_TDDRC_THRD_0
+269    0x0000    //RX_TDDRC_THRD_0
 270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -61237,24 +61814,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0D56    //RX_TDDRC_DRC_GAIN
+281    0x022A    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6850    //RX_FDEQ_GAIN_1
-198    0x5048    //RX_FDEQ_GAIN_2
-199    0x383C    //RX_FDEQ_GAIN_3
-200    0x4048    //RX_FDEQ_GAIN_4
-201    0x7040    //RX_FDEQ_GAIN_5
-202    0x4C44    //RX_FDEQ_GAIN_6
-203    0x4448    //RX_FDEQ_GAIN_7
-204    0x4868    //RX_FDEQ_GAIN_8
-205    0x7C70    //RX_FDEQ_GAIN_9
-206    0x707C    //RX_FDEQ_GAIN_10
-207    0x786C    //RX_FDEQ_GAIN_11
-208    0x6454    //RX_FDEQ_GAIN_12
-209    0x604C    //RX_FDEQ_GAIN_13
-210    0x585C    //RX_FDEQ_GAIN_14
-211    0x7480    //RX_FDEQ_GAIN_15
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -61263,22 +61840,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61311,24 +61888,24 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0059    //RX_SPK_VOL
+286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x6000    //RX_TDDRC_ALPHA_UP_1
-164    0x6000    //RX_TDDRC_ALPHA_UP_2
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
 165    0x6000    //RX_TDDRC_ALPHA_UP_3
 166    0x1000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
 189    0x4000    //RX_TDDRC_ALPHA_DWN_4
 190    0x7214    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0002    //RX_TDDRC_THRD_0
-270    0x0004    //RX_TDDRC_THRD_1
-271    0x1800    //RX_TDDRC_THRD_2
-272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
 274    0x7FFF    //RX_TDDRC_SLANT_1
 275    0x6000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
@@ -61336,24 +61913,24 @@
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0D56    //RX_TDDRC_DRC_GAIN
+281    0x038C    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x6868    //RX_FDEQ_GAIN_0
-197    0x6850    //RX_FDEQ_GAIN_1
-198    0x5048    //RX_FDEQ_GAIN_2
-199    0x383C    //RX_FDEQ_GAIN_3
-200    0x4048    //RX_FDEQ_GAIN_4
-201    0x7040    //RX_FDEQ_GAIN_5
-202    0x4C44    //RX_FDEQ_GAIN_6
-203    0x4448    //RX_FDEQ_GAIN_7
-204    0x4868    //RX_FDEQ_GAIN_8
-205    0x7C70    //RX_FDEQ_GAIN_9
-206    0x707C    //RX_FDEQ_GAIN_10
-207    0x786C    //RX_FDEQ_GAIN_11
-208    0x6454    //RX_FDEQ_GAIN_12
-209    0x604C    //RX_FDEQ_GAIN_13
-210    0x585C    //RX_FDEQ_GAIN_14
-211    0x7480    //RX_FDEQ_GAIN_15
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
 214    0x4848    //RX_FDEQ_GAIN_18
@@ -61362,22 +61939,22 @@
 217    0x4848    //RX_FDEQ_GAIN_21
 218    0x4848    //RX_FDEQ_GAIN_22
 219    0x4848    //RX_FDEQ_GAIN_23
-220    0x0202    //RX_FDEQ_BIN_0
-221    0x0203    //RX_FDEQ_BIN_1
-222    0x0303    //RX_FDEQ_BIN_2
-223    0x0304    //RX_FDEQ_BIN_3
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
 224    0x0404    //RX_FDEQ_BIN_4
-225    0x0308    //RX_FDEQ_BIN_5
-226    0x0808    //RX_FDEQ_BIN_6
-227    0x090A    //RX_FDEQ_BIN_7
-228    0x0B0C    //RX_FDEQ_BIN_8
-229    0x0D0E    //RX_FDEQ_BIN_9
-230    0x1013    //RX_FDEQ_BIN_10
-231    0x1719    //RX_FDEQ_BIN_11
-232    0x1B1E    //RX_FDEQ_BIN_12
-233    0x1E1E    //RX_FDEQ_BIN_13
-234    0x1E28    //RX_FDEQ_BIN_14
-235    0x282C    //RX_FDEQ_BIN_15
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
 236    0x0000    //RX_FDEQ_BIN_16
 237    0x0000    //RX_FDEQ_BIN_17
 238    0x0000    //RX_FDEQ_BIN_18
@@ -61414,7 +61991,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_HCO-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -61448,9 +62024,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -61556,11 +62132,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -61607,7 +62183,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -61815,7 +62391,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -61942,10 +62518,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -61963,26 +62539,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -62241,12 +62817,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -62324,7 +62900,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -62351,37 +62927,63 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
-0    0x242C    //RX_RECVFUNC_MODE_0
+0    0x006C    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
 2    0x0004    //RX_SAMPLINGFREQ_SIG
 3    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -62391,7 +62993,7 @@
 7    0x4000    //RX_TDDRC_ALPHA_UP_2
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
-10    0x0403    //RX_PGA
+10    0x0800    //RX_PGA
 11    0x7E56    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -62406,35 +63008,35 @@
 22    0x0014    //RX_NS_LVL_CTRL
 23    0xF400    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0190    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 30    0x0002    //RX_EXTRA_NS_L
 31    0x0800    //RX_EXTRA_NS_A
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 35    0x199A    //RX_A_POST_FLT
 36    0x0000    //RX_LMT_THRD
 37    0x4000    //RX_LMT_ALPHA
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -62497,20 +63099,20 @@
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 125    0x7C00    //RX_LAMBDA_PKA_FP
-126    0x1B58    //RX_TPKA_FP
-127    0x0400    //RX_MIN_G_FP
-128    0x0800    //RX_MAX_G_FP
-129    0x0100    //RX_SPK_VOL
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 131    0x0000    //RX_MAXLEVEL_CNG
 132    0x3000    //RX_BWE_UV_TH
@@ -62544,40 +63146,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -62635,7 +63237,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0012    //RX_SPK_VOL
+129    0x0013    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -62643,40 +63245,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -62734,7 +63336,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x001A    //RX_SPK_VOL
+129    0x001C    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -62742,40 +63344,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -62833,7 +63435,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0025    //RX_SPK_VOL
+129    0x0028    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -62841,40 +63443,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
 39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4850    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -62932,7 +63534,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0035    //RX_SPK_VOL
+129    0x0028    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    4
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -62940,40 +63542,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C4C    //RX_FDEQ_GAIN_1
+41    0x4C48    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -63031,7 +63633,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x004D    //RX_SPK_VOL
+129    0x0052    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63039,40 +63641,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C4C    //RX_FDEQ_GAIN_1
+41    0x4C48    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -63130,7 +63732,7 @@
 108    0x7FFF    //RX_FDDRC_SLANT_1_2
 109    0x7FFF    //RX_FDDRC_SLANT_1_3
 110    0x0000    //RX_FDDRC_RESRV_0
-129    0x0074    //RX_SPK_VOL
+129    0x0078    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 6    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63138,40 +63740,40 @@
 8    0x4000    //RX_TDDRC_ALPHA_UP_3
 9    0x4000    //RX_TDDRC_ALPHA_UP_4
 27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-28    0x4000    //RX_TDDRC_ALPHA_DWN_2
-29    0x4000    //RX_TDDRC_ALPHA_DWN_3
-32    0x4000    //RX_TDDRC_ALPHA_DWN_4
-33    0x7214    //RX_TDDRC_LIMITER_THRD
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
 34    0x0800    //RX_TDDRC_LIMITER_GAIN
 112    0x0001    //RX_TDDRC_THRD_0
 113    0x0002    //RX_TDDRC_THRD_1
 114    0x1800    //RX_TDDRC_THRD_2
 115    0x1800    //RX_TDDRC_THRD_3
-116    0x7FFF    //RX_TDDRC_SLANT_0
-117    0x7FFF    //RX_TDDRC_SLANT_1
+116    0x6000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
 118    0x4000    //RX_TDDRC_ALPHA_UP_0
 119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 120    0x0000    //RX_TDDRC_HMNC_FLAG
 121    0x199A    //RX_TDDRC_HMNC_GAIN
 122    0x0001    //RX_TDDRC_SMT_FLAG
 123    0x0CCD    //RX_TDDRC_SMT_W
-124    0x0439    //RX_TDDRC_DRC_GAIN
+124    0x02D2    //RX_TDDRC_DRC_GAIN
 38    0x0020    //RX_FDEQ_SUBNUM
-39    0x4848    //RX_FDEQ_GAIN_0
-40    0x4040    //RX_FDEQ_GAIN_1
-41    0x3838    //RX_FDEQ_GAIN_2
-42    0x3448    //RX_FDEQ_GAIN_3
-43    0x343C    //RX_FDEQ_GAIN_4
-44    0x4040    //RX_FDEQ_GAIN_5
-45    0x4048    //RX_FDEQ_GAIN_6
-46    0x384C    //RX_FDEQ_GAIN_7
-47    0x4C54    //RX_FDEQ_GAIN_8
-48    0x5C54    //RX_FDEQ_GAIN_9
-49    0x4E38    //RX_FDEQ_GAIN_10
-50    0x303C    //RX_FDEQ_GAIN_11
-51    0x5450    //RX_FDEQ_GAIN_12
-52    0x4860    //RX_FDEQ_GAIN_13
-53    0x6060    //RX_FDEQ_GAIN_14
+39    0x4C4C    //RX_FDEQ_GAIN_0
+40    0x4C4C    //RX_FDEQ_GAIN_1
+41    0x4C48    //RX_FDEQ_GAIN_2
+42    0x4870    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4568    //RX_FDEQ_GAIN_6
+46    0x485C    //RX_FDEQ_GAIN_7
+47    0x5C60    //RX_FDEQ_GAIN_8
+48    0x685C    //RX_FDEQ_GAIN_9
+49    0x5648    //RX_FDEQ_GAIN_10
+50    0x484C    //RX_FDEQ_GAIN_11
+51    0x706C    //RX_FDEQ_GAIN_12
+52    0x7070    //RX_FDEQ_GAIN_13
+53    0x6868    //RX_FDEQ_GAIN_14
 54    0x6060    //RX_FDEQ_GAIN_15
 55    0x4848    //RX_FDEQ_GAIN_16
 56    0x4848    //RX_FDEQ_GAIN_17
@@ -63232,7 +63834,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x242C    //RX_RECVFUNC_MODE_0
+157    0x006C    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0004    //RX_SAMPLINGFREQ_SIG
 160    0x0004    //RX_SAMPLINGFREQ_PROC
@@ -63242,7 +63844,7 @@
 164    0x4000    //RX_TDDRC_ALPHA_UP_2
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
-167    0x0403    //RX_PGA
+167    0x0800    //RX_PGA
 168    0x7E56    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
@@ -63257,35 +63859,35 @@
 179    0x0014    //RX_NS_LVL_CTRL
 180    0xF400    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0190    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
 187    0x0002    //RX_EXTRA_NS_L
 188    0x0800    //RX_EXTRA_NS_A
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 192    0x199A    //RX_A_POST_FLT
 193    0x0000    //RX_LMT_THRD
 194    0x4000    //RX_LMT_ALPHA
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4850    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63348,20 +63950,20 @@
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 282    0x7C00    //RX_LAMBDA_PKA_FP
-283    0x1B58    //RX_TPKA_FP
-284    0x0400    //RX_MIN_G_FP
-285    0x0800    //RX_MAX_G_FP
-286    0x0100    //RX_SPK_VOL
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 288    0x0000    //RX_MAXLEVEL_CNG
 289    0x3000    //RX_BWE_UV_TH
@@ -63395,40 +63997,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4850    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63486,7 +64088,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0012    //RX_SPK_VOL
+286    0x0013    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    1
 163    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63494,40 +64096,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4850    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63585,7 +64187,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x001A    //RX_SPK_VOL
+286    0x001C    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    2
 163    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63593,40 +64195,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4850    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63684,7 +64286,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0025    //RX_SPK_VOL
+286    0x0028    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    3
 163    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63692,40 +64294,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
 196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4850    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63791,40 +64393,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+196    0x4C4C    //RX_FDEQ_GAIN_0
+197    0x4C4C    //RX_FDEQ_GAIN_1
+198    0x4C48    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63882,7 +64484,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x004D    //RX_SPK_VOL
+286    0x0052    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    5
 163    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63890,40 +64492,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+196    0x4C4C    //RX_FDEQ_GAIN_0
+197    0x4C4C    //RX_FDEQ_GAIN_1
+198    0x4C48    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -63981,7 +64583,7 @@
 265    0x7FFF    //RX_FDDRC_SLANT_1_2
 266    0x7FFF    //RX_FDDRC_SLANT_1_3
 267    0x0000    //RX_FDDRC_RESRV_0
-286    0x0074    //RX_SPK_VOL
+286    0x0078    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 #VOL    6
 163    0x4000    //RX_TDDRC_ALPHA_UP_1
@@ -63989,40 +64591,40 @@
 165    0x4000    //RX_TDDRC_ALPHA_UP_3
 166    0x4000    //RX_TDDRC_ALPHA_UP_4
 184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
-185    0x4000    //RX_TDDRC_ALPHA_DWN_2
-186    0x4000    //RX_TDDRC_ALPHA_DWN_3
-189    0x4000    //RX_TDDRC_ALPHA_DWN_4
-190    0x7214    //RX_TDDRC_LIMITER_THRD
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
 191    0x0800    //RX_TDDRC_LIMITER_GAIN
 269    0x0001    //RX_TDDRC_THRD_0
 270    0x0002    //RX_TDDRC_THRD_1
 271    0x1800    //RX_TDDRC_THRD_2
 272    0x1800    //RX_TDDRC_THRD_3
-273    0x7FFF    //RX_TDDRC_SLANT_0
-274    0x7FFF    //RX_TDDRC_SLANT_1
+273    0x6000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
 275    0x4000    //RX_TDDRC_ALPHA_UP_0
 276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
 277    0x0000    //RX_TDDRC_HMNC_FLAG
 278    0x199A    //RX_TDDRC_HMNC_GAIN
 279    0x0001    //RX_TDDRC_SMT_FLAG
 280    0x0CCD    //RX_TDDRC_SMT_W
-281    0x0439    //RX_TDDRC_DRC_GAIN
+281    0x02D2    //RX_TDDRC_DRC_GAIN
 195    0x0020    //RX_FDEQ_SUBNUM
-196    0x4848    //RX_FDEQ_GAIN_0
-197    0x4040    //RX_FDEQ_GAIN_1
-198    0x3838    //RX_FDEQ_GAIN_2
-199    0x3448    //RX_FDEQ_GAIN_3
-200    0x343C    //RX_FDEQ_GAIN_4
-201    0x4040    //RX_FDEQ_GAIN_5
-202    0x4048    //RX_FDEQ_GAIN_6
-203    0x384C    //RX_FDEQ_GAIN_7
-204    0x4C54    //RX_FDEQ_GAIN_8
-205    0x5C54    //RX_FDEQ_GAIN_9
-206    0x4E38    //RX_FDEQ_GAIN_10
-207    0x303C    //RX_FDEQ_GAIN_11
-208    0x5450    //RX_FDEQ_GAIN_12
-209    0x4860    //RX_FDEQ_GAIN_13
-210    0x6060    //RX_FDEQ_GAIN_14
+196    0x4C4C    //RX_FDEQ_GAIN_0
+197    0x4C4C    //RX_FDEQ_GAIN_1
+198    0x4C48    //RX_FDEQ_GAIN_2
+199    0x4870    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4568    //RX_FDEQ_GAIN_6
+203    0x485C    //RX_FDEQ_GAIN_7
+204    0x5C60    //RX_FDEQ_GAIN_8
+205    0x685C    //RX_FDEQ_GAIN_9
+206    0x5648    //RX_FDEQ_GAIN_10
+207    0x484C    //RX_FDEQ_GAIN_11
+208    0x706C    //RX_FDEQ_GAIN_12
+209    0x7070    //RX_FDEQ_GAIN_13
+210    0x6868    //RX_FDEQ_GAIN_14
 211    0x6060    //RX_FDEQ_GAIN_15
 212    0x4848    //RX_FDEQ_GAIN_16
 213    0x4848    //RX_FDEQ_GAIN_17
@@ -64083,16 +64685,2710 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-TTY_HCO-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x247C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x847C    //RX_FDEQ_GAIN_0
+40    0x5A56    //RX_FDEQ_GAIN_1
+41    0x6266    //RX_FDEQ_GAIN_2
+42    0x6E7A    //RX_FDEQ_GAIN_3
+43    0x8678    //RX_FDEQ_GAIN_4
+44    0x6D66    //RX_FDEQ_GAIN_5
+45    0x706E    //RX_FDEQ_GAIN_6
+46    0x6C64    //RX_FDEQ_GAIN_7
+47    0x5C6A    //RX_FDEQ_GAIN_8
+48    0x6268    //RX_FDEQ_GAIN_9
+49    0x6462    //RX_FDEQ_GAIN_10
+50    0x646E    //RX_FDEQ_GAIN_11
+51    0x6860    //RX_FDEQ_GAIN_12
+52    0x646A    //RX_FDEQ_GAIN_13
+53    0x7478    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0105    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x0CE0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x03FC    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x13E0    //RX_TPKA_FP
+127    0x0400    //RX_MIN_G_FP
+128    0x1000    //RX_MAX_G_FP
+129    0x0058    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0056    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x007D    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x00B5    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0002    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x19C0    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x016A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8458    //RX_FDEQ_GAIN_0
+40    0x4B4B    //RX_FDEQ_GAIN_1
+41    0x5156    //RX_FDEQ_GAIN_2
+42    0x646C    //RX_FDEQ_GAIN_3
+43    0x7B73    //RX_FDEQ_GAIN_4
+44    0x6D62    //RX_FDEQ_GAIN_5
+45    0x5A5C    //RX_FDEQ_GAIN_6
+46    0x6568    //RX_FDEQ_GAIN_7
+47    0x5E6A    //RX_FDEQ_GAIN_8
+48    0x5A5C    //RX_FDEQ_GAIN_9
+49    0x6448    //RX_FDEQ_GAIN_10
+50    0x5A7C    //RX_FDEQ_GAIN_11
+51    0x7460    //RX_FDEQ_GAIN_12
+52    0x646E    //RX_FDEQ_GAIN_13
+53    0x787C    //RX_FDEQ_GAIN_14
+54    0x9898    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0004    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x022A    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x6000    //RX_TDDRC_ALPHA_UP_1
+7    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+8    0x6000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x6000    //RX_TDDRC_ALPHA_DWN_3
+32    0x4000    //RX_TDDRC_ALPHA_DWN_4
+33    0x7214    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0002    //RX_TDDRC_THRD_0
+113    0x0006    //RX_TDDRC_THRD_1
+114    0x0340    //RX_TDDRC_THRD_2
+115    0x1C00    //RX_TDDRC_THRD_3
+116    0x0000    //RX_TDDRC_SLANT_0
+117    0x7FFF    //RX_TDDRC_SLANT_1
+118    0x6000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x038C    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x8468    //RX_FDEQ_GAIN_0
+40    0x4F57    //RX_FDEQ_GAIN_1
+41    0x5952    //RX_FDEQ_GAIN_2
+42    0x5C69    //RX_FDEQ_GAIN_3
+43    0x8586    //RX_FDEQ_GAIN_4
+44    0x8682    //RX_FDEQ_GAIN_5
+45    0x7459    //RX_FDEQ_GAIN_6
+46    0x4B4A    //RX_FDEQ_GAIN_7
+47    0x4C58    //RX_FDEQ_GAIN_8
+48    0x4C4C    //RX_FDEQ_GAIN_9
+49    0x5A48    //RX_FDEQ_GAIN_10
+50    0x487C    //RX_FDEQ_GAIN_11
+51    0x685A    //RX_FDEQ_GAIN_12
+52    0x5A60    //RX_FDEQ_GAIN_13
+53    0x6060    //RX_FDEQ_GAIN_14
+54    0x9090    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0301    //RX_FDEQ_BIN_0
+64    0x0204    //RX_FDEQ_BIN_1
+65    0x0203    //RX_FDEQ_BIN_2
+66    0x0205    //RX_FDEQ_BIN_3
+67    0x0404    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0410    //RX_FDEQ_BIN_6
+70    0x050A    //RX_FDEQ_BIN_7
+71    0x0B07    //RX_FDEQ_BIN_8
+72    0x120E    //RX_FDEQ_BIN_9
+73    0x100E    //RX_FDEQ_BIN_10
+74    0x0E2D    //RX_FDEQ_BIN_11
+75    0x1923    //RX_FDEQ_BIN_12
+76    0x151E    //RX_FDEQ_BIN_13
+77    0x1E2D    //RX_FDEQ_BIN_14
+78    0x2D40    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0035    //RX_FDDRC_BAND_MARGIN_1
+91    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+92    0x0120    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x2000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x2000    //RX_FDDRC_THRD_3_2
+101    0x5000    //RX_FDDRC_THRD_3_3
+102    0x4000    //RX_FDDRC_SLANT_0_0
+103    0x4000    //RX_FDDRC_SLANT_0_1
+104    0x4000    //RX_FDDRC_SLANT_0_2
+105    0x4000    //RX_FDDRC_SLANT_0_3
+106    0x7FFF    //RX_FDDRC_SLANT_1_0
+107    0x7FFF    //RX_FDDRC_SLANT_1_1
+108    0x7FFF    //RX_FDDRC_SLANT_1_2
+109    0x7FFF    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x247C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x847C    //RX_FDEQ_GAIN_0
+197    0x5A56    //RX_FDEQ_GAIN_1
+198    0x6266    //RX_FDEQ_GAIN_2
+199    0x6E7A    //RX_FDEQ_GAIN_3
+200    0x8678    //RX_FDEQ_GAIN_4
+201    0x6D66    //RX_FDEQ_GAIN_5
+202    0x706E    //RX_FDEQ_GAIN_6
+203    0x6C64    //RX_FDEQ_GAIN_7
+204    0x5C6A    //RX_FDEQ_GAIN_8
+205    0x6268    //RX_FDEQ_GAIN_9
+206    0x6462    //RX_FDEQ_GAIN_10
+207    0x646E    //RX_FDEQ_GAIN_11
+208    0x6860    //RX_FDEQ_GAIN_12
+209    0x646A    //RX_FDEQ_GAIN_13
+210    0x7478    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0105    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x0CE0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x03FC    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x13E0    //RX_TPKA_FP
+284    0x0400    //RX_MIN_G_FP
+285    0x1000    //RX_MAX_G_FP
+286    0x0058    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0056    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x007D    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x00B5    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0002    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x19C0    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x016A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8458    //RX_FDEQ_GAIN_0
+197    0x4B4B    //RX_FDEQ_GAIN_1
+198    0x5156    //RX_FDEQ_GAIN_2
+199    0x646C    //RX_FDEQ_GAIN_3
+200    0x7B73    //RX_FDEQ_GAIN_4
+201    0x6D62    //RX_FDEQ_GAIN_5
+202    0x5A5C    //RX_FDEQ_GAIN_6
+203    0x6568    //RX_FDEQ_GAIN_7
+204    0x5E6A    //RX_FDEQ_GAIN_8
+205    0x5A5C    //RX_FDEQ_GAIN_9
+206    0x6448    //RX_FDEQ_GAIN_10
+207    0x5A7C    //RX_FDEQ_GAIN_11
+208    0x7460    //RX_FDEQ_GAIN_12
+209    0x646E    //RX_FDEQ_GAIN_13
+210    0x787C    //RX_FDEQ_GAIN_14
+211    0x9898    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0004    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x022A    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x6000    //RX_TDDRC_ALPHA_UP_1
+164    0x7EB8    //RX_TDDRC_ALPHA_UP_2
+165    0x6000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x6000    //RX_TDDRC_ALPHA_DWN_3
+189    0x4000    //RX_TDDRC_ALPHA_DWN_4
+190    0x7214    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0002    //RX_TDDRC_THRD_0
+270    0x0006    //RX_TDDRC_THRD_1
+271    0x0340    //RX_TDDRC_THRD_2
+272    0x1C00    //RX_TDDRC_THRD_3
+273    0x0000    //RX_TDDRC_SLANT_0
+274    0x7FFF    //RX_TDDRC_SLANT_1
+275    0x6000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x038C    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x8468    //RX_FDEQ_GAIN_0
+197    0x4F57    //RX_FDEQ_GAIN_1
+198    0x5952    //RX_FDEQ_GAIN_2
+199    0x5C69    //RX_FDEQ_GAIN_3
+200    0x8586    //RX_FDEQ_GAIN_4
+201    0x8682    //RX_FDEQ_GAIN_5
+202    0x7459    //RX_FDEQ_GAIN_6
+203    0x4B4A    //RX_FDEQ_GAIN_7
+204    0x4C58    //RX_FDEQ_GAIN_8
+205    0x4C4C    //RX_FDEQ_GAIN_9
+206    0x5A48    //RX_FDEQ_GAIN_10
+207    0x487C    //RX_FDEQ_GAIN_11
+208    0x685A    //RX_FDEQ_GAIN_12
+209    0x5A60    //RX_FDEQ_GAIN_13
+210    0x6060    //RX_FDEQ_GAIN_14
+211    0x9090    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0301    //RX_FDEQ_BIN_0
+221    0x0204    //RX_FDEQ_BIN_1
+222    0x0203    //RX_FDEQ_BIN_2
+223    0x0205    //RX_FDEQ_BIN_3
+224    0x0404    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0410    //RX_FDEQ_BIN_6
+227    0x050A    //RX_FDEQ_BIN_7
+228    0x0B07    //RX_FDEQ_BIN_8
+229    0x120E    //RX_FDEQ_BIN_9
+230    0x100E    //RX_FDEQ_BIN_10
+231    0x0E2D    //RX_FDEQ_BIN_11
+232    0x1923    //RX_FDEQ_BIN_12
+233    0x151E    //RX_FDEQ_BIN_13
+234    0x1E2D    //RX_FDEQ_BIN_14
+235    0x2D40    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0035    //RX_FDDRC_BAND_MARGIN_1
+248    0x00D5    //RX_FDDRC_BAND_MARGIN_2
+249    0x0120    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x2000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x2000    //RX_FDDRC_THRD_3_2
+258    0x5000    //RX_FDDRC_THRD_3_3
+259    0x4000    //RX_FDDRC_SLANT_0_0
+260    0x4000    //RX_FDDRC_SLANT_0_1
+261    0x4000    //RX_FDDRC_SLANT_0_2
+262    0x4000    //RX_FDDRC_SLANT_0_3
+263    0x7FFF    //RX_FDDRC_SLANT_1_0
+264    0x7FFF    //RX_FDDRC_SLANT_1_1
+265    0x7FFF    //RX_FDDRC_SLANT_1_2
+266    0x7FFF    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-NB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0000    //TX_SAMPLINGFREQ_SIG
 7    0x0000    //TX_SAMPLINGFREQ_PROC
@@ -64109,18 +67405,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -64129,8 +67425,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -64216,7 +67512,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7646    //TX_A_HP
+128    0x7652    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x5000    //TX_THR_PITCH_DET_0
 131    0x4800    //TX_THR_PITCH_DET_1
@@ -64226,11 +67522,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -64238,28 +67534,28 @@
 147    0x0100    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7500    //TX_EAD_THR
+150    0x7B00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x0200    //TX_MIN_EQ_RE_EST_0
-153    0x0200    //TX_MIN_EQ_RE_EST_1
-154    0x0200    //TX_MIN_EQ_RE_EST_2
-155    0x0200    //TX_MIN_EQ_RE_EST_3
-156    0x0200    //TX_MIN_EQ_RE_EST_4
-157    0x0200    //TX_MIN_EQ_RE_EST_5
-158    0x0200    //TX_MIN_EQ_RE_EST_6
-159    0x1800    //TX_MIN_EQ_RE_EST_7
-160    0x1800    //TX_MIN_EQ_RE_EST_8
+152    0x2000    //TX_MIN_EQ_RE_EST_0
+153    0x2000    //TX_MIN_EQ_RE_EST_1
+154    0x2000    //TX_MIN_EQ_RE_EST_2
+155    0x2000    //TX_MIN_EQ_RE_EST_3
+156    0x2000    //TX_MIN_EQ_RE_EST_4
+157    0x2000    //TX_MIN_EQ_RE_EST_5
+158    0x2000    //TX_MIN_EQ_RE_EST_6
+159    0x2000    //TX_MIN_EQ_RE_EST_7
+160    0x2000    //TX_MIN_EQ_RE_EST_8
 161    0x3000    //TX_MIN_EQ_RE_EST_9
 162    0x4000    //TX_MIN_EQ_RE_EST_10
 163    0x6000    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x2000    //TX_LAMBDA_RE_EST
+165    0x6000    //TX_LAMBDA_RE_EST
 166    0x0000    //TX_LAMBDA_CB_NLE
-167    0x4000    //TX_C_POST_FLT
+167    0x2000    //TX_C_POST_FLT
 168    0x2000    //TX_GAIN_NP
 169    0x0180    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0008    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -64285,14 +67581,14 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+197    0x7FEE    //TX_DTD_THR1_0
+198    0x7FEE    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
-200    0x7FF0    //TX_DTD_THR1_3
+200    0x7EF4    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
+204    0x0CCD    //TX_DTD_THR2_0
 205    0x0CCD    //TX_DTD_THR2_1
 206    0x0CCD    //TX_DTD_THR2_2
 207    0x0CCD    //TX_DTD_THR2_3
@@ -64301,7 +67597,7 @@
 210    0x0CCD    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x1F40    //TX_DT_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
 214    0x0100    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
@@ -64311,18 +67607,18 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x1000    //TX_ADPT_STRICT_L
 222    0x1000    //TX_ADPT_STRICT_H
-223    0x0001    //TX_RATIO_DT_L_TH_LOW
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x0640    //TX_RATIO_DT_L_TH_HIGH
+225    0x157C    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
-229    0x2000    //TX_B_POST_FILT_ECHO_H
+228    0x1000    //TX_B_POST_FILT_ECHO_L
+229    0x1000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x05DC    //TX_RATIO_DT_L0_TH_HIGH
+234    0x0BB8    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -64330,10 +67626,10 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xF900    //TX_THR_SN_EST_3
+244    0xF200    //TX_THR_SN_EST_2
+245    0xF200    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -64341,7 +67637,7 @@
 250    0x0050    //TX_DELTA_THR_SN_EST_0
 251    0x0200    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0080    //TX_DELTA_THR_SN_EST_3
 254    0x0200    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x01A0    //TX_DELTA_THR_SN_EST_6
@@ -64355,12 +67651,12 @@
 264    0x4000    //TX_LAMBDA_NN_EST_6
 265    0x4000    //TX_LAMBDA_NN_EST_7
 266    0x0400    //TX_N_SN_EST
-267    0x001E    //TX_INBEAM_T
+267    0x0018    //TX_INBEAM_T
 268    0x0041    //TX_INBEAMHOLDT
 269    0x2000    //TX_G_STRICT
 270    0x2000    //TX_EQ_THR_BF
 271    0x7F00    //TX_LAMBDA_EQ_BF
-272    0x1000    //TX_NE_RTO_TH
+272    0x0800    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
 274    0x0800    //TX_MAINREFRTOH_TH_H
 275    0x0800    //TX_MAINREFRTOH_TH_L
@@ -64370,7 +67666,7 @@
 279    0x1000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x0012    //TX_NS_LVL_CTRL_1
+282    0x0020    //TX_NS_LVL_CTRL_1
 283    0x0015    //TX_NS_LVL_CTRL_2
 284    0x0012    //TX_NS_LVL_CTRL_3
 285    0x0012    //TX_NS_LVL_CTRL_4
@@ -64378,20 +67674,20 @@
 287    0x0012    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x000D    //TX_MIN_GAIN_S_1
+290    0x0004    //TX_MIN_GAIN_S_1
 291    0x000F    //TX_MIN_GAIN_S_2
 292    0x000F    //TX_MIN_GAIN_S_3
 293    0x000F    //TX_MIN_GAIN_S_4
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x000F    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x4000    //TX_NMOS_SUP
+297    0x2000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x3000    //TX_SNRI_SUP_1
+301    0x4000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x2400    //TX_SNRI_SUP_3
+303    0x6000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x4000    //TX_SNRI_SUP_5
 306    0x4000    //TX_SNRI_SUP_6
@@ -64403,17 +67699,17 @@
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
 314    0x4000    //TX_A_POST_FILT_S_0
-315    0x2000    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
-317    0x1000    //TX_A_POST_FILT_S_3
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x2000    //TX_A_POST_FILT_S_2
+317    0x2000    //TX_A_POST_FILT_S_3
 318    0x3000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x5000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x1000    //TX_B_POST_FILT_0
-323    0x1000    //TX_B_POST_FILT_1
-324    0x1000    //TX_B_POST_FILT_2
-325    0x5000    //TX_B_POST_FILT_3
+323    0x7000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x4000    //TX_B_POST_FILT_3
 326    0x3000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -64427,8 +67723,8 @@
 336    0x6000    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7E00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
+339    0x7000    //TX_LAMBDA_PFILT_S_0
+340    0x7400    //TX_LAMBDA_PFILT_S_1
 341    0x7900    //TX_LAMBDA_PFILT_S_2
 342    0x7000    //TX_LAMBDA_PFILT_S_3
 343    0x7D00    //TX_LAMBDA_PFILT_S_4
@@ -64442,32 +67738,32 @@
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
 353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0100    //TX_DT_BINVAD_TH_1
-355    0x0100    //TX_DT_BINVAD_TH_2
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
 357    0x0FA0    //TX_DT_BINVAD_ENDF
-358    0x7000    //TX_C_POST_FLT_DT
+358    0x0080    //TX_C_POST_FLT_DT
 359    0x4000    //TX_NS_B_POST_FLT_LESSCUT
-360    0x01B0    //TX_DT_BOOST
+360    0x0100    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
 362    0x0005    //TX_BF_DVG_TH
 363    0x001E    //TX_SN_C_F
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x003B    //TX_NOISE_TH_0
+367    0x0023    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
 371    0x03ED    //TX_NOISE_TH_2
-372    0x2EE0    //TX_NOISE_TH_3
-373    0x5528    //TX_NOISE_TH_4
+372    0x2CEC    //TX_NOISE_TH_3
+373    0x4268    //TX_NOISE_TH_4
 374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0FA0    //TX_NOISE_TH_6
-379    0x00C8    //TX_MINENOISE_TH
+379    0x000A    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x3A98    //TX_RATIODTL_CUT_TH
@@ -64480,12 +67776,12 @@
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
+392    0x7000    //TX_TAIL_DET_TH
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
@@ -64494,7 +67790,7 @@
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x0032    //TX_MINENOISE_MIC0_TH
+406    0x000A    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -64597,25 +67893,25 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -64633,38 +67929,38 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0014    //TX_FDEQ_SUBNUM
-567    0x5050    //TX_FDEQ_GAIN_0
-568    0x5048    //TX_FDEQ_GAIN_1
+567    0x5250    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x483C    //TX_FDEQ_GAIN_3
-571    0x3034    //TX_FDEQ_GAIN_4
-572    0x3048    //TX_FDEQ_GAIN_5
-573    0x4840    //TX_FDEQ_GAIN_6
-574    0x403C    //TX_FDEQ_GAIN_7
-575    0x262C    //TX_FDEQ_GAIN_8
-576    0x3A3C    //TX_FDEQ_GAIN_9
+570    0x4A43    //TX_FDEQ_GAIN_3
+571    0x374B    //TX_FDEQ_GAIN_4
+572    0x3444    //TX_FDEQ_GAIN_5
+573    0x433C    //TX_FDEQ_GAIN_6
+574    0x3A37    //TX_FDEQ_GAIN_7
+575    0x2A2A    //TX_FDEQ_GAIN_8
+576    0x303C    //TX_FDEQ_GAIN_9
 577    0x4848    //TX_FDEQ_GAIN_10
 578    0x4848    //TX_FDEQ_GAIN_11
 579    0x4848    //TX_FDEQ_GAIN_12
@@ -64713,8 +68009,8 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x4A4C    //TX_PREEQ_GAIN_MIC0_8
-626    0x4E50    //TX_PREEQ_GAIN_MIC0_9
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
 627    0x4848    //TX_PREEQ_GAIN_MIC0_10
 628    0x4848    //TX_PREEQ_GAIN_MIC0_11
 629    0x4848    //TX_PREEQ_GAIN_MIC0_12
@@ -64761,9 +68057,9 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4846    //TX_PREEQ_GAIN_MIC1_7
-674    0x4544    //TX_PREEQ_GAIN_MIC1_8
-675    0x4241    //TX_PREEQ_GAIN_MIC1_9
+673    0x4A4A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4B4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4D4E    //TX_PREEQ_GAIN_MIC1_9
 676    0x4848    //TX_PREEQ_GAIN_MIC1_10
 677    0x4848    //TX_PREEQ_GAIN_MIC1_11
 678    0x4848    //TX_PREEQ_GAIN_MIC1_12
@@ -64809,10 +68105,10 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+721    0x484A    //TX_PREEQ_GAIN_MIC2_6
+722    0x4B4B    //TX_PREEQ_GAIN_MIC2_7
+723    0x4B4C    //TX_PREEQ_GAIN_MIC2_8
+724    0x4D50    //TX_PREEQ_GAIN_MIC2_9
 725    0x4848    //TX_PREEQ_GAIN_MIC2_10
 726    0x4848    //TX_PREEQ_GAIN_MIC2_11
 727    0x4848    //TX_PREEQ_GAIN_MIC2_12
@@ -64827,16 +68123,16 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0000    //TX_PREEQ_BIN_MIC2_0
-740    0x0000    //TX_PREEQ_BIN_MIC2_1
-741    0x0000    //TX_PREEQ_BIN_MIC2_2
-742    0x0000    //TX_PREEQ_BIN_MIC2_3
-743    0x0000    //TX_PREEQ_BIN_MIC2_4
-744    0x0000    //TX_PREEQ_BIN_MIC2_5
-745    0x0000    //TX_PREEQ_BIN_MIC2_6
-746    0x0000    //TX_PREEQ_BIN_MIC2_7
-747    0x0000    //TX_PREEQ_BIN_MIC2_8
-748    0x0000    //TX_PREEQ_BIN_MIC2_9
+739    0x0202    //TX_PREEQ_BIN_MIC2_0
+740    0x0203    //TX_PREEQ_BIN_MIC2_1
+741    0x0303    //TX_PREEQ_BIN_MIC2_2
+742    0x0304    //TX_PREEQ_BIN_MIC2_3
+743    0x0405    //TX_PREEQ_BIN_MIC2_4
+744    0x0506    //TX_PREEQ_BIN_MIC2_5
+745    0x0708    //TX_PREEQ_BIN_MIC2_6
+746    0x090A    //TX_PREEQ_BIN_MIC2_7
+747    0x0B0C    //TX_PREEQ_BIN_MIC2_8
+748    0x0D0E    //TX_PREEQ_BIN_MIC2_9
 749    0x0000    //TX_PREEQ_BIN_MIC2_10
 750    0x0000    //TX_PREEQ_BIN_MIC2_11
 751    0x0000    //TX_PREEQ_BIN_MIC2_12
@@ -64861,7 +68157,7 @@
 770    0x0044    //TX_MIC_PWR_BIAS_1
 771    0x0044    //TX_MIC_PWR_BIAS_2
 772    0x0044    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
+773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
@@ -64879,7 +68175,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -64904,23 +68200,23 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
+830    0x0130    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
 833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
@@ -64942,8 +68238,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0004    //TX_TDDRC_THRD_0
-855    0x0010    //TX_TDDRC_THRD_1
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
 856    0x1800    //TX_TDDRC_THRD_2
 857    0x1800    //TX_TDDRC_THRD_3
 858    0x7FFF    //TX_TDDRC_SLANT_0
@@ -64954,7 +68250,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0A00    //TX_TDDRC_DRC_GAIN
+866    0x1C2F    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -64964,7 +68260,7 @@
 873    0xF333    //TX_TFMASKLTH_NS_EST
 874    0x2CCD    //TX_TFMASKLTH_DOA
 875    0xECCD    //TX_TFMASKTH_BLESSCUT
-876    0x1000    //TX_B_LESSCUT_RTO_MASK
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
 877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
 878    0x2000    //TX_B_POST_FLT_MASK
 879    0x0000    //TX_B_POST_FLT_MASK1
@@ -64986,70 +68282,96 @@
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x0300    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7F00    //TX_MICMUTE_EAD_THR
+909    0x4000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7F44    //TX_DTD_THR1_MICMUTE_0
+912    0x7EF4    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
 914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x0FA0    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x0FA0    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3BF6    //TX_TFMASKM4_2_DT_THR
+945    0x7F26    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -65061,7 +68383,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x050D    //RX_PGA
+10    0x00FB    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -65076,8 +68398,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -65912,7 +69234,7 @@
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x050D    //RX_PGA
+167    0x00FB    //RX_PGA
 168    0x7652    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
@@ -65927,8 +69249,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -66754,15 +70076,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0001    //TX_SAMPLINGFREQ_SIG
 7    0x0001    //TX_SAMPLINGFREQ_PROC
@@ -66779,18 +70100,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -66799,8 +70120,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -66871,8 +70192,8 @@
 110    0x0000    //TX_ADCS_MASK
 111    0x04D0    //TX_ADCS_GAIN
 112    0x4000    //TX_NFC_GAINFAC
-113    0x0004    //TX_MAINMIC_BLKFACTOR
-114    0x0004    //TX_REFMIC_BLKFACTOR
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
 115    0x0000    //TX_BLMIC_BLKFACTOR
 116    0x0000    //TX_BRMIC_BLKFACTOR
 117    0x0031    //TX_MICBLK_START_BIN
@@ -66896,11 +70217,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -66908,10 +70229,10 @@
 147    0x0300    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x6800    //TX_EAD_THR
+150    0x6C00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x3000    //TX_MIN_EQ_RE_EST_0
-153    0x0100    //TX_MIN_EQ_RE_EST_1
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
 154    0x0200    //TX_MIN_EQ_RE_EST_2
 155    0x0200    //TX_MIN_EQ_RE_EST_3
 156    0x0200    //TX_MIN_EQ_RE_EST_4
@@ -66922,14 +70243,14 @@
 161    0x1000    //TX_MIN_EQ_RE_EST_9
 162    0x1000    //TX_MIN_EQ_RE_EST_10
 163    0x1000    //TX_MIN_EQ_RE_EST_11
-164    0x1000    //TX_MIN_EQ_RE_EST_12
-165    0x1B00    //TX_LAMBDA_RE_EST
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x4000    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x5000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x02A0    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x0020    //TX_DT2_HOLD_N
+171    0x0088    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -66955,15 +70276,15 @@
 194    0x0000    //TX_NORMENERTH
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
-197    0x76D0    //TX_DTD_THR1_0
-198    0x76D0    //TX_DTD_THR1_1
-199    0x76D0    //TX_DTD_THR1_2
+197    0x7FF8    //TX_DTD_THR1_0
+198    0x7FF8    //TX_DTD_THR1_1
+199    0x7FEE    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
-204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
+204    0x5000    //TX_DTD_THR2_0
+205    0x5000    //TX_DTD_THR2_1
 206    0x5000    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
@@ -66971,8 +70292,8 @@
 210    0x5000    //TX_DTD_THR2_6
 211    0x7FFF    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x03E8    //TX_DT_CUT_K
-214    0x0010    //TX_DT_CUT_THR
+213    0x1F40    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -66981,18 +70302,18 @@
 220    0x0000    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x044C    //TX_RATIO_DT_L_TH_HIGH
-226    0x7800    //TX_RATIO_DT_H_TH_HIGH
+225    0x1194    //TX_RATIO_DT_L_TH_HIGH
+226    0x4A38    //TX_RATIO_DT_H_TH_HIGH
 227    0x0001    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+228    0x4000    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x03E8    //TX_RATIO_DT_L0_TH_HIGH
+234    0x07D0    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -67000,10 +70321,10 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFB00    //TX_THR_SN_EST_3
+244    0xF400    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
 246    0xFA00    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
@@ -67011,7 +70332,7 @@
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
 252    0x0200    //TX_DELTA_THR_SN_EST_2
-253    0x0100    //TX_DELTA_THR_SN_EST_3
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
 256    0x0200    //TX_DELTA_THR_SN_EST_6
@@ -67041,30 +70362,30 @@
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
 282    0x0014    //TX_NS_LVL_CTRL_1
-283    0x0018    //TX_NS_LVL_CTRL_2
+283    0x0014    //TX_NS_LVL_CTRL_2
 284    0x0016    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
 287    0x0014    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
 289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
+290    0x0020    //TX_MIN_GAIN_S_1
 291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
+292    0x0018    //TX_MIN_GAIN_S_3
 293    0x0010    //TX_MIN_GAIN_S_4
 294    0x0010    //TX_MIN_GAIN_S_5
 295    0x0010    //TX_MIN_GAIN_S_6
 296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
+297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x4000    //TX_SNRI_SUP_1
+301    0x2000    //TX_SNRI_SUP_1
 302    0x4000    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
 305    0x50C0    //TX_SNRI_SUP_5
-306    0x4000    //TX_SNRI_SUP_6
+306    0x2000    //TX_SNRI_SUP_6
 307    0x7FFF    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
@@ -67075,15 +70396,15 @@
 314    0x5000    //TX_A_POST_FILT_S_0
 315    0x4C00    //TX_A_POST_FILT_S_1
 316    0x4000    //TX_A_POST_FILT_S_2
-317    0x6000    //TX_A_POST_FILT_S_3
+317    0x7FFF    //TX_A_POST_FILT_S_3
 318    0x4000    //TX_A_POST_FILT_S_4
 319    0x5000    //TX_A_POST_FILT_S_5
 320    0x6000    //TX_A_POST_FILT_S_6
 321    0x7000    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
-323    0x2000    //TX_B_POST_FILT_1
-324    0x2000    //TX_B_POST_FILT_2
-325    0x4000    //TX_B_POST_FILT_3
+323    0x4000    //TX_B_POST_FILT_1
+324    0x7FFF    //TX_B_POST_FILT_2
+325    0x7FFF    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
 328    0x1000    //TX_B_POST_FILT_6
@@ -67098,9 +70419,9 @@
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
 338    0x7C00    //TX_LAMBDA_PFILT
 339    0x7C00    //TX_LAMBDA_PFILT_S_0
-340    0x7C00    //TX_LAMBDA_PFILT_S_1
-341    0x7A00    //TX_LAMBDA_PFILT_S_2
-342    0x7C00    //TX_LAMBDA_PFILT_S_3
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
 343    0x7C00    //TX_LAMBDA_PFILT_S_4
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
@@ -67111,12 +70432,12 @@
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x0800    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
-355    0x0800    //TX_DT_BINVAD_TH_2
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
+355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0800    //TX_DT_BINVAD_TH_3
-357    0x1D4C    //TX_DT_BINVAD_ENDF
-358    0x0800    //TX_C_POST_FLT_DT
+357    0x1F40    //TX_DT_BINVAD_ENDF
+358    0x2000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -67125,23 +70446,23 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0102    //TX_NOISE_TH_0
+367    0x001E    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x017E    //TX_NOISE_TH_1
-371    0x0230    //TX_NOISE_TH_2
-372    0x3492    //TX_NOISE_TH_3
-373    0x4E20    //TX_NOISE_TH_4
-374    0x55B8    //TX_NOISE_TH_5
-375    0x49E6    //TX_NOISE_TH_5_2
+370    0x0320    //TX_NOISE_TH_1
+371    0x0384    //TX_NOISE_TH_2
+372    0x2904    //TX_NOISE_TH_3
+373    0x3E80    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0001    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0F0A    //TX_NOISE_TH_6
-379    0x00F8    //TX_MINENOISE_TH
+379    0x0033    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -67150,25 +70471,25 @@
 389    0x2000    //TX_SN_NPB_GAIN
 390    0x0000    //TX_NN_NPB_GAIN
 391    0x7FFF    //TX_POST_MASK_SUP_HSNE
-392    0x1388    //TX_TAIL_DET_TH
+392    0x7FFF    //TX_TAIL_DET_TH
 393    0x4000    //TX_B_LESSCUT_RTO_WTA
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x00DC    //TX_MINENOISE_MIC0_TH
+406    0x001E    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
+409    0x0400    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -67267,25 +70588,25 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -67303,42 +70624,42 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
-567    0x5454    //TX_FDEQ_GAIN_0
-568    0x5448    //TX_FDEQ_GAIN_1
-569    0x4848    //TX_FDEQ_GAIN_2
-570    0x4848    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
-572    0x4850    //TX_FDEQ_GAIN_5
-573    0x5050    //TX_FDEQ_GAIN_6
-574    0x5448    //TX_FDEQ_GAIN_7
-575    0x464C    //TX_FDEQ_GAIN_8
-576    0x5050    //TX_FDEQ_GAIN_9
-577    0x4848    //TX_FDEQ_GAIN_10
-578    0x4848    //TX_FDEQ_GAIN_11
-579    0x4848    //TX_FDEQ_GAIN_12
-580    0x4848    //TX_FDEQ_GAIN_13
+567    0x5048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4A4F    //TX_FDEQ_GAIN_2
+570    0x4E48    //TX_FDEQ_GAIN_3
+571    0x4444    //TX_FDEQ_GAIN_4
+572    0x444B    //TX_FDEQ_GAIN_5
+573    0x5152    //TX_FDEQ_GAIN_6
+574    0x584F    //TX_FDEQ_GAIN_7
+575    0x4950    //TX_FDEQ_GAIN_8
+576    0x4C48    //TX_FDEQ_GAIN_9
+577    0x3D40    //TX_FDEQ_GAIN_10
+578    0x4240    //TX_FDEQ_GAIN_11
+579    0x4C4C    //TX_FDEQ_GAIN_12
+580    0x4C4C    //TX_FDEQ_GAIN_13
 581    0x4848    //TX_FDEQ_GAIN_14
 582    0x4848    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
@@ -67383,12 +70704,12 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x484A    //TX_PREEQ_GAIN_MIC0_8
-626    0x4B4C    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4A    //TX_PREEQ_GAIN_MIC0_10
-628    0x4A48    //TX_PREEQ_GAIN_MIC0_11
-629    0x4C4C    //TX_PREEQ_GAIN_MIC0_12
-630    0x4C4C    //TX_PREEQ_GAIN_MIC0_13
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
 631    0x4848    //TX_PREEQ_GAIN_MIC0_14
 632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
@@ -67431,13 +70752,13 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4846    //TX_PREEQ_GAIN_MIC1_7
-674    0x4544    //TX_PREEQ_GAIN_MIC1_8
-675    0x4241    //TX_PREEQ_GAIN_MIC1_9
-676    0x403E    //TX_PREEQ_GAIN_MIC1_10
-677    0x3D3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3C3C    //TX_PREEQ_GAIN_MIC1_12
-679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+673    0x484A    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4B    //TX_PREEQ_GAIN_MIC1_8
+675    0x4C4E    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5454    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
 680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
@@ -67457,11 +70778,11 @@
 696    0x0708    //TX_PREEQ_BIN_MIC1_6
 697    0x090A    //TX_PREEQ_BIN_MIC1_7
 698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0F10    //TX_PREEQ_BIN_MIC1_9
-700    0x1011    //TX_PREEQ_BIN_MIC1_10
-701    0x1112    //TX_PREEQ_BIN_MIC1_11
-702    0x1208    //TX_PREEQ_BIN_MIC1_12
-703    0x0000    //TX_PREEQ_BIN_MIC1_13
+699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+700    0x0F10    //TX_PREEQ_BIN_MIC1_10
+701    0x1011    //TX_PREEQ_BIN_MIC1_11
+702    0x1112    //TX_PREEQ_BIN_MIC1_12
+703    0x120B    //TX_PREEQ_BIN_MIC1_13
 704    0x0000    //TX_PREEQ_BIN_MIC1_14
 705    0x0000    //TX_PREEQ_BIN_MIC1_15
 706    0x0000    //TX_PREEQ_BIN_MIC1_16
@@ -67476,19 +70797,19 @@
 715    0x4848    //TX_PREEQ_GAIN_MIC2_0
 716    0x4848    //TX_PREEQ_GAIN_MIC2_1
 717    0x4848    //TX_PREEQ_GAIN_MIC2_2
-718    0x4848    //TX_PREEQ_GAIN_MIC2_3
-719    0x4848    //TX_PREEQ_GAIN_MIC2_4
-720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+718    0x484A    //TX_PREEQ_GAIN_MIC2_3
+719    0x4B4A    //TX_PREEQ_GAIN_MIC2_4
+720    0x4B4C    //TX_PREEQ_GAIN_MIC2_5
+721    0x4C4D    //TX_PREEQ_GAIN_MIC2_6
+722    0x4F50    //TX_PREEQ_GAIN_MIC2_7
+723    0x5050    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5252    //TX_PREEQ_GAIN_MIC2_10
+726    0x5253    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x5454    //TX_PREEQ_GAIN_MIC2_13
+729    0x5455    //TX_PREEQ_GAIN_MIC2_14
+730    0x5555    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -67512,7 +70833,7 @@
 751    0x0808    //TX_PREEQ_BIN_MIC2_12
 752    0x0808    //TX_PREEQ_BIN_MIC2_13
 753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0x0200    //TX_PREEQ_BIN_MIC2_15
+754    0x0808    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -67531,8 +70852,8 @@
 770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
-773    0x0009    //TX_GAIN_LIMIT_0
-774    0x000F    //TX_GAIN_LIMIT_1
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
 775    0x000F    //TX_GAIN_LIMIT_2
 776    0x000F    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
@@ -67549,7 +70870,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -67574,23 +70895,23 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
 833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
@@ -67612,19 +70933,19 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0001    //TX_TDDRC_THRD_0
-855    0x0002    //TX_TDDRC_THRD_1
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
 856    0x1800    //TX_TDDRC_THRD_2
 857    0x1800    //TX_TDDRC_THRD_3
 858    0x7FFF    //TX_TDDRC_SLANT_0
 859    0x7FFF    //TX_TDDRC_SLANT_1
-860    0x0800    //TX_TDDRC_ALPHA_UP_00
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0C97    //TX_TDDRC_DRC_GAIN
+866    0x20C6    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -67656,70 +70977,96 @@
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
 897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02EE    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0C00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7FF6    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
+911    0x7FFF    //TX_DTD_THR1_MICMUTE_0
+912    0x7FDF    //TX_DTD_THR1_MICMUTE_1
 913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
-915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+914    0x7918    //TX_DTD_THR1_MICMUTE_3
+915    0x7000    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x1F40    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x1F40    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x000F    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x3C0A    //TX_TFMASKM4_2_DT_THR
+945    0x2710    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -67731,7 +71078,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x050D    //RX_PGA
+10    0x00E6    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -67746,8 +71093,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -68582,7 +71929,7 @@
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x050D    //RX_PGA
+167    0x00E6    //RX_PGA
 168    0x7652    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
@@ -68597,8 +71944,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -69424,15 +72771,14 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
-2    0x0033    //TX_PATCH_REG
-3    0x6F7C    //TX_SENDFUNC_MODE_0
-4    0x0001    //TX_SENDFUNC_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6FFD    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
 5    0x0002    //TX_NUM_MIC
 6    0x0003    //TX_SAMPLINGFREQ_SIG
 7    0x0003    //TX_SAMPLINGFREQ_PROC
@@ -69449,18 +72795,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -69469,8 +72815,8 @@
 38    0x0002    //TX_MICS_OF_PAIR1
 39    0x0002    //TX_MICS_OF_PAIR2
 40    0x0002    //TX_MICS_OF_PAIR3
-41    0x0002    //TX_MIC_DATA_SRC0
-42    0x0000    //TX_MIC_DATA_SRC1
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
 43    0x0001    //TX_MIC_DATA_SRC2
 44    0x0000    //TX_MIC_DATA_SRC3
 45    0x0000    //TX_MIC_PAIR_CH_04
@@ -69556,7 +72902,7 @@
 125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
 126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
 127    0x0010    //TX_MIC_BLOCK_N
-128    0x7D83    //TX_A_HP
+128    0x7B02    //TX_A_HP
 129    0x4000    //TX_B_PE
 130    0x5000    //TX_THR_PITCH_DET_0
 131    0x4800    //TX_THR_PITCH_DET_1
@@ -69566,11 +72912,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -69578,28 +72924,28 @@
 147    0x0400    //TX_AEC_REF_GAIN_0
 148    0x0800    //TX_AEC_REF_GAIN_1
 149    0x0800    //TX_AEC_REF_GAIN_2
-150    0x7600    //TX_EAD_THR
+150    0x7A00    //TX_EAD_THR
 151    0x1000    //TX_THR_RE_EST
-152    0x2000    //TX_MIN_EQ_RE_EST_0
-153    0x0600    //TX_MIN_EQ_RE_EST_1
-154    0x3000    //TX_MIN_EQ_RE_EST_2
-155    0x3000    //TX_MIN_EQ_RE_EST_3
-156    0x3000    //TX_MIN_EQ_RE_EST_4
-157    0x3000    //TX_MIN_EQ_RE_EST_5
-158    0x3000    //TX_MIN_EQ_RE_EST_6
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
 159    0x1000    //TX_MIN_EQ_RE_EST_7
-160    0x7800    //TX_MIN_EQ_RE_EST_8
-161    0x7800    //TX_MIN_EQ_RE_EST_9
-162    0x7800    //TX_MIN_EQ_RE_EST_10
-163    0x7800    //TX_MIN_EQ_RE_EST_11
-164    0x7800    //TX_MIN_EQ_RE_EST_12
-165    0x0880    //TX_LAMBDA_RE_EST
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
 166    0x7FFF    //TX_LAMBDA_CB_NLE
 167    0x7FFF    //TX_C_POST_FLT
 168    0x4000    //TX_GAIN_NP
-169    0x0180    //TX_SE_HOLD_N
+169    0x0260    //TX_SE_HOLD_N
 170    0x00C8    //TX_DT_HOLD_N
-171    0x05DC    //TX_DT2_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
 172    0x6666    //TX_AEC_RESRV_0
 173    0x0000    //TX_AEC_RESRV_1
 174    0x0014    //TX_AEC_RESRV_2
@@ -69626,23 +72972,23 @@
 195    0x0000    //TX_NORMENERHIGHTH
 196    0x0000    //TX_NORMENERHIGHTHL
 197    0x7FF0    //TX_DTD_THR1_0
-198    0x7FF0    //TX_DTD_THR1_1
+198    0x7FF3    //TX_DTD_THR1_1
 199    0x7FF0    //TX_DTD_THR1_2
 200    0x7FF0    //TX_DTD_THR1_3
 201    0x7FF0    //TX_DTD_THR1_4
 202    0x7FF0    //TX_DTD_THR1_5
 203    0x7FF0    //TX_DTD_THR1_6
 204    0x7E00    //TX_DTD_THR2_0
-205    0x7E00    //TX_DTD_THR2_1
-206    0x5000    //TX_DTD_THR2_2
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
 207    0x5000    //TX_DTD_THR2_3
 208    0x5000    //TX_DTD_THR2_4
 209    0x5000    //TX_DTD_THR2_5
 210    0x5000    //TX_DTD_THR2_6
-211    0x7FFF    //TX_DTD_THR3
+211    0x6CCC    //TX_DTD_THR3
 212    0x0000    //TX_SPK_CUT_K
-213    0x36B0    //TX_DT_CUT_K
-214    0x0100    //TX_DT_CUT_THR
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
 215    0x04EB    //TX_COMFORT_G
 216    0x01F4    //TX_POWER_YOUT_TH
 217    0x4000    //TX_FDPFGAINECHO
@@ -69651,18 +72997,18 @@
 220    0x7FFF    //TX_DTD_MIC_BLK
 221    0x023E    //TX_ADPT_STRICT_L
 222    0x023E    //TX_ADPT_STRICT_H
-223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1770    //TX_RATIO_DT_L_TH_HIGH
-226    0x733C    //TX_RATIO_DT_H_TH_HIGH
-227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
 229    0x7FFF    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
 232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x3A98    //TX_RATIO_DT_L0_TH_HIGH
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
 235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -69670,21 +73016,21 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xFA00    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
-244    0xFA00    //TX_THR_SN_EST_2
-245    0xFA00    //TX_THR_SN_EST_3
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
 246    0xF800    //TX_THR_SN_EST_4
 247    0xFA00    //TX_THR_SN_EST_5
 248    0xF800    //TX_THR_SN_EST_6
 249    0xF800    //TX_THR_SN_EST_7
 250    0x0100    //TX_DELTA_THR_SN_EST_0
 251    0x0100    //TX_DELTA_THR_SN_EST_1
-252    0x0100    //TX_DELTA_THR_SN_EST_2
-253    0x0000    //TX_DELTA_THR_SN_EST_3
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
 254    0x0100    //TX_DELTA_THR_SN_EST_4
 255    0x0200    //TX_DELTA_THR_SN_EST_5
-256    0x0100    //TX_DELTA_THR_SN_EST_6
+256    0x0200    //TX_DELTA_THR_SN_EST_6
 257    0x0200    //TX_DELTA_THR_SN_EST_7
 258    0x4000    //TX_LAMBDA_NN_EST_0
 259    0x4000    //TX_LAMBDA_NN_EST_1
@@ -69702,61 +73048,61 @@
 271    0x799A    //TX_LAMBDA_EQ_BF
 272    0x1000    //TX_NE_RTO_TH
 273    0x0400    //TX_NE_RTO_TH_L
-274    0x0800    //TX_MAINREFRTOH_TH_H
-275    0x0800    //TX_MAINREFRTOH_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
 276    0x0800    //TX_MAINREFRTO_TH_H
 277    0x0800    //TX_MAINREFRTO_TH_L
 278    0x0200    //TX_MAINREFRTO_TH_EQ
 279    0x2000    //TX_B_POST_FLT_0
 280    0x1000    //TX_B_POST_FLT_1
 281    0x0010    //TX_NS_LVL_CTRL_0
-282    0x003C    //TX_NS_LVL_CTRL_1
-283    0x0024    //TX_NS_LVL_CTRL_2
-284    0x003C    //TX_NS_LVL_CTRL_3
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
 285    0x0014    //TX_NS_LVL_CTRL_4
 286    0x0011    //TX_NS_LVL_CTRL_5
-287    0x003C    //TX_NS_LVL_CTRL_6
+287    0x001A    //TX_NS_LVL_CTRL_6
 288    0x0011    //TX_NS_LVL_CTRL_7
-289    0x000F    //TX_MIN_GAIN_S_0
-290    0x0010    //TX_MIN_GAIN_S_1
-291    0x0010    //TX_MIN_GAIN_S_2
-292    0x0010    //TX_MIN_GAIN_S_3
-293    0x0010    //TX_MIN_GAIN_S_4
-294    0x0010    //TX_MIN_GAIN_S_5
-295    0x0010    //TX_MIN_GAIN_S_6
-296    0x000F    //TX_MIN_GAIN_S_7
-297    0x6000    //TX_NMOS_SUP
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
 298    0x0000    //TX_NS_MAX_PRI_SNR_TH
 299    0x0000    //TX_NMOS_SUP_MENSA
 300    0x7FFF    //TX_SNRI_SUP_0
-301    0x1400    //TX_SNRI_SUP_1
-302    0x1400    //TX_SNRI_SUP_2
-303    0x4000    //TX_SNRI_SUP_3
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
 304    0x4000    //TX_SNRI_SUP_4
-305    0x50C0    //TX_SNRI_SUP_5
-306    0x1400    //TX_SNRI_SUP_6
-307    0x7FFF    //TX_SNRI_SUP_7
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
 308    0x7FFF    //TX_THR_LFNS
 309    0x0018    //TX_G_LFNS
 310    0x09C4    //TX_GAIN0_NTH
 311    0x000A    //TX_MUSIC_MORENS
 312    0x7FFF    //TX_A_POST_FILT_0
 313    0x2000    //TX_A_POST_FILT_1
-314    0x5000    //TX_A_POST_FILT_S_0
-315    0x4C00    //TX_A_POST_FILT_S_1
-316    0x4000    //TX_A_POST_FILT_S_2
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
 317    0x6000    //TX_A_POST_FILT_S_3
-318    0x4000    //TX_A_POST_FILT_S_4
-319    0x5000    //TX_A_POST_FILT_S_5
-320    0x7C00    //TX_A_POST_FILT_S_6
-321    0x7000    //TX_A_POST_FILT_S_7
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
 322    0x2000    //TX_B_POST_FILT_0
 323    0x6000    //TX_B_POST_FILT_1
-324    0x6000    //TX_B_POST_FILT_2
+324    0x7000    //TX_B_POST_FILT_2
 325    0x6000    //TX_B_POST_FILT_3
 326    0x4000    //TX_B_POST_FILT_4
 327    0x1000    //TX_B_POST_FILT_5
-328    0x1000    //TX_B_POST_FILT_6
+328    0x6000    //TX_B_POST_FILT_6
 329    0x2000    //TX_B_POST_FILT_7
 330    0x4000    //TX_B_LESSCUT_RTO_S_0
 331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
@@ -69766,17 +73112,17 @@
 335    0x6000    //TX_B_LESSCUT_RTO_S_5
 336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
 337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
-338    0x7C00    //TX_LAMBDA_PFILT
-339    0x7D00    //TX_LAMBDA_PFILT_S_0
-340    0x7D00    //TX_LAMBDA_PFILT_S_1
-341    0x7D00    //TX_LAMBDA_PFILT_S_2
-342    0x7D00    //TX_LAMBDA_PFILT_S_3
-343    0x7D00    //TX_LAMBDA_PFILT_S_4
-344    0x7D00    //TX_LAMBDA_PFILT_S_5
-345    0x7D00    //TX_LAMBDA_PFILT_S_6
-346    0x7D00    //TX_LAMBDA_PFILT_S_7
-347    0x0200    //TX_K_PEPPER
-348    0x0400    //TX_A_PEPPER
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
@@ -69784,9 +73130,9 @@
 353    0x0040    //TX_DT_BINVAD_TH_0
 354    0x0040    //TX_DT_BINVAD_TH_1
 355    0x0100    //TX_DT_BINVAD_TH_2
-356    0x0100    //TX_DT_BINVAD_TH_3
+356    0x2000    //TX_DT_BINVAD_TH_3
 357    0x36B0    //TX_DT_BINVAD_ENDF
-358    0x0200    //TX_C_POST_FLT_DT
+358    0x1000    //TX_C_POST_FLT_DT
 359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
 360    0x0140    //TX_DT_BOOST
 361    0x0000    //TX_BF_SGRAD_FLG
@@ -69795,23 +73141,23 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x0383    //TX_NOISE_TH_0
+367    0x0050    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
-370    0x07D0    //TX_NOISE_TH_1
+370    0x0FA0    //TX_NOISE_TH_1
 371    0x01F4    //TX_NOISE_TH_2
-372    0x36B0    //TX_NOISE_TH_3
+372    0x300C    //TX_NOISE_TH_3
 373    0x2710    //TX_NOISE_TH_4
-374    0x2CEC    //TX_NOISE_TH_5
+374    0x7FFF    //TX_NOISE_TH_5
 375    0x7FFF    //TX_NOISE_TH_5_2
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x0DAC    //TX_NOISE_TH_6
-379    0x044C    //TX_MINENOISE_TH
+379    0x0050    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
 382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x0DAC    //TX_DT_CUT_K1
+383    0x07D0    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -69825,20 +73171,20 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0005    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x02F3    //TX_MINENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x4000    //TX_MIN_G_CTRL_SSNS
-409    0x0000    //TX_METAL_RTO_THR
-410    0x4848    //TX_NS_FP_K_METAL
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
 411    0x3A98    //TX_NOISEDET_BOOST_TH
 412    0x0FA0    //TX_NSMOOTH_TH
 413    0x0000    //TX_NS_RESRV_8
@@ -69937,25 +73283,25 @@
 506    0x2000    //TX_RADIODTLV
 507    0x0320    //TX_POWER_LINEIN_TH
 508    0x0014    //TX_FE_VADCOUNT_TH_FC
-509    0x0000    //TX_ECHO_SUPP_FC
+509    0x000A    //TX_ECHO_SUPP_FC
 510    0x0C80    //TX_ECHO_TH
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -69973,44 +73319,44 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
-567    0x5450    //TX_FDEQ_GAIN_0
-568    0x4C48    //TX_FDEQ_GAIN_1
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4850    //TX_FDEQ_GAIN_2
 570    0x5050    //TX_FDEQ_GAIN_3
-571    0x4848    //TX_FDEQ_GAIN_4
+571    0x4B48    //TX_FDEQ_GAIN_4
 572    0x484E    //TX_FDEQ_GAIN_5
-573    0x4E5E    //TX_FDEQ_GAIN_6
-574    0x584E    //TX_FDEQ_GAIN_7
-575    0x4C4E    //TX_FDEQ_GAIN_8
-576    0x564E    //TX_FDEQ_GAIN_9
-577    0x5058    //TX_FDEQ_GAIN_10
-578    0x625C    //TX_FDEQ_GAIN_11
-579    0x6C6C    //TX_FDEQ_GAIN_12
-580    0x7086    //TX_FDEQ_GAIN_13
-581    0x869C    //TX_FDEQ_GAIN_14
-582    0xB0B0    //TX_FDEQ_GAIN_15
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -70034,7 +73380,7 @@
 603    0x1B1E    //TX_FDEQ_BIN_12
 604    0x1E1E    //TX_FDEQ_BIN_13
 605    0x1E28    //TX_FDEQ_BIN_14
-606    0x284A    //TX_FDEQ_BIN_15
+606    0x282C    //TX_FDEQ_BIN_15
 607    0x0000    //TX_FDEQ_BIN_16
 608    0x0000    //TX_FDEQ_BIN_17
 609    0x0000    //TX_FDEQ_BIN_18
@@ -70044,7 +73390,7 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
@@ -70053,14 +73399,14 @@
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
 623    0x4848    //TX_PREEQ_GAIN_MIC0_6
 624    0x4848    //TX_PREEQ_GAIN_MIC0_7
-625    0x494A    //TX_PREEQ_GAIN_MIC0_8
-626    0x4B4C    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4A    //TX_PREEQ_GAIN_MIC0_10
-628    0x484B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4C4C    //TX_PREEQ_GAIN_MIC0_12
-630    0x4B48    //TX_PREEQ_GAIN_MIC0_13
-631    0x3838    //TX_PREEQ_GAIN_MIC0_14
-632    0x3835    //TX_PREEQ_GAIN_MIC0_15
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
 633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
@@ -70075,17 +73421,17 @@
 644    0x0304    //TX_PREEQ_BIN_MIC0_3
 645    0x0405    //TX_PREEQ_BIN_MIC0_4
 646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0708    //TX_PREEQ_BIN_MIC0_6
-648    0x090A    //TX_PREEQ_BIN_MIC0_7
-649    0x0B0C    //TX_PREEQ_BIN_MIC0_8
-650    0x0D0E    //TX_PREEQ_BIN_MIC0_9
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
 651    0x1013    //TX_PREEQ_BIN_MIC0_10
-652    0x1719    //TX_PREEQ_BIN_MIC0_11
-653    0x1B1E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E1E    //TX_PREEQ_BIN_MIC0_13
-655    0x1E28    //TX_PREEQ_BIN_MIC0_14
-656    0x282C    //TX_PREEQ_BIN_MIC0_15
-657    0x0000    //TX_PREEQ_BIN_MIC0_16
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -70093,7 +73439,7 @@
 662    0x0000    //TX_PREEQ_BIN_MIC0_21
 663    0x0000    //TX_PREEQ_BIN_MIC0_22
 664    0x0000    //TX_PREEQ_BIN_MIC0_23
-665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
 666    0x4848    //TX_PREEQ_GAIN_MIC1_0
 667    0x4848    //TX_PREEQ_GAIN_MIC1_1
 668    0x4848    //TX_PREEQ_GAIN_MIC1_2
@@ -70101,16 +73447,16 @@
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
 672    0x4848    //TX_PREEQ_GAIN_MIC1_6
-673    0x4846    //TX_PREEQ_GAIN_MIC1_7
-674    0x4544    //TX_PREEQ_GAIN_MIC1_8
-675    0x4241    //TX_PREEQ_GAIN_MIC1_9
-676    0x403E    //TX_PREEQ_GAIN_MIC1_10
-677    0x3D3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3C3C    //TX_PREEQ_GAIN_MIC1_12
-679    0x3C39    //TX_PREEQ_GAIN_MIC1_13
-680    0x3838    //TX_PREEQ_GAIN_MIC1_14
-681    0x3A3C    //TX_PREEQ_GAIN_MIC1_15
-682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
 684    0x4848    //TX_PREEQ_GAIN_MIC1_18
 685    0x4848    //TX_PREEQ_GAIN_MIC1_19
@@ -70124,17 +73470,17 @@
 693    0x0304    //TX_PREEQ_BIN_MIC1_3
 694    0x0405    //TX_PREEQ_BIN_MIC1_4
 695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0708    //TX_PREEQ_BIN_MIC1_6
-697    0x090A    //TX_PREEQ_BIN_MIC1_7
-698    0x0B0C    //TX_PREEQ_BIN_MIC1_8
-699    0x0D0E    //TX_PREEQ_BIN_MIC1_9
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
 700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1719    //TX_PREEQ_BIN_MIC1_11
-702    0x1B1E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E1E    //TX_PREEQ_BIN_MIC1_13
-704    0x1E28    //TX_PREEQ_BIN_MIC1_14
-705    0x282C    //TX_PREEQ_BIN_MIC1_15
-706    0x0000    //TX_PREEQ_BIN_MIC1_16
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -70149,16 +73495,16 @@
 718    0x4848    //TX_PREEQ_GAIN_MIC2_3
 719    0x4848    //TX_PREEQ_GAIN_MIC2_4
 720    0x4848    //TX_PREEQ_GAIN_MIC2_5
-721    0x4848    //TX_PREEQ_GAIN_MIC2_6
-722    0x4848    //TX_PREEQ_GAIN_MIC2_7
-723    0x4848    //TX_PREEQ_GAIN_MIC2_8
-724    0x4848    //TX_PREEQ_GAIN_MIC2_9
-725    0x4848    //TX_PREEQ_GAIN_MIC2_10
-726    0x4848    //TX_PREEQ_GAIN_MIC2_11
-727    0x4848    //TX_PREEQ_GAIN_MIC2_12
-728    0x4848    //TX_PREEQ_GAIN_MIC2_13
-729    0x4848    //TX_PREEQ_GAIN_MIC2_14
-730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
 731    0x4848    //TX_PREEQ_GAIN_MIC2_16
 732    0x4848    //TX_PREEQ_GAIN_MIC2_17
 733    0x4848    //TX_PREEQ_GAIN_MIC2_18
@@ -70167,22 +73513,22 @@
 736    0x4848    //TX_PREEQ_GAIN_MIC2_21
 737    0x4848    //TX_PREEQ_GAIN_MIC2_22
 738    0x4848    //TX_PREEQ_GAIN_MIC2_23
-739    0x0608    //TX_PREEQ_BIN_MIC2_0
-740    0x0808    //TX_PREEQ_BIN_MIC2_1
-741    0x0808    //TX_PREEQ_BIN_MIC2_2
-742    0x0808    //TX_PREEQ_BIN_MIC2_3
-743    0x0808    //TX_PREEQ_BIN_MIC2_4
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
 744    0x0808    //TX_PREEQ_BIN_MIC2_5
-745    0x0808    //TX_PREEQ_BIN_MIC2_6
-746    0x0808    //TX_PREEQ_BIN_MIC2_7
-747    0x0808    //TX_PREEQ_BIN_MIC2_8
-748    0x0808    //TX_PREEQ_BIN_MIC2_9
-749    0x0808    //TX_PREEQ_BIN_MIC2_10
-750    0x0808    //TX_PREEQ_BIN_MIC2_11
-751    0x0808    //TX_PREEQ_BIN_MIC2_12
-752    0x0808    //TX_PREEQ_BIN_MIC2_13
-753    0x0808    //TX_PREEQ_BIN_MIC2_14
-754    0xF200    //TX_PREEQ_BIN_MIC2_15
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
 755    0x0000    //TX_PREEQ_BIN_MIC2_16
 756    0x0000    //TX_PREEQ_BIN_MIC2_17
 757    0x0000    //TX_PREEQ_BIN_MIC2_18
@@ -70198,12 +73544,12 @@
 767    0x0050    //TX_MIC_CALIBRATION_2
 768    0x0050    //TX_MIC_CALIBRATION_3
 769    0x0046    //TX_MIC_PWR_BIAS_0
-770    0x0040    //TX_MIC_PWR_BIAS_1
+770    0x0046    //TX_MIC_PWR_BIAS_1
 771    0x0046    //TX_MIC_PWR_BIAS_2
 772    0x0046    //TX_MIC_PWR_BIAS_3
 773    0x0000    //TX_GAIN_LIMIT_0
 774    0x000F    //TX_GAIN_LIMIT_1
-775    0x0000    //TX_GAIN_LIMIT_2
+775    0x000F    //TX_GAIN_LIMIT_2
 776    0x0000    //TX_GAIN_LIMIT_3
 777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
 778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
@@ -70219,7 +73565,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -70244,23 +73590,23 @@
 813    0x5333    //TX_FDDRC_SLANT_1_1
 814    0x5333    //TX_FDDRC_SLANT_1_2
 815    0x5333    //TX_FDDRC_SLANT_1_3
-816    0x0010    //TX_DEADMIC_SILENCE_TH
-817    0x0600    //TX_MIC_DEGRADE_TH
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
 818    0x0078    //TX_DEADMIC_CNT
 819    0x0078    //TX_MIC_DEGRADE_CNT
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
-830    0x2000    //TX_TPKA_FP
-831    0x0080    //TX_MIN_G_FP
-832    0x2000    //TX_MAX_G_FP
+830    0x0100    //TX_TPKA_FP
+831    0x0400    //TX_MIN_G_FP
+832    0x0800    //TX_MAX_G_FP
 833    0x4848    //TX_FFP_FP_K_METAL
 834    0x4000    //TX_A_POST_FLT_FP
 835    0x0F5C    //TX_RTO_OUTBEAM_TH
@@ -70282,8 +73628,8 @@
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
 853    0x0002    //TX_FILTINDX
-854    0x0003    //TX_TDDRC_THRD_0
-855    0x0004    //TX_TDDRC_THRD_1
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
 856    0x1800    //TX_TDDRC_THRD_2
 857    0x1800    //TX_TDDRC_THRD_3
 858    0x7FFF    //TX_TDDRC_SLANT_0
@@ -70294,7 +73640,7 @@
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0E21    //TX_TDDRC_DRC_GAIN
+866    0x237B    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -70319,77 +73665,103 @@
 888    0x00C8    //TX_FASTNS_ARSPC_TH
 889    0x8000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x4000    //TX_A_LESSCUT_RTO_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
 895    0xCCCC    //TX_FASTNS_SSA_THLFH
 896    0xD999    //TX_FASTNS_SSA_THHFH
-897    0x2339    //TX_SENDFUNC_REG_MICMUTE
-898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
-899    0x02BC    //TX_MICMUTE_RATIO_THR
-900    0x0140    //TX_MICMUTE_AMP_THR
-901    0x0004    //TX_MICMUTE_HPF_IND
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
 902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
-903    0x0008    //TX_MICMUTE_CVG_TIME
+903    0x0009    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
-905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
-908    0x7999    //TX_MICMUTE_EAD_THR
-909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
 910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
-911    0x4000    //TX_DTD_THR1_MICMUTE_0
-912    0x7000    //TX_DTD_THR1_MICMUTE_1
-913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
-914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
 915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
-916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
-917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
-918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
-919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
-920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
 921    0x4000    //TX_MICMUTE_C_POST_FLT
-922    0x03E8    //TX_MICMUTE_DT_CUT_K
-923    0x0001    //TX_MICMUTE_DT_CUT_THR
-924    0x03E8    //TX_MICMUTE_DT_CUT_K2
-925    0x0001    //TX_MICMUTE_DT_CUT_THR2
-926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
 927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
 928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
 929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
-939    0x0010    //TX_MIC1MUTE_RATIO_THR
-940    0x0450    //TX_MIC1MUTE_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -70416,8 +73788,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -71242,7 +74614,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2040    //RX_RECVFUNC_MODE_0
+157    0x0040    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -71267,8 +74639,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -72094,16 +75466,15 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_VCO-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
 0    0x0001    //TX_OPERATION_MODE_0
 1    0x0001    //TX_OPERATION_MODE_1
 2    0x0033    //TX_PATCH_REG
-3    0x6B7C    //TX_SENDFUNC_MODE_0
+3    0x4B7C    //TX_SENDFUNC_MODE_0
 4    0x0001    //TX_SENDFUNC_MODE_1
-5    0x0002    //TX_NUM_MIC
+5    0x0003    //TX_NUM_MIC
 6    0x0004    //TX_SAMPLINGFREQ_SIG
 7    0x0004    //TX_SAMPLINGFREQ_PROC
 8    0x000A    //TX_FRAME_SZ_SIG
@@ -72119,18 +75490,18 @@
 18    0x0000    //TX_SYS_RESRV_2
 19    0x0000    //TX_SYS_RESRV_3
 20    0x0000    //TX_DIST2REF0
-21    0x009D    //TX_DIST2REF1
-22    0x0010    //TX_DIST2REF_02
+21    0x00A4    //TX_DIST2REF1
+22    0x0017    //TX_DIST2REF_02
 23    0x0000    //TX_DIST2REF_03
 24    0x0000    //TX_DIST2REF_04
 25    0x0000    //TX_DIST2REF_05
 26    0x0000    //TX_MMIC
-27    0x1000    //TX_PGA_0
-28    0x1000    //TX_PGA_1
-29    0x1000    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+27    0x0FF7    //TX_PGA_0
+28    0x0FF7    //TX_PGA_1
+29    0x0FF7    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0001    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0002    //TX_MICS_FOR_BF
@@ -72236,11 +75607,11 @@
 135    0x0050    //TX_TD_AEC_L
 136    0x4000    //TX_MU0_UNP_TD_AEC
 137    0x1000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -72263,7 +75634,7 @@
 162    0x7FFF    //TX_MIN_EQ_RE_EST_10
 163    0x7FFF    //TX_MIN_EQ_RE_EST_11
 164    0x7FFF    //TX_MIN_EQ_RE_EST_12
-165    0x0700    //TX_LAMBDA_RE_EST
+165    0x4000    //TX_LAMBDA_RE_EST
 166    0x0CCD    //TX_LAMBDA_CB_NLE
 167    0x2000    //TX_C_POST_FLT
 168    0x7FFF    //TX_GAIN_NP
@@ -72323,16 +75694,16 @@
 222    0x023E    //TX_ADPT_STRICT_H
 223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
 224    0x3A98    //TX_RATIO_DT_H_TH_LOW
-225    0x1194    //TX_RATIO_DT_L_TH_HIGH
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
 226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
 227    0x09C4    //TX_RATIO_DT_L0_TH
-228    0x7FFF    //TX_B_POST_FILT_ECHO_L
+228    0x2000    //TX_B_POST_FILT_ECHO_L
 229    0x2000    //TX_B_POST_FILT_ECHO_H
 230    0x0200    //TX_MIN_G_CTRL_ECHO
 231    0x1000    //TX_B_LESSCUT_RTO_ECHO
-232    0x0063    //TX_EPD_OFFSET_00
+232    0x0000    //TX_EPD_OFFSET_00
 233    0x0000    //TX_EPD_OFFST_01
-234    0x0A28    //TX_RATIO_DT_L0_TH_HIGH
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
 235    0x3A98    //TX_RATIO_DT_H_TH_CUT
 236    0x7FFF    //TX_MIN_EQ_RE_EST_13
 237    0x0000    //TX_DTD_THR1_7
@@ -72340,7 +75711,7 @@
 239    0x0800    //TX_DT_RESRV_7
 240    0x0800    //TX_DT_RESRV_8
 241    0x0000    //TX_DT_RESRV_9
-242    0xF700    //TX_THR_SN_EST_0
+242    0xF800    //TX_THR_SN_EST_0
 243    0xFA00    //TX_THR_SN_EST_1
 244    0xFA00    //TX_THR_SN_EST_2
 245    0xFB00    //TX_THR_SN_EST_3
@@ -72445,14 +75816,14 @@
 344    0x7C00    //TX_LAMBDA_PFILT_S_5
 345    0x7C00    //TX_LAMBDA_PFILT_S_6
 346    0x7C00    //TX_LAMBDA_PFILT_S_7
-347    0x0180    //TX_K_PEPPER
+347    0x0000    //TX_K_PEPPER
 348    0x0800    //TX_A_PEPPER
 349    0x1EAA    //TX_K_PEPPER_HF
 350    0x0600    //TX_A_PEPPER_HF
 351    0x0001    //TX_HMNC_BST_FLG
 352    0x0200    //TX_HMNC_BST_THR
-353    0x2000    //TX_DT_BINVAD_TH_0
-354    0x0800    //TX_DT_BINVAD_TH_1
+353    0x0200    //TX_DT_BINVAD_TH_0
+354    0x0200    //TX_DT_BINVAD_TH_1
 355    0x0200    //TX_DT_BINVAD_TH_2
 356    0x0200    //TX_DT_BINVAD_TH_3
 357    0x1F40    //TX_DT_BINVAD_ENDF
@@ -72465,7 +75836,7 @@
 364    0x0000    //TX_K_APT
 365    0x0001    //TX_NOISEDET
 366    0x0064    //TX_NDETCT
-367    0x04E8    //TX_NOISE_TH_0
+367    0x0050    //TX_NOISE_TH_0
 368    0x7FFF    //TX_NOISE_TH_0_2
 369    0x7FFF    //TX_NOISE_TH_0_3
 370    0x07D0    //TX_NOISE_TH_1
@@ -72477,11 +75848,11 @@
 376    0x0000    //TX_NOISE_TH_5_3
 377    0x7FFF    //TX_NOISE_TH_5_4
 378    0x2710    //TX_NOISE_TH_6
-379    0x02BC    //TX_MINENOISE_TH
+379    0x0033    //TX_MINENOISE_TH
 380    0xD508    //TX_MORENS_TFMASK_TH
 381    0x0001    //TX_DRC_QUIET_FLOOR
-382    0x3A98    //TX_RATIODTL_CUT_TH
-383    0x1482    //TX_DT_CUT_K1
+382    0x7999    //TX_RATIODTL_CUT_TH
+383    0x0119    //TX_DT_CUT_K1
 384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
 385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
 386    0x0333    //TX_OUT_ENER_S_TH_NOISY
@@ -72495,16 +75866,16 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0002    //TX_EXTRA_NS_L
+397    0x0002    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
-399    0x7FFF    //TX_A_POST_FLT_WNS
+399    0x4000    //TX_A_POST_FLT_WNS
 400    0x0148    //TX_MIN_G_LOW300HZ
-401    0x0004    //TX_MAXLEVEL_CNG
+401    0x0002    //TX_MAXLEVEL_CNG
 402    0x00B4    //TX_STN_NOISE_TH
 403    0x4000    //TX_POST_MASK_SUP
 404    0x7FFF    //TX_POST_MASK_ADJUST
 405    0x00C8    //TX_NS_ENOISE_MIC0_TH
-406    0x04E7    //TX_MINENOISE_MIC0_TH
+406    0x0033    //TX_MINENOISE_MIC0_TH
 407    0x012C    //TX_MINENOISE_MIC0_S_TH
 408    0x7FFF    //TX_MIN_G_CTRL_SSNS
 409    0x0000    //TX_METAL_RTO_THR
@@ -72612,20 +75983,20 @@
 511    0x6666    //TX_MIC_TO_BFGAIN
 512    0x0000    //TX_MICTOBFGAIN0
 513    0x0000    //TX_FASTMUE_TH
-514    0xC000    //TX_DEREVERB_LF_MU
-515    0xC000    //TX_DEREVERB_HF_MU
-516    0xCCCC    //TX_DEREVERB_DELAY
-517    0xD999    //TX_DEREVERB_COEF_LEN
-518    0x1F40    //TX_DEREVERB_DNR
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
 519    0x0000    //TX_DEREVERB_ALPHA
 520    0x0000    //TX_DEREVERB_BETA
-521    0x0000    //TX_GSC_RTOL_TH
-522    0x7000    //TX_GSC_RTOH_TH
-523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x1333    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0004    //TX_SNR_THR
@@ -72643,44 +76014,44 @@
 542    0x2800    //TX_RATIOMICH_TH
 543    0xD120    //TX_WIND_INBEAM_L_TH
 544    0x0FA0    //TX_WIND_INBEAM_H_TH
-545    0x2000    //TX_WNS_RESRV_0
-546    0x59D8    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0070    //TX_BF_LESSCUT_BBIN
-554    0x0070    //TX_BF_LESSCUT_EBIN
-555    0x0010    //TX_POSTBFB0
-556    0x0070    //TX_POSTBFB
-557    0x00B0    //TX_POSTBFE
-558    0x0E66    //TX_SPEECH_SNR_TH
-559    0x0050    //TX_PB_MAX_PRI_SNR_TH
-560    0x770A    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
 568    0x4848    //TX_FDEQ_GAIN_1
 569    0x4848    //TX_FDEQ_GAIN_2
-570    0x484C    //TX_FDEQ_GAIN_3
-571    0x4C4C    //TX_FDEQ_GAIN_4
-572    0x544C    //TX_FDEQ_GAIN_5
-573    0x5454    //TX_FDEQ_GAIN_6
-574    0x5454    //TX_FDEQ_GAIN_7
-575    0x585A    //TX_FDEQ_GAIN_8
-576    0x5C5C    //TX_FDEQ_GAIN_9
-577    0x6068    //TX_FDEQ_GAIN_10
-578    0x8894    //TX_FDEQ_GAIN_11
-579    0x94B4    //TX_FDEQ_GAIN_12
-580    0xB4C7    //TX_FDEQ_GAIN_13
-581    0xC7C6    //TX_FDEQ_GAIN_14
-582    0xC6C6    //TX_FDEQ_GAIN_15
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4853    //TX_FDEQ_GAIN_9
+577    0x5450    //TX_FDEQ_GAIN_10
+578    0x7465    //TX_FDEQ_GAIN_11
+579    0x807F    //TX_FDEQ_GAIN_12
+580    0x82C4    //TX_FDEQ_GAIN_13
+581    0xC4C4    //TX_FDEQ_GAIN_14
+582    0xC4C4    //TX_FDEQ_GAIN_15
 583    0x4848    //TX_FDEQ_GAIN_16
 584    0x4848    //TX_FDEQ_GAIN_17
 585    0x4848    //TX_FDEQ_GAIN_18
@@ -72714,24 +76085,24 @@
 613    0x0000    //TX_FDEQ_BIN_22
 614    0x0000    //TX_FDEQ_BIN_23
 615    0x0000    //TX_FDEQ_PADDING
-616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
 617    0x4848    //TX_PREEQ_GAIN_MIC0_0
 618    0x4848    //TX_PREEQ_GAIN_MIC0_1
 619    0x4848    //TX_PREEQ_GAIN_MIC0_2
 620    0x4848    //TX_PREEQ_GAIN_MIC0_3
 621    0x4848    //TX_PREEQ_GAIN_MIC0_4
 622    0x4848    //TX_PREEQ_GAIN_MIC0_5
-623    0x4849    //TX_PREEQ_GAIN_MIC0_6
-624    0x4A4B    //TX_PREEQ_GAIN_MIC0_7
-625    0x4C4B    //TX_PREEQ_GAIN_MIC0_8
-626    0x4A48    //TX_PREEQ_GAIN_MIC0_9
-627    0x4B4C    //TX_PREEQ_GAIN_MIC0_10
-628    0x4C4B    //TX_PREEQ_GAIN_MIC0_11
-629    0x4838    //TX_PREEQ_GAIN_MIC0_12
-630    0x3858    //TX_PREEQ_GAIN_MIC0_13
-631    0x7060    //TX_PREEQ_GAIN_MIC0_14
-632    0x9870    //TX_PREEQ_GAIN_MIC0_15
-633    0x5848    //TX_PREEQ_GAIN_MIC0_16
+623    0x4A4C    //TX_PREEQ_GAIN_MIC0_6
+624    0x4E50    //TX_PREEQ_GAIN_MIC0_7
+625    0x5456    //TX_PREEQ_GAIN_MIC0_8
+626    0x585C    //TX_PREEQ_GAIN_MIC0_9
+627    0x5C64    //TX_PREEQ_GAIN_MIC0_10
+628    0x7478    //TX_PREEQ_GAIN_MIC0_11
+629    0x705C    //TX_PREEQ_GAIN_MIC0_12
+630    0x4838    //TX_PREEQ_GAIN_MIC0_13
+631    0x3C70    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
 634    0x4848    //TX_PREEQ_GAIN_MIC0_17
 635    0x4848    //TX_PREEQ_GAIN_MIC0_18
 636    0x4848    //TX_PREEQ_GAIN_MIC0_19
@@ -72745,17 +76116,17 @@
 644    0x0304    //TX_PREEQ_BIN_MIC0_3
 645    0x0405    //TX_PREEQ_BIN_MIC0_4
 646    0x0506    //TX_PREEQ_BIN_MIC0_5
-647    0x0808    //TX_PREEQ_BIN_MIC0_6
-648    0x0809    //TX_PREEQ_BIN_MIC0_7
-649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+647    0x0708    //TX_PREEQ_BIN_MIC0_6
+648    0x0909    //TX_PREEQ_BIN_MIC0_7
+649    0x090B    //TX_PREEQ_BIN_MIC0_8
 650    0x0C10    //TX_PREEQ_BIN_MIC0_9
 651    0x1013    //TX_PREEQ_BIN_MIC0_10
 652    0x1414    //TX_PREEQ_BIN_MIC0_11
-653    0x261E    //TX_PREEQ_BIN_MIC0_12
-654    0x1E14    //TX_PREEQ_BIN_MIC0_13
-655    0x1414    //TX_PREEQ_BIN_MIC0_14
-656    0x2814    //TX_PREEQ_BIN_MIC0_15
-657    0x4000    //TX_PREEQ_BIN_MIC0_16
+653    0x1414    //TX_PREEQ_BIN_MIC0_12
+654    0x1C1E    //TX_PREEQ_BIN_MIC0_13
+655    0x1E28    //TX_PREEQ_BIN_MIC0_14
+656    0x462C    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
 658    0x0000    //TX_PREEQ_BIN_MIC0_17
 659    0x0000    //TX_PREEQ_BIN_MIC0_18
 660    0x0000    //TX_PREEQ_BIN_MIC0_19
@@ -72770,15 +76141,15 @@
 669    0x4848    //TX_PREEQ_GAIN_MIC1_3
 670    0x4848    //TX_PREEQ_GAIN_MIC1_4
 671    0x4848    //TX_PREEQ_GAIN_MIC1_5
-672    0x4645    //TX_PREEQ_GAIN_MIC1_6
-673    0x4442    //TX_PREEQ_GAIN_MIC1_7
-674    0x4140    //TX_PREEQ_GAIN_MIC1_8
-675    0x3E3D    //TX_PREEQ_GAIN_MIC1_9
-676    0x3C3C    //TX_PREEQ_GAIN_MIC1_10
-677    0x3C3C    //TX_PREEQ_GAIN_MIC1_11
-678    0x3938    //TX_PREEQ_GAIN_MIC1_12
-679    0x3A3C    //TX_PREEQ_GAIN_MIC1_13
-680    0x3C3E    //TX_PREEQ_GAIN_MIC1_14
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
 681    0x4848    //TX_PREEQ_GAIN_MIC1_15
 682    0x4848    //TX_PREEQ_GAIN_MIC1_16
 683    0x4848    //TX_PREEQ_GAIN_MIC1_17
@@ -72788,23 +76159,23 @@
 687    0x4848    //TX_PREEQ_GAIN_MIC1_21
 688    0x4848    //TX_PREEQ_GAIN_MIC1_22
 689    0x4848    //TX_PREEQ_GAIN_MIC1_23
-690    0x0202    //TX_PREEQ_BIN_MIC1_0
-691    0x0203    //TX_PREEQ_BIN_MIC1_1
-692    0x0303    //TX_PREEQ_BIN_MIC1_2
-693    0x0304    //TX_PREEQ_BIN_MIC1_3
-694    0x0405    //TX_PREEQ_BIN_MIC1_4
-695    0x0506    //TX_PREEQ_BIN_MIC1_5
-696    0x0808    //TX_PREEQ_BIN_MIC1_6
-697    0x0809    //TX_PREEQ_BIN_MIC1_7
-698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
-699    0x0C10    //TX_PREEQ_BIN_MIC1_9
-700    0x1013    //TX_PREEQ_BIN_MIC1_10
-701    0x1414    //TX_PREEQ_BIN_MIC1_11
-702    0x261E    //TX_PREEQ_BIN_MIC1_12
-703    0x1E14    //TX_PREEQ_BIN_MIC1_13
-704    0x1414    //TX_PREEQ_BIN_MIC1_14
-705    0x2814    //TX_PREEQ_BIN_MIC1_15
-706    0x4000    //TX_PREEQ_BIN_MIC1_16
+690    0x1812    //TX_PREEQ_BIN_MIC1_0
+691    0x0A0A    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x080A    //TX_PREEQ_BIN_MIC1_3
+694    0x0B09    //TX_PREEQ_BIN_MIC1_4
+695    0x0A06    //TX_PREEQ_BIN_MIC1_5
+696    0x0606    //TX_PREEQ_BIN_MIC1_6
+697    0x0605    //TX_PREEQ_BIN_MIC1_7
+698    0x050A    //TX_PREEQ_BIN_MIC1_8
+699    0x1505    //TX_PREEQ_BIN_MIC1_9
+700    0x0506    //TX_PREEQ_BIN_MIC1_10
+701    0x0615    //TX_PREEQ_BIN_MIC1_11
+702    0x1516    //TX_PREEQ_BIN_MIC1_12
+703    0x2021    //TX_PREEQ_BIN_MIC1_13
+704    0x2021    //TX_PREEQ_BIN_MIC1_14
+705    0x2021    //TX_PREEQ_BIN_MIC1_15
+706    0x0800    //TX_PREEQ_BIN_MIC1_16
 707    0x0000    //TX_PREEQ_BIN_MIC1_17
 708    0x0000    //TX_PREEQ_BIN_MIC1_18
 709    0x0000    //TX_PREEQ_BIN_MIC1_19
@@ -72889,7 +76260,7 @@
 788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
 789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
 790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
-791    0x7214    //TX_TDDRC_TD_DRC_LIMIT
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
 792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
 793    0x0000    //TX_TDDRC_RESRV_0
 794    0x0000    //TX_TDDRC_RESRV_1
@@ -72921,12 +76292,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x7FFF    //TX_KS_NOISEPASTE_FACTOR
-824    0x0001    //TX_KS_CONFIG
-825    0x7FFF    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -72951,20 +76322,20 @@
 850    0x0000    //TX_FFP_RESRV_4
 851    0x0000    //TX_FFP_RESRV_5
 852    0x0000    //TX_FFP_RESRV_6
-853    0x0002    //TX_FILTINDX
+853    0x0004    //TX_FILTINDX
 854    0x0004    //TX_TDDRC_THRD_0
 855    0x0016    //TX_TDDRC_THRD_1
-856    0x1800    //TX_TDDRC_THRD_2
-857    0x1800    //TX_TDDRC_THRD_3
-858    0x7FFF    //TX_TDDRC_SLANT_0
-859    0x7FFF    //TX_TDDRC_SLANT_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
 860    0x0C00    //TX_TDDRC_ALPHA_UP_00
 861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
 862    0x0000    //TX_TDDRC_HMNC_FLAG
 863    0x199A    //TX_TDDRC_HMNC_GAIN
 864    0x0000    //TX_TDDRC_SMT_FLAG
 865    0x0CCD    //TX_TDDRC_SMT_W
-866    0x0B39    //TX_TDDRC_DRC_GAIN
+866    0x0A98    //TX_TDDRC_DRC_GAIN
 867    0x7FFF    //TX_TDDRC_LMT_THRD
 868    0x0000    //TX_TDDRC_LMT_ALPHA
 869    0x0000    //TX_TFMASKLTH
@@ -72989,7 +76360,7 @@
 888    0x0028    //TX_FASTNS_ARSPC_TH
 889    0xC000    //TX_FASTNS_MASK5_TH
 890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
-891    0x7000    //TX_A_LESSCUT_RTO_MASK
+891    0x1000    //TX_A_LESSCUT_RTO_MASK
 892    0x1770    //TX_FASTNS_NOISETH
 893    0xC000    //TX_FASTNS_SSA_THLFL
 894    0xC000    //TX_FASTNS_SSA_THHFL
@@ -73004,7 +76375,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -73031,35 +76402,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -73086,8 +76483,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -73937,8 +77334,2703 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-TTY_VCO-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x00FB    //TX_PATCH_REG
+3    0x6F7D    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0002    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0096    //TX_DIST2REF1
+22    0x0019    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0800    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0001    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0002    //TX_MIC_DATA_SRC1
+43    0x0001    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3B33    //TX_DIST2REF_11
+73    0x0A70    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0CAE    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7B02    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x5000    //TX_THR_PITCH_DET_0
+131    0x4800    //TX_THR_PITCH_DET_1
+132    0x4000    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x0400    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7A00    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0200    //TX_MIN_EQ_RE_EST_1
+154    0x0200    //TX_MIN_EQ_RE_EST_2
+155    0x0200    //TX_MIN_EQ_RE_EST_3
+156    0x0200    //TX_MIN_EQ_RE_EST_4
+157    0x0200    //TX_MIN_EQ_RE_EST_5
+158    0x0200    //TX_MIN_EQ_RE_EST_6
+159    0x1000    //TX_MIN_EQ_RE_EST_7
+160    0x1000    //TX_MIN_EQ_RE_EST_8
+161    0x1000    //TX_MIN_EQ_RE_EST_9
+162    0x1000    //TX_MIN_EQ_RE_EST_10
+163    0x1000    //TX_MIN_EQ_RE_EST_11
+164    0x6000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x7FFF    //TX_LAMBDA_CB_NLE
+167    0x7FFF    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0260    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x0160    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7FF0    //TX_DTD_THR1_0
+198    0x7FF3    //TX_DTD_THR1_1
+199    0x7FF0    //TX_DTD_THR1_2
+200    0x7FF0    //TX_DTD_THR1_3
+201    0x7FF0    //TX_DTD_THR1_4
+202    0x7FF0    //TX_DTD_THR1_5
+203    0x7FF0    //TX_DTD_THR1_6
+204    0x7E00    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x5000    //TX_DTD_THR2_3
+208    0x5000    //TX_DTD_THR2_4
+209    0x5000    //TX_DTD_THR2_5
+210    0x5000    //TX_DTD_THR2_6
+211    0x6CCC    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0FA0    //TX_DT_CUT_K
+214    0x0020    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x7FFF    //TX_DTD_MIC_BLK
+221    0x023E    //TX_ADPT_STRICT_L
+222    0x023E    //TX_ADPT_STRICT_H
+223    0x0001    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x0578    //TX_RATIO_DT_L_TH_HIGH
+226    0x5528    //TX_RATIO_DT_H_TH_HIGH
+227    0x0001    //TX_RATIO_DT_L0_TH
+228    0x6000    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x0190    //TX_RATIO_DT_L0_TH_HIGH
+235    0x7FFF    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF800    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFD00    //TX_THR_SN_EST_2
+245    0xFC00    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0100    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x001A    //TX_NS_LVL_CTRL_1
+283    0x000C    //TX_NS_LVL_CTRL_2
+284    0x001A    //TX_NS_LVL_CTRL_3
+285    0x0014    //TX_NS_LVL_CTRL_4
+286    0x0011    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x0020    //TX_MIN_GAIN_S_0
+290    0x0020    //TX_MIN_GAIN_S_1
+291    0x0020    //TX_MIN_GAIN_S_2
+292    0x0020    //TX_MIN_GAIN_S_3
+293    0x0020    //TX_MIN_GAIN_S_4
+294    0x0020    //TX_MIN_GAIN_S_5
+295    0x0020    //TX_MIN_GAIN_S_6
+296    0x0020    //TX_MIN_GAIN_S_7
+297    0x4000    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x2000    //TX_SNRI_SUP_1
+302    0x3000    //TX_SNRI_SUP_2
+303    0x2000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x2000    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0018    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x7FFF    //TX_A_POST_FILT_S_0
+315    0x4000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x7FFF    //TX_A_POST_FILT_S_4
+319    0x7FFF    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x7FFF    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x6000    //TX_B_POST_FILT_1
+324    0x7000    //TX_B_POST_FILT_2
+325    0x6000    //TX_B_POST_FILT_3
+326    0x4000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x6000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x4000    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x6000    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7F00    //TX_LAMBDA_PFILT
+339    0x7400    //TX_LAMBDA_PFILT_S_0
+340    0x7F00    //TX_LAMBDA_PFILT_S_1
+341    0x7F00    //TX_LAMBDA_PFILT_S_2
+342    0x7F00    //TX_LAMBDA_PFILT_S_3
+343    0x7F00    //TX_LAMBDA_PFILT_S_4
+344    0x7F00    //TX_LAMBDA_PFILT_S_5
+345    0x7F00    //TX_LAMBDA_PFILT_S_6
+346    0x7F00    //TX_LAMBDA_PFILT_S_7
+347    0x01F4    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0600    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0040    //TX_DT_BINVAD_TH_0
+354    0x0040    //TX_DT_BINVAD_TH_1
+355    0x0100    //TX_DT_BINVAD_TH_2
+356    0x2000    //TX_DT_BINVAD_TH_3
+357    0x36B0    //TX_DT_BINVAD_ENDF
+358    0x1000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0140    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0064    //TX_NDETCT
+367    0x0050    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x0FA0    //TX_NOISE_TH_1
+371    0x01F4    //TX_NOISE_TH_2
+372    0x300C    //TX_NOISE_TH_3
+373    0x2710    //TX_NOISE_TH_4
+374    0x7FFF    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x0DAC    //TX_NOISE_TH_6
+379    0x0050    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x07D0    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0005    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0050    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x4000    //TX_MIN_G_CTRL_SSNS
+409    0x0200    //TX_METAL_RTO_THR
+410    0x07D0    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x2000    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x4000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0x3000    //TX_DEREVERB_LF_MU
+515    0x34CD    //TX_DEREVERB_HF_MU
+516    0x0007    //TX_DEREVERB_DELAY
+517    0x0004    //TX_DEREVERB_COEF_LEN
+518    0x0003    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x3A98    //TX_GSC_RTOL_TH
+522    0x3A98    //TX_GSC_RTOH_TH
+523    0x7E2C    //TX_WIDE2_MEANHTH
+524    0x0064    //TX_KIDDET_NTH
+525    0x1000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4850    //TX_FDEQ_GAIN_2
+570    0x5050    //TX_FDEQ_GAIN_3
+571    0x4B48    //TX_FDEQ_GAIN_4
+572    0x484E    //TX_FDEQ_GAIN_5
+573    0x4E58    //TX_FDEQ_GAIN_6
+574    0x565E    //TX_FDEQ_GAIN_7
+575    0x484E    //TX_FDEQ_GAIN_8
+576    0x4E4C    //TX_FDEQ_GAIN_9
+577    0x4A4A    //TX_FDEQ_GAIN_10
+578    0x534D    //TX_FDEQ_GAIN_11
+579    0x6050    //TX_FDEQ_GAIN_12
+580    0x585C    //TX_FDEQ_GAIN_13
+581    0x5C70    //TX_FDEQ_GAIN_14
+582    0x7880    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0030    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0202    //TX_PREEQ_BIN_MIC0_0
+642    0x0203    //TX_PREEQ_BIN_MIC0_1
+643    0x0303    //TX_PREEQ_BIN_MIC0_2
+644    0x0304    //TX_PREEQ_BIN_MIC0_3
+645    0x0405    //TX_PREEQ_BIN_MIC0_4
+646    0x0506    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0809    //TX_PREEQ_BIN_MIC0_7
+649    0x0A0A    //TX_PREEQ_BIN_MIC0_8
+650    0x0C10    //TX_PREEQ_BIN_MIC0_9
+651    0x1013    //TX_PREEQ_BIN_MIC0_10
+652    0x1414    //TX_PREEQ_BIN_MIC0_11
+653    0x261E    //TX_PREEQ_BIN_MIC0_12
+654    0x1E14    //TX_PREEQ_BIN_MIC0_13
+655    0x1414    //TX_PREEQ_BIN_MIC0_14
+656    0x2814    //TX_PREEQ_BIN_MIC0_15
+657    0x401E    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0030    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4849    //TX_PREEQ_GAIN_MIC1_7
+674    0x4A4A    //TX_PREEQ_GAIN_MIC1_8
+675    0x4B4D    //TX_PREEQ_GAIN_MIC1_9
+676    0x4E4F    //TX_PREEQ_GAIN_MIC1_10
+677    0x5052    //TX_PREEQ_GAIN_MIC1_11
+678    0x5354    //TX_PREEQ_GAIN_MIC1_12
+679    0x5454    //TX_PREEQ_GAIN_MIC1_13
+680    0x5653    //TX_PREEQ_GAIN_MIC1_14
+681    0x4C48    //TX_PREEQ_GAIN_MIC1_15
+682    0x4444    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0202    //TX_PREEQ_BIN_MIC1_0
+691    0x0203    //TX_PREEQ_BIN_MIC1_1
+692    0x0303    //TX_PREEQ_BIN_MIC1_2
+693    0x0304    //TX_PREEQ_BIN_MIC1_3
+694    0x0405    //TX_PREEQ_BIN_MIC1_4
+695    0x0506    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0809    //TX_PREEQ_BIN_MIC1_7
+698    0x0A0A    //TX_PREEQ_BIN_MIC1_8
+699    0x0C10    //TX_PREEQ_BIN_MIC1_9
+700    0x1013    //TX_PREEQ_BIN_MIC1_10
+701    0x1414    //TX_PREEQ_BIN_MIC1_11
+702    0x261E    //TX_PREEQ_BIN_MIC1_12
+703    0x1E14    //TX_PREEQ_BIN_MIC1_13
+704    0x1414    //TX_PREEQ_BIN_MIC1_14
+705    0x2814    //TX_PREEQ_BIN_MIC1_15
+706    0x401E    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x494B    //TX_PREEQ_GAIN_MIC2_6
+722    0x4C4D    //TX_PREEQ_GAIN_MIC2_7
+723    0x4E4F    //TX_PREEQ_GAIN_MIC2_8
+724    0x5051    //TX_PREEQ_GAIN_MIC2_9
+725    0x5255    //TX_PREEQ_GAIN_MIC2_10
+726    0x5754    //TX_PREEQ_GAIN_MIC2_11
+727    0x5454    //TX_PREEQ_GAIN_MIC2_12
+728    0x544F    //TX_PREEQ_GAIN_MIC2_13
+729    0x463D    //TX_PREEQ_GAIN_MIC2_14
+730    0x4A48    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0203    //TX_PREEQ_BIN_MIC2_0
+740    0x0303    //TX_PREEQ_BIN_MIC2_1
+741    0x0304    //TX_PREEQ_BIN_MIC2_2
+742    0x0405    //TX_PREEQ_BIN_MIC2_3
+743    0x0506    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0809    //TX_PREEQ_BIN_MIC2_6
+746    0x0A0A    //TX_PREEQ_BIN_MIC2_7
+747    0x0C10    //TX_PREEQ_BIN_MIC2_8
+748    0x1013    //TX_PREEQ_BIN_MIC2_9
+749    0x1414    //TX_PREEQ_BIN_MIC2_10
+750    0x261E    //TX_PREEQ_BIN_MIC2_11
+751    0x1E14    //TX_PREEQ_BIN_MIC2_12
+752    0x1414    //TX_PREEQ_BIN_MIC2_13
+753    0x2814    //TX_PREEQ_BIN_MIC2_14
+754    0x4022    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0050    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0050    //TX_MIC_CALIBRATION_2
+768    0x0050    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x0000    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0800    //TX_TDDRC_ALPHA_UP_01
+784    0x0800    //TX_TDDRC_ALPHA_UP_02
+785    0x0800    //TX_TDDRC_ALPHA_UP_03
+786    0x0800    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0006    //TX_DEADMIC_SILENCE_TH
+817    0x2800    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0096    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0018    //TX_TDDRC_THRD_1
+856    0x1800    //TX_TDDRC_THRD_2
+857    0x1800    //TX_TDDRC_THRD_3
+858    0x7FFF    //TX_TDDRC_SLANT_0
+859    0x7FFF    //TX_TDDRC_SLANT_1
+860    0x0800    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x27D0    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x6000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2379    //TX_SENDFUNC_REG_MICMUTE
+898    0x0020    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02F0    //TX_MICMUTE_RATIO_THR
+900    0x02F0    //TX_MICMUTE_AMP_THR
+901    0x0000    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0009    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x0E00    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0000    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7FD0    //TX_MICMUTE_EAD_THR
+909    0x3000    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x7DFA    //TX_DTD_THR1_MICMUTE_0
+912    0x7FFF    //TX_DTD_THR1_MICMUTE_1
+913    0x7FDA    //TX_DTD_THR1_MICMUTE_2
+914    0x7EF4    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x0200    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x3E80    //TX_MICMUTE_DT_CUT_K
+923    0x0100    //TX_MICMUTE_DT_CUT_THR
+924    0x3E80    //TX_MICMUTE_DT_CUT_K2
+925    0x0100    //TX_MICMUTE_DT_CUT_THR2
+926    0x0014    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x7FFF    //TX_MIC1MUTE_RATIO_THR
+940    0x0001    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0100    //TX_MIC_VOLUME_MIC1MUTE
+944    0x36B0    //TX_TFMASKM4_2_DT_THR
+945    0x6590    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x000A    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -74764,7 +80856,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-NB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -74798,9 +80889,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -74906,11 +80997,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -74957,7 +81048,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -75165,7 +81256,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -75292,10 +81383,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -75313,26 +81404,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -75591,12 +81682,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -75674,7 +81765,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -75701,35 +81792,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -75741,7 +81858,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x050D    //RX_PGA
+10    0x00FB    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -75756,8 +81873,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -76592,7 +82709,7 @@
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x050D    //RX_PGA
+167    0x00FB    //RX_PGA
 168    0x7652    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
@@ -76607,8 +82724,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -77434,7 +83551,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-WB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -77468,9 +83584,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -77576,11 +83692,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -77627,7 +83743,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -77835,7 +83951,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -77962,10 +84078,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -77983,26 +84099,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -78261,12 +84377,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -78344,7 +84460,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -78371,35 +84487,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -78411,7 +84553,7 @@
 7    0x3000    //RX_TDDRC_ALPHA_UP_2
 8    0x3000    //RX_TDDRC_ALPHA_UP_3
 9    0x3000    //RX_TDDRC_ALPHA_UP_4
-10    0x050D    //RX_PGA
+10    0x00E6    //RX_PGA
 11    0x7652    //RX_A_HP
 12    0x4000    //RX_B_PE
 13    0x7800    //RX_THR_PITCH_DET_0
@@ -78426,8 +84568,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -79262,7 +85404,7 @@
 164    0x3000    //RX_TDDRC_ALPHA_UP_2
 165    0x3000    //RX_TDDRC_ALPHA_UP_3
 166    0x3000    //RX_TDDRC_ALPHA_UP_4
-167    0x050D    //RX_PGA
+167    0x00E6    //RX_PGA
 168    0x7652    //RX_A_HP
 169    0x4000    //RX_B_PE
 170    0x7800    //RX_THR_PITCH_DET_0
@@ -79277,8 +85419,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -80104,7 +86246,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-SWB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -80138,9 +86279,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -80246,11 +86387,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -80297,7 +86438,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -80505,7 +86646,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -80632,10 +86773,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -80653,26 +86794,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -80931,12 +87072,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -81014,7 +87155,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -81041,35 +87182,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -81096,8 +87263,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -81922,7 +88089,7 @@
 129    0x0100    //RX_SPK_VOL
 130    0x0000    //RX_VOL_RESRV_0
 #RX 2
-157    0x2040    //RX_RECVFUNC_MODE_0
+157    0x0040    //RX_RECVFUNC_MODE_0
 158    0x0000    //RX_RECVFUNC_MODE_1
 159    0x0000    //RX_SAMPLINGFREQ_SIG
 160    0x0000    //RX_SAMPLINGFREQ_PROC
@@ -81947,8 +88114,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -82774,7 +88941,6 @@
 287    0x0000    //RX_VOL_RESRV_0
 
 #CASE_NAME  HEADSET-TTY_FULL-VOICE_GENERIC-FB
-#PARAM_MODE  Full
 #PARAM_TYPE  TX+2RX
 #TOTAL_CUSTOM_STEP  7+7
 #TX
@@ -82808,9 +88974,9 @@
 27    0x0302    //TX_PGA_0
 28    0x0800    //TX_PGA_1
 29    0x0800    //TX_PGA_2
-30    0x0000    //TX_PGA_3
-31    0x0000    //TX_PGA_4
-32    0x0000    //TX_PGA_5
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
 33    0x0000    //TX_MIC_PAIRS
 34    0x0000    //TX_MIC_PAIRS_HS
 35    0x0000    //TX_MICS_FOR_BF
@@ -82916,11 +89082,11 @@
 135    0x0000    //TX_TD_AEC_L
 136    0x0000    //TX_MU0_UNP_TD_AEC
 137    0x0000    //TX_MU0_PTD_TD_AEC
-138    0x0000    //TX_PP_RESRV_0
-139    0x2A94    //TX_PP_RESRV_1
-140    0x55F0    //TX_PP_RESRV_2
-141    0x0000    //TX_PP_RESRV_3
-142    0x0000    //TX_PP_RESRV_4
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
 143    0x0000    //TX_PP_RESRV_5
 144    0x0000    //TX_PP_RESRV_6
 145    0x0000    //TX_PP_RESRV_7
@@ -82967,7 +89133,7 @@
 186    0x0000    //TX_MU0_PTD_FRQ_AEC
 187    0x0000    //TX_MINENOISETH
 188    0x0000    //TX_MU0_RE_EST
-189    0x0000    //TX_AEC_NUM_CH
+189    0x0001    //TX_AEC_NUM_CH
 190    0x0000    //TX_BIGECHOATTENUATION_MAX
 191    0x0000    //TX_A_POST_FLT_MICBLK
 192    0x0000    //TX_BLKENERTH
@@ -83175,7 +89341,7 @@
 394    0x0000    //TX_MEL_G_R
 395    0x0080    //TX_SUPHIGH_TH
 396    0x0000    //TX_MASK_G_R
-397    0x0000    //TX_EXTRA_NS_L
+397    0x0000    //TX_LOGSNR_THR
 398    0x1800    //TX_C_POST_FLT_MASK
 399    0x7FFF    //TX_A_POST_FLT_WNS
 400    0x0000    //TX_MIN_G_LOW300HZ
@@ -83302,10 +89468,10 @@
 521    0x0000    //TX_GSC_RTOL_TH
 522    0x7000    //TX_GSC_RTOH_TH
 523    0x0064    //TX_WIDE2_MEANHTH
-524    0x0000    //TX_DR_RESRV_5
-525    0x0000    //TX_DR_RESRV_6
-526    0x0000    //TX_DR_RESRV_7
-527    0x0000    //TX_DR_RESRV_8
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
 528    0x0000    //TX_WIND_MARK_TH
 529    0x399A    //TX_CORR_THR
 530    0x0028    //TX_SNR_THR
@@ -83323,26 +89489,26 @@
 542    0x0000    //TX_RATIOMICH_TH
 543    0x0000    //TX_WIND_INBEAM_L_TH
 544    0x0000    //TX_WIND_INBEAM_H_TH
-545    0x0000    //TX_WNS_RESRV_0
-546    0x0000    //TX_WNS_RESRV_1
-547    0x0000    //TX_WNS_RESRV_2
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
 548    0x0000    //TX_WNS_RESRV_3
 549    0x0000    //TX_WNS_RESRV_4
 550    0x0000    //TX_WNS_RESRV_5
 551    0x0000    //TX_WNS_RESRV_6
-552    0x0000    //TX_PB_B_POST_FLT_LESSCUT
-553    0x0000    //TX_BF_LESSCUT_BBIN
-554    0x0000    //TX_BF_LESSCUT_EBIN
-555    0x0000    //TX_POSTBFB0
-556    0x0000    //TX_POSTBFB
-557    0x0000    //TX_POSTBFE
-558    0x0000    //TX_SPEECH_SNR_TH
-559    0x0000    //TX_PB_MAX_PRI_SNR_TH
-560    0x0000    //TX_MAX_PRI_SNR_TH_L
-561    0x0000    //TX_PFGAIN
-562    0x0000    //TX_MAINTOREFR_TH
-563    0x0000    //TX_SAM_MARK
-564    0x0000    //TX_PB_RESRV_0
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
 565    0x0000    //TX_PB_RESRV_1
 566    0x0020    //TX_FDEQ_SUBNUM
 567    0x4848    //TX_FDEQ_GAIN_0
@@ -83601,12 +89767,12 @@
 820    0x0000    //TX_FDDRC_RESRV_4
 821    0x0000    //TX_FDDRC_RESRV_5
 822    0x0000    //TX_FDDRC_RESRV_6
-823    0x0000    //TX_KS_NOISEPASTE_FACTOR
-824    0x0000    //TX_KS_CONFIG
-825    0x0000    //TX_KS_GAIN_MIN
-826    0x0000    //TX_KS_RESRV_0
-827    0x0000    //TX_KS_RESRV_1
-828    0x0000    //TX_KS_RESRV_2
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
 829    0x7C00    //TX_LAMBDA_PKA_FP
 830    0x2000    //TX_TPKA_FP
 831    0x0080    //TX_MIN_G_FP
@@ -83684,7 +89850,7 @@
 903    0x0008    //TX_MICMUTE_CVG_TIME
 904    0x0008    //TX_MICMUTE_RELEASE_TIME
 905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
-906    0x0020    //TX_MICMUTE_EPD_OFFSET_0
+906    0x0020    //TX_MICMUTE_DIST2REF_1
 907    0x001E    //TX_MICMUTE_FRQ_AEC_L
 908    0x7999    //TX_MICMUTE_EAD_THR
 909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
@@ -83711,35 +89877,61 @@
 930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
 931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
 932    0x0258    //TX_MICMUTE_DT_CUT_K1
-933    0x0800    //TX_MICMUTE_N2_SN_EST
-934    0xFC00    //TX_MICMUTE_THR_SN_EST_0
-935    0x001C    //TX_MICMUTE_MIN_G_CTRL_0
-936    0x6000    //TX_MICMUTE_A_POST_FILT_S_0
-937    0x7000    //TX_MICMUTE_B_POST_FILT_0
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
 938    0x2710    //TX_MIC1RUB_AMP_THR
 939    0x0010    //TX_MIC1MUTE_RATIO_THR
 940    0x0450    //TX_MIC1MUTE_AMP_THR
 941    0x0008    //TX_MIC1MUTE_CVG_TIME
 942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
-943    0x0000    //TX_AMS_RESRV_01
-944    0x0000    //TX_AMS_RESRV_02
-945    0x0000    //TX_AMS_RESRV_03
-946    0x0000    //TX_AMS_RESRV_04
-947    0x0000    //TX_AMS_RESRV_05
-948    0x0000    //TX_AMS_RESRV_06
-949    0x0000    //TX_AMS_RESRV_07
-950    0x0000    //TX_AMS_RESRV_08
-951    0x0000    //TX_AMS_RESRV_09
-952    0x0000    //TX_AMS_RESRV_10
-953    0x0000    //TX_AMS_RESRV_11
-954    0x0000    //TX_AMS_RESRV_12
-955    0x0000    //TX_AMS_RESRV_13
-956    0x0000    //TX_AMS_RESRV_14
-957    0x0000    //TX_AMS_RESRV_15
-958    0x0000    //TX_AMS_RESRV_16
-959    0x0000    //TX_AMS_RESRV_17
-960    0x0000    //TX_AMS_RESRV_18
-961    0x0000    //TX_AMS_RESRV_19
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
 #RX
 0    0x2040    //RX_RECVFUNC_MODE_0
 1    0x0000    //RX_RECVFUNC_MODE_1
@@ -83766,8 +89958,8 @@
 22    0x000F    //RX_NS_LVL_CTRL
 23    0xF800    //RX_THR_SN_EST
 24    0x7E00    //RX_LAMBDA_PFILT
-25    0x000A    //RX_FENS_RESRV_0
-26    0x0000    //RX_FENS_RESRV_1
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
 27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -84617,8 +90809,8 @@
 179    0x000F    //RX_NS_LVL_CTRL
 180    0xF800    //RX_THR_SN_EST
 181    0x7E00    //RX_LAMBDA_PFILT
-182    0x000A    //RX_FENS_RESRV_0
-183    0x0000    //RX_FENS_RESRV_1
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
 184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
 185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
 186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
@@ -85443,3 +91635,16173 @@
 286    0x0100    //RX_SPK_VOL
 287    0x0000    //RX_VOL_RESRV_0
 
+#CASE_NAME  HEADSET-TTY_FULL-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0001    //TX_OPERATION_MODE_0
+1    0x0000    //TX_OPERATION_MODE_1
+2    0x0000    //TX_PATCH_REG
+3    0x0200    //TX_SENDFUNC_MODE_0
+4    0x0000    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x0078    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0302    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0000    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0000    //TX_MICS_OF_PAIR0
+38    0x0000    //TX_MICS_OF_PAIR1
+39    0x0000    //TX_MICS_OF_PAIR2
+40    0x0000    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0003    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x0000    //TX_HD_BIN_MASK
+53    0x0000    //TX_HD_SUBAND_MASK
+54    0x0000    //TX_HD_FRAME_AVG_MASK
+55    0x0000    //TX_HD_MIN_FRQ
+56    0x0000    //TX_HD_ALPHA_PSD
+57    0x0000    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0x0000    //TX_T_PSDVAT
+63    0x0000    //TX_CNT
+64    0x0000    //TX_ANTI_HOWL_GAIN
+65    0x0000    //TX_MICFORBFMARK_0
+66    0x0000    //TX_MICFORBFMARK_1
+67    0x0000    //TX_MICFORBFMARK_2
+68    0x0000    //TX_MICFORBFMARK_3
+69    0x0000    //TX_MICFORBFMARK_4
+70    0x0000    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x0000    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0800    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x0000    //TX_ADCS_GAIN
+112    0x0000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x7FFF    //TX_BLMIC_BLKFACTOR
+116    0x7FFF    //TX_BRMIC_BLKFACTOR
+117    0x000A    //TX_MICBLK_START_BIN
+118    0x0041    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x0000    //TX_FE_ENER_TH_MTS
+124    0x0000    //TX_FE_ENER_TH_EXP
+125    0x0000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x0000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0020    //TX_MIC_BLOCK_N
+128    0x7652    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7800    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6000    //TX_THR_PITCH_DET_2
+133    0x0000    //TX_PITCH_BFR_LEN
+134    0x0000    //TX_SBD_PITCH_DET
+135    0x0000    //TX_TD_AEC_L
+136    0x0000    //TX_MU0_UNP_TD_AEC
+137    0x0000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x0028    //TX_TAIL_LENGTH
+147    0x2000    //TX_AEC_REF_GAIN_0
+148    0x2000    //TX_AEC_REF_GAIN_1
+149    0x2000    //TX_AEC_REF_GAIN_2
+150    0x4000    //TX_EAD_THR
+151    0x0200    //TX_THR_RE_EST
+152    0x0100    //TX_MIN_EQ_RE_EST_0
+153    0x0100    //TX_MIN_EQ_RE_EST_1
+154    0x0100    //TX_MIN_EQ_RE_EST_2
+155    0x0100    //TX_MIN_EQ_RE_EST_3
+156    0x0100    //TX_MIN_EQ_RE_EST_4
+157    0x0100    //TX_MIN_EQ_RE_EST_5
+158    0x0100    //TX_MIN_EQ_RE_EST_6
+159    0x0100    //TX_MIN_EQ_RE_EST_7
+160    0x0100    //TX_MIN_EQ_RE_EST_8
+161    0x0100    //TX_MIN_EQ_RE_EST_9
+162    0x0100    //TX_MIN_EQ_RE_EST_10
+163    0x0100    //TX_MIN_EQ_RE_EST_11
+164    0x0100    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x0000    //TX_LAMBDA_CB_NLE
+167    0x0000    //TX_C_POST_FLT
+168    0x4000    //TX_GAIN_NP
+169    0x0008    //TX_SE_HOLD_N
+170    0x0050    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x0000    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x0000    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0000    //TX_FRQ_LIN_LEN
+184    0x0000    //TX_FRQ_AEC_LEN_RHO
+185    0x0000    //TX_MU0_UNP_FRQ_AEC
+186    0x0000    //TX_MU0_PTD_FRQ_AEC
+187    0x0000    //TX_MINENOISETH
+188    0x0000    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x0000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7333    //TX_DTD_THR1_0
+198    0x7333    //TX_DTD_THR1_1
+199    0x7333    //TX_DTD_THR1_2
+200    0x7333    //TX_DTD_THR1_3
+201    0x7333    //TX_DTD_THR1_4
+202    0x7333    //TX_DTD_THR1_5
+203    0x7333    //TX_DTD_THR1_6
+204    0x0CCD    //TX_DTD_THR2_0
+205    0x0CCD    //TX_DTD_THR2_1
+206    0x0CCD    //TX_DTD_THR2_2
+207    0x0CCD    //TX_DTD_THR2_3
+208    0x0CCD    //TX_DTD_THR2_4
+209    0x0CCD    //TX_DTD_THR2_5
+210    0x0CCD    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0400    //TX_DT_CUT_K
+214    0x0000    //TX_DT_CUT_THR
+215    0x0000    //TX_COMFORT_G
+216    0x0000    //TX_POWER_YOUT_TH
+217    0x0000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x0800    //TX_B_POST_FILT_ECHO_H
+230    0x0000    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0000    //TX_EPD_OFFSET_00
+233    0x0000    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x0000    //TX_MIN_EQ_RE_EST_13
+237    0x0000    //TX_DTD_THR1_7
+238    0x0000    //TX_DTD_THR2_7
+239    0x0000    //TX_DT_RESRV_7
+240    0x0000    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF800    //TX_THR_SN_EST_2
+245    0xF600    //TX_THR_SN_EST_3
+246    0xF800    //TX_THR_SN_EST_4
+247    0xF800    //TX_THR_SN_EST_5
+248    0xF800    //TX_THR_SN_EST_6
+249    0xF800    //TX_THR_SN_EST_7
+250    0x0100    //TX_DELTA_THR_SN_EST_0
+251    0x0100    //TX_DELTA_THR_SN_EST_1
+252    0x0100    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0A00    //TX_N_SN_EST
+267    0x0000    //TX_INBEAM_T
+268    0x0000    //TX_INBEAMHOLDT
+269    0x1FFF    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x1000    //TX_NE_RTO_TH_L
+274    0x1000    //TX_MAINREFRTOH_TH_H
+275    0x1000    //TX_MAINREFRTOH_TH_L
+276    0x2000    //TX_MAINREFRTO_TH_H
+277    0x1400    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0000    //TX_B_POST_FLT_0
+280    0x0000    //TX_B_POST_FLT_1
+281    0x001A    //TX_NS_LVL_CTRL_0
+282    0x0014    //TX_NS_LVL_CTRL_1
+283    0x0014    //TX_NS_LVL_CTRL_2
+284    0x000C    //TX_NS_LVL_CTRL_3
+285    0x000C    //TX_NS_LVL_CTRL_4
+286    0x000C    //TX_NS_LVL_CTRL_5
+287    0x001A    //TX_NS_LVL_CTRL_6
+288    0x000C    //TX_NS_LVL_CTRL_7
+289    0x000E    //TX_MIN_GAIN_S_0
+290    0x0014    //TX_MIN_GAIN_S_1
+291    0x0014    //TX_MIN_GAIN_S_2
+292    0x0014    //TX_MIN_GAIN_S_3
+293    0x0014    //TX_MIN_GAIN_S_4
+294    0x0014    //TX_MIN_GAIN_S_5
+295    0x0014    //TX_MIN_GAIN_S_6
+296    0x0014    //TX_MIN_GAIN_S_7
+297    0x0000    //TX_NMOS_SUP
+298    0x0064    //TX_NS_MAX_PRI_SNR_TH
+299    0x7FFF    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x4000    //TX_SNRI_SUP_3
+304    0x4000    //TX_SNRI_SUP_4
+305    0x4000    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x4000    //TX_SNRI_SUP_7
+308    0x1200    //TX_THR_LFNS
+309    0x0147    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x7FFF    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x7FFF    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x1000    //TX_A_POST_FILT_S_2
+317    0x6666    //TX_A_POST_FILT_S_3
+318    0x6666    //TX_A_POST_FILT_S_4
+319    0x6666    //TX_A_POST_FILT_S_5
+320    0x199A    //TX_A_POST_FILT_S_6
+321    0x6666    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E00    //TX_LAMBDA_PFILT
+339    0x7E00    //TX_LAMBDA_PFILT_S_0
+340    0x7E00    //TX_LAMBDA_PFILT_S_1
+341    0x7E00    //TX_LAMBDA_PFILT_S_2
+342    0x7E00    //TX_LAMBDA_PFILT_S_3
+343    0x7E00    //TX_LAMBDA_PFILT_S_4
+344    0x7E00    //TX_LAMBDA_PFILT_S_5
+345    0x7E00    //TX_LAMBDA_PFILT_S_6
+346    0x7E00    //TX_LAMBDA_PFILT_S_7
+347    0x0010    //TX_K_PEPPER
+348    0x0400    //TX_A_PEPPER
+349    0x0000    //TX_K_PEPPER_HF
+350    0x0000    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0000    //TX_DT_BINVAD_TH_0
+354    0x0000    //TX_DT_BINVAD_TH_1
+355    0x0000    //TX_DT_BINVAD_TH_2
+356    0x0000    //TX_DT_BINVAD_TH_3
+357    0x0000    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0001    //TX_BF_SGRAD_FLG
+362    0x0000    //TX_BF_DVG_TH
+363    0x0000    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x05A0    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x1388    //TX_NOISE_TH_0_2
+369    0x3A98    //TX_NOISE_TH_0_3
+370    0x0C80    //TX_NOISE_TH_1
+371    0x0032    //TX_NOISE_TH_2
+372    0x3D54    //TX_NOISE_TH_3
+373    0x012C    //TX_NOISE_TH_4
+374    0x07D0    //TX_NOISE_TH_5
+375    0x6590    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x00C8    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x6400    //TX_OUT_ENER_S_TH_CLEAN
+385    0x6400    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x6400    //TX_OUT_ENER_S_TH_NOISY
+387    0x6400    //TX_OUT_ENER_TH_NOISE
+388    0x7D00    //TX_OUT_ENER_TH_SPEECH
+389    0x0000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0000    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0000    //TX_MIN_G_LOW300HZ
+401    0x0010    //TX_MAXLEVEL_CNG
+402    0x0000    //TX_STN_NOISE_TH
+403    0x0000    //TX_POST_MASK_SUP
+404    0x0000    //TX_POST_MASK_ADJUST
+405    0x0014    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x0226    //TX_MINENOISE_MIC0_S_TH
+408    0x2879    //TX_MIN_G_CTRL_SSNS
+409    0x0400    //TX_METAL_RTO_THR
+410    0x0080    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x2000    //TX_RHO_UPB
+415    0x0020    //TX_N_HOLD_HS
+416    0x0009    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0000    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x0219    //TX_THR_STD_PLH
+421    0x09C4    //TX_N_HOLD_STD
+422    0x0166    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0800    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x0000    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x1000    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0000    //TX_HS_VAD_BIN
+435    0x0000    //TX_THR_VAD_HS
+436    0x0000    //TX_MEAN_RTO_MIN_TH2
+437    0x0000    //TX_SILENCE_T
+438    0x4000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x099A    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x001E    //TX_DOA_VAD_THR_1
+445    0x001E    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x00B4    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x005A    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x00B4    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x005A    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x00B4    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x005A    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0172    //TX_BF_HOLDOFF_T
+473    0x8000    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x071C    //TX_DOA_TRACK_HT
+477    0x0280    //TX_N1_HOLD_HF
+478    0x0140    //TX_N2_HOLD_HF
+479    0x2AAB    //TX_BF_RESET_THR_HF
+480    0x4000    //TX_DOA_SMOOTH
+481    0x0000    //TX_MU_BF
+482    0x0200    //TX_BF_MU_LF_B2
+483    0x0000    //TX_BF_FC_END_BIN_B2
+484    0x0000    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0000    //TX_N_DOA_SEED
+488    0x0000    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x0000    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x0000    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x0000    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0168    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0004    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0230    //TX_NOR_OFF_TH1
+503    0xD333    //TX_WIDE_MASK_TH
+504    0x4650    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x000A    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x6666    //TX_MICTOBFGAIN0
+513    0x0014    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x0000    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0028    //TX_SNR_THR
+531    0x03E8    //TX_ENGY_THR
+532    0x0000    //TX_CORR_HIGH_TH
+533    0x0000    //TX_ENGY_THR_2
+534    0x0000    //TX_MEAN_RTO_THR
+535    0x0000    //TX_WNS_ENOISE_MIC0_TH
+536    0x0000    //TX_RATIOMICL_TH
+537    0x0000    //TX_CALIG_HS
+538    0x000A    //TX_LVL_CTRL
+539    0x0000    //TX_WIND_SUPRTO
+540    0x0000    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x0000    //TX_RATIOMICH_TH
+543    0x0000    //TX_WIND_INBEAM_L_TH
+544    0x0000    //TX_WIND_INBEAM_H_TH
+545    0x0000    //TX_WNS_REFGAIN
+546    0x0000    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0000    //TX_BVE_NOISE_FLOOR_1
+554    0x0000    //TX_BVE_NOISE_FLOOR_2
+555    0x0000    //TX_BVE_NOISE_FLOOR_3
+556    0x0000    //TX_BVE_NOISE_FLOOR_4
+557    0x0000    //TX_BVE_NOISE_FLOOR_5
+558    0x0000    //TX_BVE_NOISE_FLOOR_6
+559    0x0000    //TX_BVE_NOISE_FLOOR_7
+560    0x0000    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0000    //TX_FDEQ_BIN_0
+592    0x0000    //TX_FDEQ_BIN_1
+593    0x0000    //TX_FDEQ_BIN_2
+594    0x0000    //TX_FDEQ_BIN_3
+595    0x0000    //TX_FDEQ_BIN_4
+596    0x0000    //TX_FDEQ_BIN_5
+597    0x0000    //TX_FDEQ_BIN_6
+598    0x0000    //TX_FDEQ_BIN_7
+599    0x0000    //TX_FDEQ_BIN_8
+600    0x0000    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0000    //TX_PREEQ_BIN_MIC0_0
+642    0x0000    //TX_PREEQ_BIN_MIC0_1
+643    0x0000    //TX_PREEQ_BIN_MIC0_2
+644    0x0000    //TX_PREEQ_BIN_MIC0_3
+645    0x0000    //TX_PREEQ_BIN_MIC0_4
+646    0x0000    //TX_PREEQ_BIN_MIC0_5
+647    0x0000    //TX_PREEQ_BIN_MIC0_6
+648    0x0000    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0000    //TX_PREEQ_BIN_MIC1_0
+691    0x0000    //TX_PREEQ_BIN_MIC1_1
+692    0x0000    //TX_PREEQ_BIN_MIC1_2
+693    0x0000    //TX_PREEQ_BIN_MIC1_3
+694    0x0000    //TX_PREEQ_BIN_MIC1_4
+695    0x0000    //TX_PREEQ_BIN_MIC1_5
+696    0x0000    //TX_PREEQ_BIN_MIC1_6
+697    0x0000    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0000    //TX_PREEQ_BIN_MIC2_0
+740    0x0000    //TX_PREEQ_BIN_MIC2_1
+741    0x0000    //TX_PREEQ_BIN_MIC2_2
+742    0x0000    //TX_PREEQ_BIN_MIC2_3
+743    0x0000    //TX_PREEQ_BIN_MIC2_4
+744    0x0000    //TX_PREEQ_BIN_MIC2_5
+745    0x0000    //TX_PREEQ_BIN_MIC2_6
+746    0x0000    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0064    //TX_MIC_CALIBRATION_0
+766    0x006A    //TX_MIC_CALIBRATION_1
+767    0x006A    //TX_MIC_CALIBRATION_2
+768    0x006B    //TX_MIC_CALIBRATION_3
+769    0x0048    //TX_MIC_PWR_BIAS_0
+770    0x003C    //TX_MIC_PWR_BIAS_1
+771    0x003C    //TX_MIC_PWR_BIAS_2
+772    0x003C    //TX_MIC_PWR_BIAS_3
+773    0x0000    //TX_GAIN_LIMIT_0
+774    0x0009    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F3D    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7FB0    //TX_TDDRC_ALPHA_DWN_01
+788    0x7FB0    //TX_TDDRC_ALPHA_DWN_02
+789    0x7FB0    //TX_TDDRC_ALPHA_DWN_03
+790    0x7FB0    //TX_TDDRC_ALPHA_DWN_04
+791    0x65AD    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0002    //TX_DEADMIC_SILENCE_TH
+817    0x0147    //TX_MIC_DEGRADE_TH
+818    0x0078    //TX_DEADMIC_CNT
+819    0x0078    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x0000    //TX_NOISE_FLOOR_TH
+824    0x0000    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x0000    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x0000    //TX_A_POST_FLT_FP
+835    0x0000    //TX_RTO_OUTBEAM_TH
+836    0x0000    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0000    //TX_FFP_RESRV_2
+849    0x0000    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x0E80    //TX_TDDRC_THRD_2
+857    0x3800    //TX_TDDRC_THRD_3
+858    0x2A00    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7FB0    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x0000    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0000    //TX_TDDRC_SMT_W
+866    0x0100    //TX_TDDRC_DRC_GAIN
+867    0x0000    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x1EB8    //TX_TFMASKLTH
+870    0x170A    //TX_TFMASKLTHL
+871    0x7FFF    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x4000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x0000    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x0000    //TX_FASTNS_OUTIN_TH
+884    0x0000    //TX_FASTNS_TFMASK_TH
+885    0x0000    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0000    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0000    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x051F    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2040    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x050D    //RX_PGA
+11    0x7652    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0000    //RX_PITCH_BFR_LEN
+17    0x0000    //RX_SBD_PITCH_DET
+18    0x0000    //RX_PP_RESRV_0
+19    0x0000    //RX_PP_RESRV_1
+20    0xF800    //RX_N_SN_EST
+21    0x0000    //RX_N2_SN_EST
+22    0x000F    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7E00    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0000    //RX_FADE_IN_PERIOD
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+30    0x0000    //RX_EXTRA_NS_L
+31    0x0000    //RX_EXTRA_NS_A
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x0000    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0003    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x0080    //RX_MIN_G_FP
+128    0x2000    //RX_MAX_G_FP
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0010    //RX_MAXLEVEL_CNG
+132    0x0000    //RX_BWE_UV_TH
+133    0x0000    //RX_BWE_UV_TH2
+134    0x0000    //RX_BWE_UV_TH3
+135    0x0000    //RX_BWE_V_TH
+136    0x0000    //RX_BWE_GAIN1_V_TH1
+137    0x0000    //RX_BWE_GAIN1_V_TH2
+138    0x0000    //RX_BWE_UV_EQ
+139    0x0000    //RX_BWE_V_EQ
+140    0x0000    //RX_BWE_TONE_TH
+141    0x0000    //RX_BWE_UV_HOLD_T
+142    0x0000    //RX_BWE_GAIN2_ALPHA
+143    0x0000    //RX_BWE_GAIN3_ALPHA
+144    0x0000    //RX_BWE_CUTOFF
+145    0x0000    //RX_BWE_GAINFILL
+146    0x0000    //RX_BWE_MAXTH_TONE
+147    0x0000    //RX_BWE_EQ_0
+148    0x0000    //RX_BWE_EQ_1
+149    0x0000    //RX_BWE_EQ_2
+150    0x0000    //RX_BWE_EQ_3
+151    0x0000    //RX_BWE_EQ_4
+152    0x0000    //RX_BWE_EQ_5
+153    0x0000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+28    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+29    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+32    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+33    0xDA9E    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x0E80    //RX_TDDRC_THRD_2
+115    0x3800    //RX_TDDRC_THRD_3
+116    0x2A00    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x0000    //RX_TDDRC_HMNC_GAIN
+122    0x0000    //RX_TDDRC_SMT_FLAG
+123    0x0000    //RX_TDDRC_SMT_W
+124    0x0100    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0000    //RX_FDEQ_BIN_0
+64    0x0000    //RX_FDEQ_BIN_1
+65    0x0000    //RX_FDEQ_BIN_2
+66    0x0000    //RX_FDEQ_BIN_3
+67    0x0000    //RX_FDEQ_BIN_4
+68    0x0000    //RX_FDEQ_BIN_5
+69    0x0000    //RX_FDEQ_BIN_6
+70    0x0000    //RX_FDEQ_BIN_7
+71    0x0000    //RX_FDEQ_BIN_8
+72    0x0000    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x0000    //RX_FDEQ_RESRV_0
+88    0x0000    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0004    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x2000    //RX_FDDRC_SLANT_1_0
+107    0x2000    //RX_FDDRC_SLANT_1_1
+108    0x2000    //RX_FDDRC_SLANT_1_2
+109    0x2000    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x0040    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x050D    //RX_PGA
+168    0x7652    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0000    //RX_PITCH_BFR_LEN
+174    0x0000    //RX_SBD_PITCH_DET
+175    0x0000    //RX_PP_RESRV_0
+176    0x0000    //RX_PP_RESRV_1
+177    0xF800    //RX_N_SN_EST
+178    0x0000    //RX_N2_SN_EST
+179    0x000F    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7E00    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0000    //RX_FADE_IN_PERIOD
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+187    0x0000    //RX_EXTRA_NS_L
+188    0x0000    //RX_EXTRA_NS_A
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x0000    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0003    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x0080    //RX_MIN_G_FP
+285    0x2000    //RX_MAX_G_FP
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0010    //RX_MAXLEVEL_CNG
+289    0x0000    //RX_BWE_UV_TH
+290    0x0000    //RX_BWE_UV_TH2
+291    0x0000    //RX_BWE_UV_TH3
+292    0x0000    //RX_BWE_V_TH
+293    0x0000    //RX_BWE_GAIN1_V_TH1
+294    0x0000    //RX_BWE_GAIN1_V_TH2
+295    0x0000    //RX_BWE_UV_EQ
+296    0x0000    //RX_BWE_V_EQ
+297    0x0000    //RX_BWE_TONE_TH
+298    0x0000    //RX_BWE_UV_HOLD_T
+299    0x0000    //RX_BWE_GAIN2_ALPHA
+300    0x0000    //RX_BWE_GAIN3_ALPHA
+301    0x0000    //RX_BWE_CUTOFF
+302    0x0000    //RX_BWE_GAINFILL
+303    0x0000    //RX_BWE_MAXTH_TONE
+304    0x0000    //RX_BWE_EQ_0
+305    0x0000    //RX_BWE_EQ_1
+306    0x0000    //RX_BWE_EQ_2
+307    0x0000    //RX_BWE_EQ_3
+308    0x0000    //RX_BWE_EQ_4
+309    0x0000    //RX_BWE_EQ_5
+310    0x0000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7FB0    //RX_TDDRC_ALPHA_DWN_1
+185    0x7FB0    //RX_TDDRC_ALPHA_DWN_2
+186    0x7FB0    //RX_TDDRC_ALPHA_DWN_3
+189    0x7FB0    //RX_TDDRC_ALPHA_DWN_4
+190    0xDA9E    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x0E80    //RX_TDDRC_THRD_2
+272    0x3800    //RX_TDDRC_THRD_3
+273    0x2A00    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7FB0    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x0000    //RX_TDDRC_HMNC_GAIN
+279    0x0000    //RX_TDDRC_SMT_FLAG
+280    0x0000    //RX_TDDRC_SMT_W
+281    0x0100    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0000    //RX_FDEQ_BIN_0
+221    0x0000    //RX_FDEQ_BIN_1
+222    0x0000    //RX_FDEQ_BIN_2
+223    0x0000    //RX_FDEQ_BIN_3
+224    0x0000    //RX_FDEQ_BIN_4
+225    0x0000    //RX_FDEQ_BIN_5
+226    0x0000    //RX_FDEQ_BIN_6
+227    0x0000    //RX_FDEQ_BIN_7
+228    0x0000    //RX_FDEQ_BIN_8
+229    0x0000    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x0000    //RX_FDEQ_RESRV_0
+245    0x0000    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0004    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x2000    //RX_FDDRC_SLANT_1_0
+264    0x2000    //RX_FDDRC_SLANT_1_1
+265    0x2000    //RX_FDDRC_SLANT_1_2
+266    0x2000    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-NB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0000    //TX_SAMPLINGFREQ_SIG
+7    0x0000    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7646    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x7CCC    //TX_THR_PITCH_DET_0
+131    0x7000    //TX_THR_PITCH_DET_1
+132    0x6333    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0010    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x1000    //TX_THR_RE_EST
+152    0x1000    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x2000    //TX_C_POST_FLT
+168    0x2000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x0064    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x5000    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7F00    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x2000    //TX_DTD_THR2_0
+205    0x2000    //TX_DTD_THR2_1
+206    0x2000    //TX_DTD_THR2_2
+207    0x2000    //TX_DTD_THR2_3
+208    0x2000    //TX_DTD_THR2_4
+209    0x2000    //TX_DTD_THR2_5
+210    0x2000    //TX_DTD_THR2_6
+211    0x4100    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x1000    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x1000    //TX_B_LESSCUT_RTO_ECHO
+232    0x0010    //TX_EPD_OFFSET_00
+233    0x0010    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xFA00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xFA00    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xFA00    //TX_THR_SN_EST_5
+248    0xFA00    //TX_THR_SN_EST_6
+249    0xFA00    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0000    //TX_DELTA_THR_SN_EST_1
+252    0x0000    //TX_DELTA_THR_SN_EST_2
+253    0x0000    //TX_DELTA_THR_SN_EST_3
+254    0x0000    //TX_DELTA_THR_SN_EST_4
+255    0x0000    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0000    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x0400    //TX_B_POST_FLT_0
+280    0x0400    //TX_B_POST_FLT_1
+281    0x0010    //TX_NS_LVL_CTRL_0
+282    0x0010    //TX_NS_LVL_CTRL_1
+283    0x0010    //TX_NS_LVL_CTRL_2
+284    0x0010    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0010    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000D    //TX_MIN_GAIN_S_0
+290    0x000D    //TX_MIN_GAIN_S_1
+291    0x000D    //TX_MIN_GAIN_S_2
+292    0x000D    //TX_MIN_GAIN_S_3
+293    0x000D    //TX_MIN_GAIN_S_4
+294    0x000D    //TX_MIN_GAIN_S_5
+295    0x000D    //TX_MIN_GAIN_S_6
+296    0x000D    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0014    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x1000    //TX_A_POST_FILT_S_1
+316    0x4000    //TX_A_POST_FILT_S_2
+317    0x4000    //TX_A_POST_FILT_S_3
+318    0x4000    //TX_A_POST_FILT_S_4
+319    0x4000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x4000    //TX_A_POST_FILT_S_7
+322    0x0400    //TX_B_POST_FILT_0
+323    0x2000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x0400    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7E14    //TX_LAMBDA_PFILT
+339    0x7C29    //TX_LAMBDA_PFILT_S_0
+340    0x7C29    //TX_LAMBDA_PFILT_S_1
+341    0x7C29    //TX_LAMBDA_PFILT_S_2
+342    0x7C29    //TX_LAMBDA_PFILT_S_3
+343    0x7C29    //TX_LAMBDA_PFILT_S_4
+344    0x7C29    //TX_LAMBDA_PFILT_S_5
+345    0x7C29    //TX_LAMBDA_PFILT_S_6
+346    0x7C29    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x0FA0    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x4000    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x003B    //TX_NOISE_TH_0
+368    0x1B58    //TX_NOISE_TH_0_2
+369    0x2134    //TX_NOISE_TH_0_3
+370    0x02BC    //TX_NOISE_TH_1
+371    0x1F40    //TX_NOISE_TH_2
+372    0x4650    //TX_NOISE_TH_3
+373    0x7148    //TX_NOISE_TH_4
+374    0x044C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x0000    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x0032    //TX_NOISE_TH_6
+379    0x00C8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x00A5    //TX_OUT_ENER_S_TH_CLEAN
+385    0x00A5    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x00A5    //TX_OUT_ENER_S_TH_NOISY
+387    0x0029    //TX_OUT_ENER_TH_NOISE
+388    0x00CE    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x0032    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0280    //TX_N_HOLD_HS
+416    0x006E    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0333    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2400    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0640    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x2000    //TX_WTA_EN_RTO_TH
+429    0x1400    //TX_TOP_ENER_TH_F
+430    0x0064    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x003C    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x0D9A    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x2A3D    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x0000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0014    //TX_FDEQ_SUBNUM
+567    0x6048    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4844    //TX_FDEQ_GAIN_6
+574    0x4041    //TX_FDEQ_GAIN_7
+575    0x3B34    //TX_FDEQ_GAIN_8
+576    0x343A    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0401    //TX_FDEQ_BIN_0
+592    0x0103    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x0000    //TX_FDEQ_BIN_10
+602    0x0000    //TX_FDEQ_BIN_11
+603    0x0000    //TX_FDEQ_BIN_12
+604    0x0000    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0010    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0802    //TX_PREEQ_BIN_MIC0_7
+649    0x0000    //TX_PREEQ_BIN_MIC0_8
+650    0x0000    //TX_PREEQ_BIN_MIC0_9
+651    0x0000    //TX_PREEQ_BIN_MIC0_10
+652    0x0000    //TX_PREEQ_BIN_MIC0_11
+653    0x0000    //TX_PREEQ_BIN_MIC0_12
+654    0x0000    //TX_PREEQ_BIN_MIC0_13
+655    0x0000    //TX_PREEQ_BIN_MIC0_14
+656    0x0000    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0010    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0802    //TX_PREEQ_BIN_MIC1_7
+698    0x0000    //TX_PREEQ_BIN_MIC1_8
+699    0x0000    //TX_PREEQ_BIN_MIC1_9
+700    0x0000    //TX_PREEQ_BIN_MIC1_10
+701    0x0000    //TX_PREEQ_BIN_MIC1_11
+702    0x0000    //TX_PREEQ_BIN_MIC1_12
+703    0x0000    //TX_PREEQ_BIN_MIC1_13
+704    0x0000    //TX_PREEQ_BIN_MIC1_14
+705    0x0000    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0010    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0802    //TX_PREEQ_BIN_MIC2_7
+747    0x0000    //TX_PREEQ_BIN_MIC2_8
+748    0x0000    //TX_PREEQ_BIN_MIC2_9
+749    0x0000    //TX_PREEQ_BIN_MIC2_10
+750    0x0000    //TX_PREEQ_BIN_MIC2_11
+751    0x0000    //TX_PREEQ_BIN_MIC2_12
+752    0x0000    //TX_PREEQ_BIN_MIC2_13
+753    0x0000    //TX_PREEQ_BIN_MIC2_14
+754    0x0000    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0065    //TX_MIC_CALIBRATION_0
+766    0x0065    //TX_MIC_CALIBRATION_1
+767    0x0065    //TX_MIC_CALIBRATION_2
+768    0x0065    //TX_MIC_CALIBRATION_3
+769    0x0044    //TX_MIC_PWR_BIAS_0
+770    0x0044    //TX_MIC_PWR_BIAS_1
+771    0x0044    //TX_MIC_PWR_BIAS_2
+772    0x0044    //TX_MIC_PWR_BIAS_3
+773    0x000B    //TX_GAIN_LIMIT_0
+774    0x000B    //TX_GAIN_LIMIT_1
+775    0x000B    //TX_GAIN_LIMIT_2
+776    0x000B    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x04BB    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0xF800    //TX_TFMASKLTH_DOA
+875    0x0CCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA02C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0000    //RX_SAMPLINGFREQ_SIG
+3    0x0000    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0200    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02A9    //RX_TDDRC_DRC_GAIN
+38    0x0014    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4844    //RX_FDEQ_GAIN_6
+46    0x4343    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4444    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D08    //RX_FDEQ_BIN_9
+73    0x0000    //RX_FDEQ_BIN_10
+74    0x0000    //RX_FDEQ_BIN_11
+75    0x0000    //RX_FDEQ_BIN_12
+76    0x0000    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA02C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0000    //RX_SAMPLINGFREQ_SIG
+160    0x0000    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0200    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02A9    //RX_TDDRC_DRC_GAIN
+195    0x0014    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4844    //RX_FDEQ_GAIN_6
+203    0x4343    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4444    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D08    //RX_FDEQ_BIN_9
+230    0x0000    //RX_FDEQ_BIN_10
+231    0x0000    //RX_FDEQ_BIN_11
+232    0x0000    //RX_FDEQ_BIN_12
+233    0x0000    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-WB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0008    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B68    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0001    //TX_SAMPLINGFREQ_SIG
+7    0x0001    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7D83    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x0019    //TX_EPD_OFFSET_00
+233    0x0019    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000F    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x4000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0102    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x00F8    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x00DC    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x7FFF    //TX_MIN_G_CTRL_SSNS
+409    0x0000    //TX_METAL_RTO_THR
+410    0x0000    //TX_NS_FP_K_METAL
+411    0x7FFF    //TX_NOISEDET_BOOST_TH
+412    0x0000    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x0230    //TX_NOR_OFF_THR
+498    0x0CCD    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x001C    //TX_FDEQ_SUBNUM
+567    0x6056    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4440    //TX_FDEQ_GAIN_8
+576    0x3C3C    //TX_FDEQ_GAIN_9
+577    0x3A38    //TX_FDEQ_GAIN_10
+578    0x3737    //TX_FDEQ_GAIN_11
+579    0x3030    //TX_FDEQ_GAIN_12
+580    0x3333    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0302    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D07    //TX_FDEQ_BIN_9
+601    0x0E0F    //TX_FDEQ_BIN_10
+602    0x0F10    //TX_FDEQ_BIN_11
+603    0x1011    //TX_FDEQ_BIN_12
+604    0x1119    //TX_FDEQ_BIN_13
+605    0x0000    //TX_FDEQ_BIN_14
+606    0x0000    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0608    //TX_PREEQ_BIN_MIC0_0
+642    0x0808    //TX_PREEQ_BIN_MIC0_1
+643    0x0808    //TX_PREEQ_BIN_MIC0_2
+644    0x0808    //TX_PREEQ_BIN_MIC0_3
+645    0x0808    //TX_PREEQ_BIN_MIC0_4
+646    0x0808    //TX_PREEQ_BIN_MIC0_5
+647    0x0808    //TX_PREEQ_BIN_MIC0_6
+648    0x0808    //TX_PREEQ_BIN_MIC0_7
+649    0x0808    //TX_PREEQ_BIN_MIC0_8
+650    0x0808    //TX_PREEQ_BIN_MIC0_9
+651    0x0808    //TX_PREEQ_BIN_MIC0_10
+652    0x0808    //TX_PREEQ_BIN_MIC0_11
+653    0x0808    //TX_PREEQ_BIN_MIC0_12
+654    0x0808    //TX_PREEQ_BIN_MIC0_13
+655    0x0808    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0608    //TX_PREEQ_BIN_MIC1_0
+691    0x0808    //TX_PREEQ_BIN_MIC1_1
+692    0x0808    //TX_PREEQ_BIN_MIC1_2
+693    0x0808    //TX_PREEQ_BIN_MIC1_3
+694    0x0808    //TX_PREEQ_BIN_MIC1_4
+695    0x0808    //TX_PREEQ_BIN_MIC1_5
+696    0x0808    //TX_PREEQ_BIN_MIC1_6
+697    0x0808    //TX_PREEQ_BIN_MIC1_7
+698    0x0808    //TX_PREEQ_BIN_MIC1_8
+699    0x0808    //TX_PREEQ_BIN_MIC1_9
+700    0x0808    //TX_PREEQ_BIN_MIC1_10
+701    0x0808    //TX_PREEQ_BIN_MIC1_11
+702    0x0808    //TX_PREEQ_BIN_MIC1_12
+703    0x0808    //TX_PREEQ_BIN_MIC1_13
+704    0x0808    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0608    //TX_PREEQ_BIN_MIC2_0
+740    0x0808    //TX_PREEQ_BIN_MIC2_1
+741    0x0808    //TX_PREEQ_BIN_MIC2_2
+742    0x0808    //TX_PREEQ_BIN_MIC2_3
+743    0x0808    //TX_PREEQ_BIN_MIC2_4
+744    0x0808    //TX_PREEQ_BIN_MIC2_5
+745    0x0808    //TX_PREEQ_BIN_MIC2_6
+746    0x0808    //TX_PREEQ_BIN_MIC2_7
+747    0x0808    //TX_PREEQ_BIN_MIC2_8
+748    0x0808    //TX_PREEQ_BIN_MIC2_9
+749    0x0808    //TX_PREEQ_BIN_MIC2_10
+750    0x0808    //TX_PREEQ_BIN_MIC2_11
+751    0x0808    //TX_PREEQ_BIN_MIC2_12
+752    0x0808    //TX_PREEQ_BIN_MIC2_13
+753    0x0808    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x1000    //TX_TDDRC_ALPHA_UP_01
+784    0x1000    //TX_TDDRC_ALPHA_UP_02
+785    0x1000    //TX_TDDRC_ALPHA_UP_03
+786    0x1000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x0000    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0001    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x1000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0443    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x00C8    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA02C    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0001    //RX_SAMPLINGFREQ_SIG
+3    0x0001    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x3800    //RX_THR_PITCH_DET_0
+14    0x3000    //RX_THR_PITCH_DET_1
+15    0x2800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0600    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF800    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0196    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x3000    //RX_TDDRC_ALPHA_UP_1
+7    0x3000    //RX_TDDRC_ALPHA_UP_2
+8    0x3000    //RX_TDDRC_ALPHA_UP_3
+9    0x3000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x2000    //RX_TDDRC_THRD_2
+115    0x3000    //RX_TDDRC_THRD_3
+116    0x0800    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x3000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x02D2    //RX_TDDRC_DRC_GAIN
+38    0x001C    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x0E0F    //RX_FDEQ_BIN_10
+74    0x0F10    //RX_FDEQ_BIN_11
+75    0x1011    //RX_FDEQ_BIN_12
+76    0x1104    //RX_FDEQ_BIN_13
+77    0x0000    //RX_FDEQ_BIN_14
+78    0x0000    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA02C    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0001    //RX_SAMPLINGFREQ_SIG
+160    0x0001    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x3800    //RX_THR_PITCH_DET_0
+171    0x3000    //RX_THR_PITCH_DET_1
+172    0x2800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0600    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF800    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0196    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x3000    //RX_TDDRC_ALPHA_UP_1
+164    0x3000    //RX_TDDRC_ALPHA_UP_2
+165    0x3000    //RX_TDDRC_ALPHA_UP_3
+166    0x3000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x2000    //RX_TDDRC_THRD_2
+272    0x3000    //RX_TDDRC_THRD_3
+273    0x0800    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x3000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x02D2    //RX_TDDRC_DRC_GAIN
+195    0x001C    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x0E0F    //RX_FDEQ_BIN_10
+231    0x0F10    //RX_FDEQ_BIN_11
+232    0x1011    //RX_FDEQ_BIN_12
+233    0x1104    //RX_FDEQ_BIN_13
+234    0x0000    //RX_FDEQ_BIN_14
+235    0x0000    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0503    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0xA024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0xA024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-VOICE_GENERIC-FB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0009    //TX_OPERATION_MODE_1
+2    0x0020    //TX_PATCH_REG
+3    0x6B2A    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0004    //TX_SAMPLINGFREQ_SIG
+7    0x0004    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B4C    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0000    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7E56    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x6800    //TX_THR_PITCH_DET_0
+131    0x6000    //TX_THR_PITCH_DET_1
+132    0x5800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0200    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x61A8    //TX_EAD_THR
+151    0x0400    //TX_THR_RE_EST
+152    0x3000    //TX_MIN_EQ_RE_EST_0
+153    0x3000    //TX_MIN_EQ_RE_EST_1
+154    0x4000    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x6000    //TX_MIN_EQ_RE_EST_6
+159    0x6000    //TX_MIN_EQ_RE_EST_7
+160    0x6000    //TX_MIN_EQ_RE_EST_8
+161    0x6000    //TX_MIN_EQ_RE_EST_9
+162    0x4000    //TX_MIN_EQ_RE_EST_10
+163    0x4000    //TX_MIN_EQ_RE_EST_11
+164    0x4000    //TX_MIN_EQ_RE_EST_12
+165    0x3000    //TX_LAMBDA_RE_EST
+166    0x4000    //TX_LAMBDA_CB_NLE
+167    0x3000    //TX_C_POST_FLT
+168    0x7FFF    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x0800    //TX_DTD_THR1_0
+198    0x0800    //TX_DTD_THR1_1
+199    0x0800    //TX_DTD_THR1_2
+200    0x0800    //TX_DTD_THR1_3
+201    0x0800    //TX_DTD_THR1_4
+202    0x0800    //TX_DTD_THR1_5
+203    0x0800    //TX_DTD_THR1_6
+204    0x0800    //TX_DTD_THR2_0
+205    0x0800    //TX_DTD_THR2_1
+206    0x0800    //TX_DTD_THR2_2
+207    0x0800    //TX_DTD_THR2_3
+208    0x0800    //TX_DTD_THR2_4
+209    0x0100    //TX_DTD_THR2_5
+210    0x0100    //TX_DTD_THR2_6
+211    0x7FFF    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x03E8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00C0    //TX_EPD_OFFSET_00
+233    0x00C0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xF700    //TX_THR_SN_EST_0
+243    0xFB00    //TX_THR_SN_EST_1
+244    0xFA00    //TX_THR_SN_EST_2
+245    0xF700    //TX_THR_SN_EST_3
+246    0xFA00    //TX_THR_SN_EST_4
+247    0xF600    //TX_THR_SN_EST_5
+248    0xF600    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0200    //TX_DELTA_THR_SN_EST_0
+251    0x0400    //TX_DELTA_THR_SN_EST_1
+252    0x0300    //TX_DELTA_THR_SN_EST_2
+253    0x0600    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0200    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x4000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x4000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x2000    //TX_B_POST_FLT_0
+280    0x2000    //TX_B_POST_FLT_1
+281    0x0012    //TX_NS_LVL_CTRL_0
+282    0x0016    //TX_NS_LVL_CTRL_1
+283    0x0016    //TX_NS_LVL_CTRL_2
+284    0x0019    //TX_NS_LVL_CTRL_3
+285    0x0010    //TX_NS_LVL_CTRL_4
+286    0x0010    //TX_NS_LVL_CTRL_5
+287    0x0019    //TX_NS_LVL_CTRL_6
+288    0x0010    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000C    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000F    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x0011    //TX_MIN_GAIN_S_6
+296    0x000C    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7000    //TX_SNRI_SUP_0
+301    0x7000    //TX_SNRI_SUP_1
+302    0x7000    //TX_SNRI_SUP_2
+303    0x6000    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x6000    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x0016    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x6000    //TX_A_POST_FILT_S_0
+315    0x6000    //TX_A_POST_FILT_S_1
+316    0x6000    //TX_A_POST_FILT_S_2
+317    0x6000    //TX_A_POST_FILT_S_3
+318    0x6000    //TX_A_POST_FILT_S_4
+319    0x6000    //TX_A_POST_FILT_S_5
+320    0x6000    //TX_A_POST_FILT_S_6
+321    0x6000    //TX_A_POST_FILT_S_7
+322    0x2000    //TX_B_POST_FILT_0
+323    0x4000    //TX_B_POST_FILT_1
+324    0x2000    //TX_B_POST_FILT_2
+325    0x2000    //TX_B_POST_FILT_3
+326    0x2000    //TX_B_POST_FILT_4
+327    0x2000    //TX_B_POST_FILT_5
+328    0x2000    //TX_B_POST_FILT_6
+329    0x2000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7CCD    //TX_LAMBDA_PFILT
+339    0x7CCD    //TX_LAMBDA_PFILT_S_0
+340    0x7CCD    //TX_LAMBDA_PFILT_S_1
+341    0x7CCD    //TX_LAMBDA_PFILT_S_2
+342    0x7CCD    //TX_LAMBDA_PFILT_S_3
+343    0x7CCD    //TX_LAMBDA_PFILT_S_4
+344    0x7CCD    //TX_LAMBDA_PFILT_S_5
+345    0x7CCD    //TX_LAMBDA_PFILT_S_6
+346    0x7CCD    //TX_LAMBDA_PFILT_S_7
+347    0x0200    //TX_K_PEPPER
+348    0x0500    //TX_A_PEPPER
+349    0x1600    //TX_K_PEPPER_HF
+350    0x0400    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x04E8    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x02A6    //TX_NOISE_TH_1
+371    0x04B0    //TX_NOISE_TH_2
+372    0x3194    //TX_NOISE_TH_3
+373    0x0960    //TX_NOISE_TH_4
+374    0x5555    //TX_NOISE_TH_5
+375    0x3FF4    //TX_NOISE_TH_5_2
+376    0x0001    //TX_NOISE_TH_5_3
+377    0x0000    //TX_NOISE_TH_5_4
+378    0x02BC    //TX_NOISE_TH_6
+379    0x02BC    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x1482    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0004    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x04E7    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0304    //TX_FDEQ_BIN_2
+594    0x0405    //TX_FDEQ_BIN_3
+595    0x0607    //TX_FDEQ_BIN_4
+596    0x0809    //TX_FDEQ_BIN_5
+597    0x0A0B    //TX_FDEQ_BIN_6
+598    0x0C0D    //TX_FDEQ_BIN_7
+599    0x0E0F    //TX_FDEQ_BIN_8
+600    0x1011    //TX_FDEQ_BIN_9
+601    0x1214    //TX_FDEQ_BIN_10
+602    0x1618    //TX_FDEQ_BIN_11
+603    0x1C1C    //TX_FDEQ_BIN_12
+604    0x2020    //TX_FDEQ_BIN_13
+605    0x2020    //TX_FDEQ_BIN_14
+606    0x2011    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4848    //TX_PREEQ_GAIN_MIC0_8
+626    0x4848    //TX_PREEQ_GAIN_MIC0_9
+627    0x4848    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x2000    //TX_NND_WEIGHT
+765    0x0060    //TX_MIC_CALIBRATION_0
+766    0x0060    //TX_MIC_CALIBRATION_1
+767    0x0070    //TX_MIC_CALIBRATION_2
+768    0x0070    //TX_MIC_CALIBRATION_3
+769    0x0050    //TX_MIC_PWR_BIAS_0
+770    0x0040    //TX_MIC_PWR_BIAS_1
+771    0x0040    //TX_MIC_PWR_BIAS_2
+772    0x0040    //TX_MIC_PWR_BIAS_3
+773    0x0009    //TX_GAIN_LIMIT_0
+774    0x000F    //TX_GAIN_LIMIT_1
+775    0x000F    //TX_GAIN_LIMIT_2
+776    0x000F    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x0C00    //TX_TDDRC_ALPHA_UP_01
+784    0x0C00    //TX_TDDRC_ALPHA_UP_02
+785    0x0C00    //TX_TDDRC_ALPHA_UP_03
+786    0x0C00    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x7FFF    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0002    //TX_FILTINDX
+854    0x0001    //TX_TDDRC_THRD_0
+855    0x0001    //TX_TDDRC_THRD_1
+856    0x1900    //TX_TDDRC_THRD_2
+857    0x1900    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x7B00    //TX_TDDRC_SLANT_1
+860    0x0C00    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x07F2    //TX_TDDRC_DRC_GAIN
+867    0x7FFF    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0xC000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x7000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x2024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0004    //RX_SAMPLINGFREQ_SIG
+3    0x0004    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7B02    //RX_A_HP
+12    0x4000    //RX_B_PE
+13    0x7800    //RX_THR_PITCH_DET_0
+14    0x7000    //RX_THR_PITCH_DET_1
+15    0x6000    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0500    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0xF600    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x1000    //RX_TDDRC_ALPHA_UP_1
+7    0x1000    //RX_TDDRC_ALPHA_UP_2
+8    0x1000    //RX_TDDRC_ALPHA_UP_3
+9    0x1000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x7FFF    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1200    //RX_TDDRC_THRD_2
+115    0x1900    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x6E00    //RX_TDDRC_SLANT_1
+118    0x1000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x0240    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0304    //RX_FDEQ_BIN_2
+66    0x0405    //RX_FDEQ_BIN_3
+67    0x0607    //RX_FDEQ_BIN_4
+68    0x0809    //RX_FDEQ_BIN_5
+69    0x0A0B    //RX_FDEQ_BIN_6
+70    0x0C0D    //RX_FDEQ_BIN_7
+71    0x0E0F    //RX_FDEQ_BIN_8
+72    0x1011    //RX_FDEQ_BIN_9
+73    0x1214    //RX_FDEQ_BIN_10
+74    0x1618    //RX_FDEQ_BIN_11
+75    0x1C1C    //RX_FDEQ_BIN_12
+76    0x2020    //RX_FDEQ_BIN_13
+77    0x2020    //RX_FDEQ_BIN_14
+78    0x2011    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x2024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0004    //RX_SAMPLINGFREQ_SIG
+160    0x0004    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7B02    //RX_A_HP
+169    0x4000    //RX_B_PE
+170    0x7800    //RX_THR_PITCH_DET_0
+171    0x7000    //RX_THR_PITCH_DET_1
+172    0x6000    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0500    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0xF600    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x1000    //RX_TDDRC_ALPHA_UP_1
+164    0x1000    //RX_TDDRC_ALPHA_UP_2
+165    0x1000    //RX_TDDRC_ALPHA_UP_3
+166    0x1000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x7FFF    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1200    //RX_TDDRC_THRD_2
+272    0x1900    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x6E00    //RX_TDDRC_SLANT_1
+275    0x1000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x0240    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0304    //RX_FDEQ_BIN_2
+223    0x0405    //RX_FDEQ_BIN_3
+224    0x0607    //RX_FDEQ_BIN_4
+225    0x0809    //RX_FDEQ_BIN_5
+226    0x0A0B    //RX_FDEQ_BIN_6
+227    0x0C0D    //RX_FDEQ_BIN_7
+228    0x0E0F    //RX_FDEQ_BIN_8
+229    0x1011    //RX_FDEQ_BIN_9
+230    0x1214    //RX_FDEQ_BIN_10
+231    0x1618    //RX_FDEQ_BIN_11
+232    0x1C1C    //RX_FDEQ_BIN_12
+233    0x2020    //RX_FDEQ_BIN_13
+234    0x2020    //RX_FDEQ_BIN_14
+235    0x2011    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
+#CASE_NAME  HEADSET-RESERVE1-RESERVE2-SWB
+#PARAM_TYPE  TX+2RX
+#TOTAL_CUSTOM_STEP  7+7
+#TX
+0    0x0009    //TX_OPERATION_MODE_0
+1    0x0001    //TX_OPERATION_MODE_1
+2    0x0033    //TX_PATCH_REG
+3    0x2B28    //TX_SENDFUNC_MODE_0
+4    0x0001    //TX_SENDFUNC_MODE_1
+5    0x0001    //TX_NUM_MIC
+6    0x0003    //TX_SAMPLINGFREQ_SIG
+7    0x0003    //TX_SAMPLINGFREQ_PROC
+8    0x000A    //TX_FRAME_SZ_SIG
+9    0x000A    //TX_FRAME_SZ
+10    0x0000    //TX_DELAY_OPT
+11    0x0028    //TX_MAX_TAIL_LENGTH
+12    0x0001    //TX_NUM_LOUTCHN
+13    0x0001    //TX_MAXNUM_AECREF
+14    0x0000    //TX_DBG_FUNC_REG
+15    0x0000    //TX_DBG_FUNC_REG1
+16    0x0000    //TX_SYS_RESRV_0
+17    0x0000    //TX_SYS_RESRV_1
+18    0x0000    //TX_SYS_RESRV_2
+19    0x0000    //TX_SYS_RESRV_3
+20    0x0000    //TX_DIST2REF0
+21    0x009B    //TX_DIST2REF1
+22    0x0000    //TX_DIST2REF_02
+23    0x0000    //TX_DIST2REF_03
+24    0x0000    //TX_DIST2REF_04
+25    0x0000    //TX_DIST2REF_05
+26    0x0000    //TX_MMIC
+27    0x0B80    //TX_PGA_0
+28    0x0800    //TX_PGA_1
+29    0x0800    //TX_PGA_2
+30    0x0000    //TX_PRE_GAIN_0
+31    0x0000    //TX_PRE_GAIN_1
+32    0x0000    //TX_PRE_GAIN_2
+33    0x0000    //TX_MIC_PAIRS
+34    0x0000    //TX_MIC_PAIRS_HS
+35    0x0002    //TX_MICS_FOR_BF
+36    0x0000    //TX_MIC_PAIRS_FORL1
+37    0x0002    //TX_MICS_OF_PAIR0
+38    0x0002    //TX_MICS_OF_PAIR1
+39    0x0002    //TX_MICS_OF_PAIR2
+40    0x0002    //TX_MICS_OF_PAIR3
+41    0x0000    //TX_MIC_DATA_SRC0
+42    0x0001    //TX_MIC_DATA_SRC1
+43    0x0002    //TX_MIC_DATA_SRC2
+44    0x0000    //TX_MIC_DATA_SRC3
+45    0x0000    //TX_MIC_PAIR_CH_04
+46    0x0000    //TX_MIC_PAIR_CH_05
+47    0x0000    //TX_MIC_PAIR_CH_10
+48    0x0000    //TX_MIC_PAIR_CH_11
+49    0x0000    //TX_MIC_PAIR_CH_12
+50    0x0000    //TX_MIC_PAIR_CH_13
+51    0x0000    //TX_MIC_PAIR_CH_14
+52    0x05DC    //TX_HD_BIN_MASK
+53    0x0010    //TX_HD_SUBAND_MASK
+54    0x19A1    //TX_HD_FRAME_AVG_MASK
+55    0x0320    //TX_HD_MIN_FRQ
+56    0x1000    //TX_HD_ALPHA_PSD
+57    0x1100    //TX_T_PHPR1
+58    0x0000    //TX_T_PHPR2
+59    0x0000    //TX_T_PTPR
+60    0x0000    //TX_T_PNPR
+61    0x0000    //TX_T_PAPR1
+62    0xEE6C    //TX_T_PSDVAT
+63    0x0800    //TX_CNT
+64    0x4000    //TX_ANTI_HOWL_GAIN
+65    0x0001    //TX_MICFORBFMARK_0
+66    0x0001    //TX_MICFORBFMARK_1
+67    0x0001    //TX_MICFORBFMARK_2
+68    0x0001    //TX_MICFORBFMARK_3
+69    0x0001    //TX_MICFORBFMARK_4
+70    0x0001    //TX_MICFORBFMARK_5
+71    0x0000    //TX_DIST2REF_10
+72    0x3E00    //TX_DIST2REF_11
+73    0x0000    //TX_DIST2REF2
+74    0x0000    //TX_DIST2REF_13
+75    0x0000    //TX_DIST2REF_14
+76    0x0000    //TX_DIST2REF_15
+77    0x0000    //TX_DIST2REF_20
+78    0x0000    //TX_DIST2REF_21
+79    0x0000    //TX_DIST2REF_22
+80    0x0000    //TX_DIST2REF_23
+81    0x0000    //TX_DIST2REF_24
+82    0x0000    //TX_DIST2REF_25
+83    0x0000    //TX_DIST2REF_30
+84    0x0000    //TX_DIST2REF_31
+85    0x0000    //TX_DIST2REF_32
+86    0x0000    //TX_DIST2REF_33
+87    0x0000    //TX_DIST2REF_34
+88    0x0000    //TX_DIST2REF_35
+89    0x0000    //TX_MIC_LOC_00
+90    0x0000    //TX_MIC_LOC_01
+91    0x0000    //TX_MIC_LOC_02
+92    0x0000    //TX_MIC_LOC_03
+93    0x0000    //TX_MIC_LOC_04
+94    0x0000    //TX_MIC_LOC_05
+95    0x0000    //TX_MIC_LOC_10
+96    0x0000    //TX_MIC_LOC_11
+97    0x0000    //TX_MIC_LOC_12
+98    0x0000    //TX_MIC_LOC_13
+99    0x0000    //TX_MIC_LOC_14
+100    0x0000    //TX_MIC_LOC_15
+101    0x0000    //TX_MIC_LOC_20
+102    0x0000    //TX_MIC_LOC_21
+103    0x0000    //TX_MIC_LOC_22
+104    0x0000    //TX_MIC_LOC_23
+105    0x0000    //TX_MIC_LOC_24
+106    0x0000    //TX_MIC_LOC_25
+107    0x0200    //TX_MIC_REFBLK_VOLUME
+108    0x0800    //TX_MIC_BLOCK_VOLUME
+109    0x0000    //TX_INVERSE_MASK
+110    0x0000    //TX_ADCS_MASK
+111    0x04D0    //TX_ADCS_GAIN
+112    0x4000    //TX_NFC_GAINFAC
+113    0x0000    //TX_MAINMIC_BLKFACTOR
+114    0x0000    //TX_REFMIC_BLKFACTOR
+115    0x0000    //TX_BLMIC_BLKFACTOR
+116    0x0000    //TX_BRMIC_BLKFACTOR
+117    0x0031    //TX_MICBLK_START_BIN
+118    0x0060    //TX_MICBLK_END_BIN
+119    0x0015    //TX_MICBLK_FE_HOLD
+120    0xFFF2    //TX_MICBLK_MR_EXP_TH
+121    0xFFF2    //TX_MICBLK_LR_EXP_TH
+122    0x0015    //TX_FENE_HOLD
+123    0x4000    //TX_FE_ENER_TH_MTS
+124    0x0004    //TX_FE_ENER_TH_EXP
+125    0x6000    //TX_C_POST_FLT_MIC_MAINBLK
+126    0x6000    //TX_C_POST_FLT_MIC_REFBLK
+127    0x0010    //TX_MIC_BLOCK_N
+128    0x7EFF    //TX_A_HP
+129    0x4000    //TX_B_PE
+130    0x1800    //TX_THR_PITCH_DET_0
+131    0x1000    //TX_THR_PITCH_DET_1
+132    0x0800    //TX_THR_PITCH_DET_2
+133    0x0008    //TX_PITCH_BFR_LEN
+134    0x0003    //TX_SBD_PITCH_DET
+135    0x0050    //TX_TD_AEC_L
+136    0x4000    //TX_MU0_UNP_TD_AEC
+137    0x1000    //TX_MU0_PTD_TD_AEC
+138    0x0000    //TX_LT_ENB_FLAG
+139    0x2A94    //TX_LT_DOA_L_THRD
+140    0x55F0    //TX_LT_DOA_H_THRD
+141    0x0000    //TX_NEPLH_LOWFREQ_THR
+142    0x0000    //TX_NEPLH_HIGHFREQ_THR
+143    0x0000    //TX_PP_RESRV_5
+144    0x0000    //TX_PP_RESRV_6
+145    0x0000    //TX_PP_RESRV_7
+146    0x001E    //TX_TAIL_LENGTH
+147    0x0080    //TX_AEC_REF_GAIN_0
+148    0x0800    //TX_AEC_REF_GAIN_1
+149    0x0800    //TX_AEC_REF_GAIN_2
+150    0x7000    //TX_EAD_THR
+151    0x0800    //TX_THR_RE_EST
+152    0x0800    //TX_MIN_EQ_RE_EST_0
+153    0x0800    //TX_MIN_EQ_RE_EST_1
+154    0x0800    //TX_MIN_EQ_RE_EST_2
+155    0x0800    //TX_MIN_EQ_RE_EST_3
+156    0x0800    //TX_MIN_EQ_RE_EST_4
+157    0x0800    //TX_MIN_EQ_RE_EST_5
+158    0x0800    //TX_MIN_EQ_RE_EST_6
+159    0x0800    //TX_MIN_EQ_RE_EST_7
+160    0x0800    //TX_MIN_EQ_RE_EST_8
+161    0x0800    //TX_MIN_EQ_RE_EST_9
+162    0x0800    //TX_MIN_EQ_RE_EST_10
+163    0x0800    //TX_MIN_EQ_RE_EST_11
+164    0x0800    //TX_MIN_EQ_RE_EST_12
+165    0x4000    //TX_LAMBDA_RE_EST
+166    0x2000    //TX_LAMBDA_CB_NLE
+167    0x6000    //TX_C_POST_FLT
+168    0x7000    //TX_GAIN_NP
+169    0x00C8    //TX_SE_HOLD_N
+170    0x00C8    //TX_DT_HOLD_N
+171    0x03E8    //TX_DT2_HOLD_N
+172    0x6666    //TX_AEC_RESRV_0
+173    0x0000    //TX_AEC_RESRV_1
+174    0x0014    //TX_AEC_RESRV_2
+175    0x0000    //TX_MIC_DELAY_LENGTH
+176    0x0000    //TX_REF_DELAY_LENGTH
+177    0x0000    //TX_ADD_LINEIN_GAINL
+178    0x0000    //TX_ADD_LINEIN_GAINH
+179    0x0000    //TX_MIN_EQ_RE_EST_14
+180    0x0000    //TX_DTD_THR1_8
+181    0x7FFF    //TX_DTD_THR2_8
+182    0x0000    //TX_DTD_MIC_BLK2
+183    0x0008    //TX_FRQ_LIN_LEN
+184    0x7FFF    //TX_FRQ_AEC_LEN_RHO
+185    0x6000    //TX_MU0_UNP_FRQ_AEC
+186    0x4000    //TX_MU0_PTD_FRQ_AEC
+187    0x000A    //TX_MINENOISETH
+188    0x0800    //TX_MU0_RE_EST
+189    0x0001    //TX_AEC_NUM_CH
+190    0x0000    //TX_BIGECHOATTENUATION_MAX
+191    0x2000    //TX_A_POST_FLT_MICBLK
+192    0x0000    //TX_BLKENERTH
+193    0x0000    //TX_BLKENERHIGHTH
+194    0x0000    //TX_NORMENERTH
+195    0x0000    //TX_NORMENERHIGHTH
+196    0x0000    //TX_NORMENERHIGHTHL
+197    0x7800    //TX_DTD_THR1_0
+198    0x7000    //TX_DTD_THR1_1
+199    0x7FFF    //TX_DTD_THR1_2
+200    0x7FFF    //TX_DTD_THR1_3
+201    0x7FFF    //TX_DTD_THR1_4
+202    0x7FFF    //TX_DTD_THR1_5
+203    0x7FFF    //TX_DTD_THR1_6
+204    0x7FFF    //TX_DTD_THR2_0
+205    0x7FFF    //TX_DTD_THR2_1
+206    0x7FFF    //TX_DTD_THR2_2
+207    0x7FFF    //TX_DTD_THR2_3
+208    0x7FFF    //TX_DTD_THR2_4
+209    0x7FFF    //TX_DTD_THR2_5
+210    0x7FFF    //TX_DTD_THR2_6
+211    0x1000    //TX_DTD_THR3
+212    0x0000    //TX_SPK_CUT_K
+213    0x0BB8    //TX_DT_CUT_K
+214    0x0CCD    //TX_DT_CUT_THR
+215    0x04EB    //TX_COMFORT_G
+216    0x01F4    //TX_POWER_YOUT_TH
+217    0x4000    //TX_FDPFGAINECHO
+218    0x0000    //TX_DTD_HD_THR
+219    0x0000    //TX_SPK_CUT_K_S
+220    0x0000    //TX_DTD_MIC_BLK
+221    0x0400    //TX_ADPT_STRICT_L
+222    0x0200    //TX_ADPT_STRICT_H
+223    0x0BB8    //TX_RATIO_DT_L_TH_LOW
+224    0x3A98    //TX_RATIO_DT_H_TH_LOW
+225    0x1770    //TX_RATIO_DT_L_TH_HIGH
+226    0x4E20    //TX_RATIO_DT_H_TH_HIGH
+227    0x09C4    //TX_RATIO_DT_L0_TH
+228    0x0800    //TX_B_POST_FILT_ECHO_L
+229    0x7FFF    //TX_B_POST_FILT_ECHO_H
+230    0x0200    //TX_MIN_G_CTRL_ECHO
+231    0x7FFF    //TX_B_LESSCUT_RTO_ECHO
+232    0x00F0    //TX_EPD_OFFSET_00
+233    0x00F0    //TX_EPD_OFFST_01
+234    0x1388    //TX_RATIO_DT_L0_TH_HIGH
+235    0x3A98    //TX_RATIO_DT_H_TH_CUT
+236    0x7FFF    //TX_MIN_EQ_RE_EST_13
+237    0x7FFF    //TX_DTD_THR1_7
+238    0x7FFF    //TX_DTD_THR2_7
+239    0x0800    //TX_DT_RESRV_7
+240    0x0800    //TX_DT_RESRV_8
+241    0x0000    //TX_DT_RESRV_9
+242    0xFA00    //TX_THR_SN_EST_0
+243    0xF400    //TX_THR_SN_EST_1
+244    0xF600    //TX_THR_SN_EST_2
+245    0xF400    //TX_THR_SN_EST_3
+246    0xF400    //TX_THR_SN_EST_4
+247    0xF400    //TX_THR_SN_EST_5
+248    0xF400    //TX_THR_SN_EST_6
+249    0xF600    //TX_THR_SN_EST_7
+250    0x0000    //TX_DELTA_THR_SN_EST_0
+251    0x0200    //TX_DELTA_THR_SN_EST_1
+252    0x0200    //TX_DELTA_THR_SN_EST_2
+253    0x0200    //TX_DELTA_THR_SN_EST_3
+254    0x0200    //TX_DELTA_THR_SN_EST_4
+255    0x0200    //TX_DELTA_THR_SN_EST_5
+256    0x0000    //TX_DELTA_THR_SN_EST_6
+257    0x0200    //TX_DELTA_THR_SN_EST_7
+258    0x6000    //TX_LAMBDA_NN_EST_0
+259    0x4000    //TX_LAMBDA_NN_EST_1
+260    0x4000    //TX_LAMBDA_NN_EST_2
+261    0x4000    //TX_LAMBDA_NN_EST_3
+262    0x4000    //TX_LAMBDA_NN_EST_4
+263    0x4000    //TX_LAMBDA_NN_EST_5
+264    0x6000    //TX_LAMBDA_NN_EST_6
+265    0x4000    //TX_LAMBDA_NN_EST_7
+266    0x0400    //TX_N_SN_EST
+267    0x001E    //TX_INBEAM_T
+268    0x0041    //TX_INBEAMHOLDT
+269    0x2000    //TX_G_STRICT
+270    0x2000    //TX_EQ_THR_BF
+271    0x799A    //TX_LAMBDA_EQ_BF
+272    0x1000    //TX_NE_RTO_TH
+273    0x0400    //TX_NE_RTO_TH_L
+274    0x0800    //TX_MAINREFRTOH_TH_H
+275    0x0800    //TX_MAINREFRTOH_TH_L
+276    0x0800    //TX_MAINREFRTO_TH_H
+277    0x0800    //TX_MAINREFRTO_TH_L
+278    0x0200    //TX_MAINREFRTO_TH_EQ
+279    0x1000    //TX_B_POST_FLT_0
+280    0x1000    //TX_B_POST_FLT_1
+281    0x000B    //TX_NS_LVL_CTRL_0
+282    0x0011    //TX_NS_LVL_CTRL_1
+283    0x000F    //TX_NS_LVL_CTRL_2
+284    0x000F    //TX_NS_LVL_CTRL_3
+285    0x000F    //TX_NS_LVL_CTRL_4
+286    0x000F    //TX_NS_LVL_CTRL_5
+287    0x000F    //TX_NS_LVL_CTRL_6
+288    0x0011    //TX_NS_LVL_CTRL_7
+289    0x000C    //TX_MIN_GAIN_S_0
+290    0x000F    //TX_MIN_GAIN_S_1
+291    0x000C    //TX_MIN_GAIN_S_2
+292    0x000C    //TX_MIN_GAIN_S_3
+293    0x000C    //TX_MIN_GAIN_S_4
+294    0x000C    //TX_MIN_GAIN_S_5
+295    0x000C    //TX_MIN_GAIN_S_6
+296    0x000F    //TX_MIN_GAIN_S_7
+297    0x7FFF    //TX_NMOS_SUP
+298    0x0000    //TX_NS_MAX_PRI_SNR_TH
+299    0x0000    //TX_NMOS_SUP_MENSA
+300    0x7FFF    //TX_SNRI_SUP_0
+301    0x7FFF    //TX_SNRI_SUP_1
+302    0x7FFF    //TX_SNRI_SUP_2
+303    0x7FFF    //TX_SNRI_SUP_3
+304    0x7FFF    //TX_SNRI_SUP_4
+305    0x7FFF    //TX_SNRI_SUP_5
+306    0x7FFF    //TX_SNRI_SUP_6
+307    0x7FFF    //TX_SNRI_SUP_7
+308    0x7FFF    //TX_THR_LFNS
+309    0x000E    //TX_G_LFNS
+310    0x09C4    //TX_GAIN0_NTH
+311    0x000A    //TX_MUSIC_MORENS
+312    0x7FFF    //TX_A_POST_FILT_0
+313    0x2000    //TX_A_POST_FILT_1
+314    0x2000    //TX_A_POST_FILT_S_0
+315    0x5000    //TX_A_POST_FILT_S_1
+316    0x5000    //TX_A_POST_FILT_S_2
+317    0x5000    //TX_A_POST_FILT_S_3
+318    0x5000    //TX_A_POST_FILT_S_4
+319    0x5000    //TX_A_POST_FILT_S_5
+320    0x4000    //TX_A_POST_FILT_S_6
+321    0x5000    //TX_A_POST_FILT_S_7
+322    0x1000    //TX_B_POST_FILT_0
+323    0x1000    //TX_B_POST_FILT_1
+324    0x1000    //TX_B_POST_FILT_2
+325    0x1000    //TX_B_POST_FILT_3
+326    0x1000    //TX_B_POST_FILT_4
+327    0x1000    //TX_B_POST_FILT_5
+328    0x1000    //TX_B_POST_FILT_6
+329    0x1000    //TX_B_POST_FILT_7
+330    0x7FFF    //TX_B_LESSCUT_RTO_S_0
+331    0x7FFF    //TX_B_LESSCUT_RTO_S_1
+332    0x7FFF    //TX_B_LESSCUT_RTO_S_2
+333    0x7FFF    //TX_B_LESSCUT_RTO_S_3
+334    0x7FFF    //TX_B_LESSCUT_RTO_S_4
+335    0x7FFF    //TX_B_LESSCUT_RTO_S_5
+336    0x7FFF    //TX_B_LESSCUT_RTO_S_6
+337    0x7FFF    //TX_B_LESSCUT_RTO_S_7
+338    0x7900    //TX_LAMBDA_PFILT
+339    0x7B00    //TX_LAMBDA_PFILT_S_0
+340    0x7B00    //TX_LAMBDA_PFILT_S_1
+341    0x7B00    //TX_LAMBDA_PFILT_S_2
+342    0x7B00    //TX_LAMBDA_PFILT_S_3
+343    0x7B00    //TX_LAMBDA_PFILT_S_4
+344    0x7B00    //TX_LAMBDA_PFILT_S_5
+345    0x7B00    //TX_LAMBDA_PFILT_S_6
+346    0x7B00    //TX_LAMBDA_PFILT_S_7
+347    0x0000    //TX_K_PEPPER
+348    0x0800    //TX_A_PEPPER
+349    0x1EAA    //TX_K_PEPPER_HF
+350    0x0800    //TX_A_PEPPER_HF
+351    0x0001    //TX_HMNC_BST_FLG
+352    0x0200    //TX_HMNC_BST_THR
+353    0x0800    //TX_DT_BINVAD_TH_0
+354    0x0800    //TX_DT_BINVAD_TH_1
+355    0x0800    //TX_DT_BINVAD_TH_2
+356    0x0800    //TX_DT_BINVAD_TH_3
+357    0x1D4C    //TX_DT_BINVAD_ENDF
+358    0x0000    //TX_C_POST_FLT_DT
+359    0x0CCD    //TX_NS_B_POST_FLT_LESSCUT
+360    0x0100    //TX_DT_BOOST
+361    0x0000    //TX_BF_SGRAD_FLG
+362    0x0005    //TX_BF_DVG_TH
+363    0x001E    //TX_SN_C_F
+364    0x0000    //TX_K_APT
+365    0x0001    //TX_NOISEDET
+366    0x0190    //TX_NDETCT
+367    0x0383    //TX_NOISE_TH_0
+368    0x7FFF    //TX_NOISE_TH_0_2
+369    0x7FFF    //TX_NOISE_TH_0_3
+370    0x07D0    //TX_NOISE_TH_1
+371    0x00C8    //TX_NOISE_TH_2
+372    0x3A98    //TX_NOISE_TH_3
+373    0x0FA0    //TX_NOISE_TH_4
+374    0x157C    //TX_NOISE_TH_5
+375    0x7FFF    //TX_NOISE_TH_5_2
+376    0x7FFF    //TX_NOISE_TH_5_3
+377    0x7FFF    //TX_NOISE_TH_5_4
+378    0x044C    //TX_NOISE_TH_6
+379    0x044C    //TX_MINENOISE_TH
+380    0xD508    //TX_MORENS_TFMASK_TH
+381    0x0001    //TX_DRC_QUIET_FLOOR
+382    0x3A98    //TX_RATIODTL_CUT_TH
+383    0x0DAC    //TX_DT_CUT_K1
+384    0x0666    //TX_OUT_ENER_S_TH_CLEAN
+385    0x0666    //TX_OUT_ENER_S_TH_LESSCLEAN
+386    0x0333    //TX_OUT_ENER_S_TH_NOISY
+387    0x019A    //TX_OUT_ENER_TH_NOISE
+388    0x0333    //TX_OUT_ENER_TH_SPEECH
+389    0x2000    //TX_SN_NPB_GAIN
+390    0x0000    //TX_NN_NPB_GAIN
+391    0x7FFF    //TX_POST_MASK_SUP_HSNE
+392    0x1388    //TX_TAIL_DET_TH
+393    0x4000    //TX_B_LESSCUT_RTO_WTA
+394    0x0000    //TX_MEL_G_R
+395    0x0080    //TX_SUPHIGH_TH
+396    0x0000    //TX_MASK_G_R
+397    0x0002    //TX_LOGSNR_THR
+398    0x1800    //TX_C_POST_FLT_MASK
+399    0x7FFF    //TX_A_POST_FLT_WNS
+400    0x0148    //TX_MIN_G_LOW300HZ
+401    0x0002    //TX_MAXLEVEL_CNG
+402    0x00B4    //TX_STN_NOISE_TH
+403    0x4000    //TX_POST_MASK_SUP
+404    0x7FFF    //TX_POST_MASK_ADJUST
+405    0x00C8    //TX_NS_ENOISE_MIC0_TH
+406    0x02F3    //TX_MINENOISE_MIC0_TH
+407    0x012C    //TX_MINENOISE_MIC0_S_TH
+408    0x2900    //TX_MIN_G_CTRL_SSNS
+409    0x0800    //TX_METAL_RTO_THR
+410    0x4848    //TX_NS_FP_K_METAL
+411    0x3A98    //TX_NOISEDET_BOOST_TH
+412    0x0FA0    //TX_NSMOOTH_TH
+413    0x0000    //TX_NS_RESRV_8
+414    0x1800    //TX_RHO_UPB
+415    0x0BB8    //TX_N_HOLD_HS
+416    0x0050    //TX_N_RHO_BFR0
+417    0x7FFF    //TX_LAMBDA_ARSP_EST
+418    0x0100    //TX_EXTRA_GAIN_MICBLOCK
+419    0x0CCD    //TX_THR_STD_NSR
+420    0x019A    //TX_THR_STD_PLH
+421    0x2AF8    //TX_N_HOLD_STD
+422    0x0066    //TX_THR_STD_RHO
+423    0x2000    //TX_BF_RESET_THR_HS
+424    0x09C4    //TX_SB_RTO_MEAN_TH
+425    0x0000    //TX_SB_RHO_MEAN_TH_NTALK
+426    0x3800    //TX_SB_RTO_MEAN_TH_ABN
+427    0x2EE0    //TX_SB_RTO_MEAN_TH_RUB
+428    0x0000    //TX_WTA_EN_RTO_TH
+429    0x0000    //TX_TOP_ENER_TH_F
+430    0x0000    //TX_DESIRED_TALK_HOLDT
+431    0x0800    //TX_MIC_BLOCK_FACTOR
+432    0x0000    //TX_NSEST_BFRLRNRDC
+433    0x0000    //TX_THR_POST_FLT_HS
+434    0x0010    //TX_HS_VAD_BIN
+435    0x2666    //TX_THR_VAD_HS
+436    0x2CCD    //TX_MEAN_RTO_MIN_TH2
+437    0x0032    //TX_SILENCE_T
+438    0x0000    //TX_A_POST_FLT_WTA
+439    0x799A    //TX_LAMBDA_PFLT_WTA
+440    0x0000    //TX_SB_RHO_MEAN2_TH
+441    0x0190    //TX_SB_RHO_MEAN3_TH
+442    0x0000    //TX_HS_RESRV_4
+443    0x0000    //TX_HS_RESRV_5
+444    0x003C    //TX_DOA_VAD_THR_1
+445    0x0000    //TX_DOA_VAD_THR_2
+446    0x0028    //TX_DOA_VAD_THR1_0
+447    0x0028    //TX_DOA_VAD_THR1_1
+448    0x0000    //TX_SRC_DOA_RNG_LOW_0A
+449    0x00B4    //TX_SRC_DOA_RNG_HIGH_0A
+450    0x005A    //TX_DFLT_SRC_DOA_0A
+451    0x0000    //TX_SRC_DOA_RNG_LOW_0B
+452    0x0000    //TX_SRC_DOA_RNG_HIGH_0B
+453    0x0000    //TX_DFLT_SRC_DOA_0B
+454    0x0000    //TX_SRC_DOA_RNG_LOW_0C
+455    0x0000    //TX_SRC_DOA_RNG_HIGH_0C
+456    0x0000    //TX_DFLT_SRC_DOA_0C
+457    0x0000    //TX_SRC_DOA_RNG_LOW_0D
+458    0x0000    //TX_SRC_DOA_RNG_HIGH_0D
+459    0x0000    //TX_DFLT_SRC_DOA_0D
+460    0x0000    //TX_SRC_DOA_RNG_LOW_1A
+461    0x00B4    //TX_SRC_DOA_RNG_HIGH_1A
+462    0x005A    //TX_DFLT_SRC_DOA_1A
+463    0x0000    //TX_SRC_DOA_RNG_LOW_1B
+464    0x00B4    //TX_SRC_DOA_RNG_HIGH_1B
+465    0x005A    //TX_DFLT_SRC_DOA_1B
+466    0x0000    //TX_SRC_DOA_RNG_LOW_1C
+467    0x00B4    //TX_SRC_DOA_RNG_HIGH_1C
+468    0x005A    //TX_DFLT_SRC_DOA_1C
+469    0x0000    //TX_SRC_DOA_RNG_LOW_1D
+470    0x00B4    //TX_SRC_DOA_RNG_HIGH_1D
+471    0x005A    //TX_DFLT_SRC_DOA_1D
+472    0x0100    //TX_BF_HOLDOFF_T
+473    0x7FFF    //TX_DOA_COST_FACTOR
+474    0x4000    //TX_MAINTOREFR_TH0
+475    0x071C    //TX_DOA_TRK_THR
+476    0x012C    //TX_DOA_TRACK_HT
+477    0x0200    //TX_N1_HOLD_HF
+478    0x0100    //TX_N2_HOLD_HF
+479    0x3000    //TX_BF_RESET_THR_HF
+480    0x7333    //TX_DOA_SMOOTH
+481    0x0800    //TX_MU_BF
+482    0x0800    //TX_BF_MU_LF_B2
+483    0x0040    //TX_BF_FC_END_BIN_B2
+484    0x0020    //TX_BF_FC_END_BIN
+485    0x0000    //TX_HF_RESRV_25
+486    0x0000    //TX_HF_RESRV_26
+487    0x0007    //TX_N_DOA_SEED
+488    0x0001    //TX_FINE_DOA_SEARCH_FLG
+489    0x0000    //TX_HF_RESRV_27
+490    0x038E    //TX_DLT_SRC_DOA_RNG
+491    0x0200    //TX_BF_MU_LF
+492    0x0000    //TX_DFLT_SRC_LOC_0
+493    0x7FFF    //TX_DFLT_SRC_LOC_1
+494    0x0000    //TX_DFLT_SRC_LOC_2
+495    0x038E    //TX_DOA_TRACK_VADTH
+496    0x0000    //TX_DOA_TRACK_NEW
+497    0x01E0    //TX_NOR_OFF_THR
+498    0x7C00    //TX_MORE_ON_700HZ_THR
+499    0x2000    //TX_MU_BF_ADPT_NS
+500    0x0000    //TX_ADAPT_LEN
+501    0x6666    //TX_MORE_SNS
+502    0x0000    //TX_NOR_OFF_TH1
+503    0x0000    //TX_WIDE_MASK_TH
+504    0xD333    //TX_SUBSNRATIOHIGH4MEANBCK_THR
+505    0x6000    //TX_C_POST_FLT_CUT
+506    0x2000    //TX_RADIODTLV
+507    0x0320    //TX_POWER_LINEIN_TH
+508    0x0014    //TX_FE_VADCOUNT_TH_FC
+509    0x0000    //TX_ECHO_SUPP_FC
+510    0x0C80    //TX_ECHO_TH
+511    0x6666    //TX_MIC_TO_BFGAIN
+512    0x0000    //TX_MICTOBFGAIN0
+513    0x0000    //TX_FASTMUE_TH
+514    0xC000    //TX_DEREVERB_LF_MU
+515    0xC000    //TX_DEREVERB_HF_MU
+516    0xCCCC    //TX_DEREVERB_DELAY
+517    0xD999    //TX_DEREVERB_COEF_LEN
+518    0x1F40    //TX_DEREVERB_DNR
+519    0x0000    //TX_DEREVERB_ALPHA
+520    0x0000    //TX_DEREVERB_BETA
+521    0x0000    //TX_GSC_RTOL_TH
+522    0x7000    //TX_GSC_RTOH_TH
+523    0x0064    //TX_WIDE2_MEANHTH
+524    0x0000    //TX_KIDDET_NTH
+525    0x0000    //TX_B_POST_FLT_KID
+526    0x122E    //TX_T0_NE_TH
+527    0x1100    //TX_T0_NE_3_TH
+528    0x1333    //TX_WIND_MARK_TH
+529    0x399A    //TX_CORR_THR
+530    0x0004    //TX_SNR_THR
+531    0x0010    //TX_ENGY_THR
+532    0x1770    //TX_CORR_HIGH_TH
+533    0x6000    //TX_ENGY_THR_2
+534    0x3400    //TX_MEAN_RTO_THR
+535    0x0028    //TX_WNS_ENOISE_MIC0_TH
+536    0x3000    //TX_RATIOMICL_TH
+537    0x64CD    //TX_CALIG_HS
+538    0x0000    //TX_LVL_CTRL
+539    0x0014    //TX_WIND_SUPRTO
+540    0x000A    //TX_WNS_MIN_G
+541    0x0000    //TX_WNS_B_POST_FLT
+542    0x2800    //TX_RATIOMICH_TH
+543    0xD120    //TX_WIND_INBEAM_L_TH
+544    0x0FA0    //TX_WIND_INBEAM_H_TH
+545    0x2000    //TX_WNS_REFGAIN
+546    0x59D8    //TX_WNS_SAT_TH
+547    0x0000    //TX_ABSM_WNS_TH
+548    0x0000    //TX_WNS_RESRV_3
+549    0x0000    //TX_WNS_RESRV_4
+550    0x0000    //TX_WNS_RESRV_5
+551    0x0000    //TX_WNS_RESRV_6
+552    0x0000    //TX_BVE_NOISE_FLOOR_0
+553    0x0070    //TX_BVE_NOISE_FLOOR_1
+554    0x0070    //TX_BVE_NOISE_FLOOR_2
+555    0x0010    //TX_BVE_NOISE_FLOOR_3
+556    0x0070    //TX_BVE_NOISE_FLOOR_4
+557    0x00B0    //TX_BVE_NOISE_FLOOR_5
+558    0x0E66    //TX_BVE_NOISE_FLOOR_6
+559    0x0050    //TX_BVE_NOISE_FLOOR_7
+560    0x770A    //TX_BVE_NOISE_FLOOR_8
+561    0x0000    //TX_BVE_NOISE_FLOOR_9
+562    0x0000    //TX_BVE_IN_N
+563    0x0000    //TX_BVE_OUT_N
+564    0x0000    //TX_BVE_MICALPHA_DOWN
+565    0x0000    //TX_PB_RESRV_1
+566    0x0020    //TX_FDEQ_SUBNUM
+567    0x4848    //TX_FDEQ_GAIN_0
+568    0x4848    //TX_FDEQ_GAIN_1
+569    0x4848    //TX_FDEQ_GAIN_2
+570    0x4848    //TX_FDEQ_GAIN_3
+571    0x4848    //TX_FDEQ_GAIN_4
+572    0x4848    //TX_FDEQ_GAIN_5
+573    0x4848    //TX_FDEQ_GAIN_6
+574    0x4848    //TX_FDEQ_GAIN_7
+575    0x4848    //TX_FDEQ_GAIN_8
+576    0x4848    //TX_FDEQ_GAIN_9
+577    0x4848    //TX_FDEQ_GAIN_10
+578    0x4848    //TX_FDEQ_GAIN_11
+579    0x4848    //TX_FDEQ_GAIN_12
+580    0x4848    //TX_FDEQ_GAIN_13
+581    0x4848    //TX_FDEQ_GAIN_14
+582    0x4848    //TX_FDEQ_GAIN_15
+583    0x4848    //TX_FDEQ_GAIN_16
+584    0x4848    //TX_FDEQ_GAIN_17
+585    0x4848    //TX_FDEQ_GAIN_18
+586    0x4848    //TX_FDEQ_GAIN_19
+587    0x4848    //TX_FDEQ_GAIN_20
+588    0x4848    //TX_FDEQ_GAIN_21
+589    0x4848    //TX_FDEQ_GAIN_22
+590    0x4848    //TX_FDEQ_GAIN_23
+591    0x0202    //TX_FDEQ_BIN_0
+592    0x0203    //TX_FDEQ_BIN_1
+593    0x0303    //TX_FDEQ_BIN_2
+594    0x0304    //TX_FDEQ_BIN_3
+595    0x0405    //TX_FDEQ_BIN_4
+596    0x0506    //TX_FDEQ_BIN_5
+597    0x0708    //TX_FDEQ_BIN_6
+598    0x090A    //TX_FDEQ_BIN_7
+599    0x0B0C    //TX_FDEQ_BIN_8
+600    0x0D0E    //TX_FDEQ_BIN_9
+601    0x1013    //TX_FDEQ_BIN_10
+602    0x1719    //TX_FDEQ_BIN_11
+603    0x1B1E    //TX_FDEQ_BIN_12
+604    0x1E1E    //TX_FDEQ_BIN_13
+605    0x1E28    //TX_FDEQ_BIN_14
+606    0x282C    //TX_FDEQ_BIN_15
+607    0x0000    //TX_FDEQ_BIN_16
+608    0x0000    //TX_FDEQ_BIN_17
+609    0x0000    //TX_FDEQ_BIN_18
+610    0x0000    //TX_FDEQ_BIN_19
+611    0x0000    //TX_FDEQ_BIN_20
+612    0x0000    //TX_FDEQ_BIN_21
+613    0x0000    //TX_FDEQ_BIN_22
+614    0x0000    //TX_FDEQ_BIN_23
+615    0x0000    //TX_FDEQ_PADDING
+616    0x0020    //TX_PREEQ_SUBNUM_MIC0
+617    0x4848    //TX_PREEQ_GAIN_MIC0_0
+618    0x4848    //TX_PREEQ_GAIN_MIC0_1
+619    0x4848    //TX_PREEQ_GAIN_MIC0_2
+620    0x4848    //TX_PREEQ_GAIN_MIC0_3
+621    0x4848    //TX_PREEQ_GAIN_MIC0_4
+622    0x4848    //TX_PREEQ_GAIN_MIC0_5
+623    0x4848    //TX_PREEQ_GAIN_MIC0_6
+624    0x4848    //TX_PREEQ_GAIN_MIC0_7
+625    0x4868    //TX_PREEQ_GAIN_MIC0_8
+626    0x6860    //TX_PREEQ_GAIN_MIC0_9
+627    0x6048    //TX_PREEQ_GAIN_MIC0_10
+628    0x4848    //TX_PREEQ_GAIN_MIC0_11
+629    0x4848    //TX_PREEQ_GAIN_MIC0_12
+630    0x4848    //TX_PREEQ_GAIN_MIC0_13
+631    0x4848    //TX_PREEQ_GAIN_MIC0_14
+632    0x4848    //TX_PREEQ_GAIN_MIC0_15
+633    0x4848    //TX_PREEQ_GAIN_MIC0_16
+634    0x4848    //TX_PREEQ_GAIN_MIC0_17
+635    0x4848    //TX_PREEQ_GAIN_MIC0_18
+636    0x4848    //TX_PREEQ_GAIN_MIC0_19
+637    0x4848    //TX_PREEQ_GAIN_MIC0_20
+638    0x4848    //TX_PREEQ_GAIN_MIC0_21
+639    0x4848    //TX_PREEQ_GAIN_MIC0_22
+640    0x4848    //TX_PREEQ_GAIN_MIC0_23
+641    0x0E10    //TX_PREEQ_BIN_MIC0_0
+642    0x1010    //TX_PREEQ_BIN_MIC0_1
+643    0x1010    //TX_PREEQ_BIN_MIC0_2
+644    0x1010    //TX_PREEQ_BIN_MIC0_3
+645    0x1010    //TX_PREEQ_BIN_MIC0_4
+646    0x1010    //TX_PREEQ_BIN_MIC0_5
+647    0x1010    //TX_PREEQ_BIN_MIC0_6
+648    0x1010    //TX_PREEQ_BIN_MIC0_7
+649    0x1010    //TX_PREEQ_BIN_MIC0_8
+650    0x1010    //TX_PREEQ_BIN_MIC0_9
+651    0x1010    //TX_PREEQ_BIN_MIC0_10
+652    0x1010    //TX_PREEQ_BIN_MIC0_11
+653    0x1010    //TX_PREEQ_BIN_MIC0_12
+654    0x1010    //TX_PREEQ_BIN_MIC0_13
+655    0x1010    //TX_PREEQ_BIN_MIC0_14
+656    0x0200    //TX_PREEQ_BIN_MIC0_15
+657    0x0000    //TX_PREEQ_BIN_MIC0_16
+658    0x0000    //TX_PREEQ_BIN_MIC0_17
+659    0x0000    //TX_PREEQ_BIN_MIC0_18
+660    0x0000    //TX_PREEQ_BIN_MIC0_19
+661    0x0000    //TX_PREEQ_BIN_MIC0_20
+662    0x0000    //TX_PREEQ_BIN_MIC0_21
+663    0x0000    //TX_PREEQ_BIN_MIC0_22
+664    0x0000    //TX_PREEQ_BIN_MIC0_23
+665    0x0020    //TX_PREEQ_SUBNUM_MIC1
+666    0x4848    //TX_PREEQ_GAIN_MIC1_0
+667    0x4848    //TX_PREEQ_GAIN_MIC1_1
+668    0x4848    //TX_PREEQ_GAIN_MIC1_2
+669    0x4848    //TX_PREEQ_GAIN_MIC1_3
+670    0x4848    //TX_PREEQ_GAIN_MIC1_4
+671    0x4848    //TX_PREEQ_GAIN_MIC1_5
+672    0x4848    //TX_PREEQ_GAIN_MIC1_6
+673    0x4848    //TX_PREEQ_GAIN_MIC1_7
+674    0x4848    //TX_PREEQ_GAIN_MIC1_8
+675    0x4848    //TX_PREEQ_GAIN_MIC1_9
+676    0x4848    //TX_PREEQ_GAIN_MIC1_10
+677    0x4848    //TX_PREEQ_GAIN_MIC1_11
+678    0x4848    //TX_PREEQ_GAIN_MIC1_12
+679    0x4848    //TX_PREEQ_GAIN_MIC1_13
+680    0x4848    //TX_PREEQ_GAIN_MIC1_14
+681    0x4848    //TX_PREEQ_GAIN_MIC1_15
+682    0x4848    //TX_PREEQ_GAIN_MIC1_16
+683    0x4848    //TX_PREEQ_GAIN_MIC1_17
+684    0x4848    //TX_PREEQ_GAIN_MIC1_18
+685    0x4848    //TX_PREEQ_GAIN_MIC1_19
+686    0x4848    //TX_PREEQ_GAIN_MIC1_20
+687    0x4848    //TX_PREEQ_GAIN_MIC1_21
+688    0x4848    //TX_PREEQ_GAIN_MIC1_22
+689    0x4848    //TX_PREEQ_GAIN_MIC1_23
+690    0x0E10    //TX_PREEQ_BIN_MIC1_0
+691    0x1010    //TX_PREEQ_BIN_MIC1_1
+692    0x1010    //TX_PREEQ_BIN_MIC1_2
+693    0x1010    //TX_PREEQ_BIN_MIC1_3
+694    0x1010    //TX_PREEQ_BIN_MIC1_4
+695    0x1010    //TX_PREEQ_BIN_MIC1_5
+696    0x1010    //TX_PREEQ_BIN_MIC1_6
+697    0x1010    //TX_PREEQ_BIN_MIC1_7
+698    0x1010    //TX_PREEQ_BIN_MIC1_8
+699    0x1010    //TX_PREEQ_BIN_MIC1_9
+700    0x1010    //TX_PREEQ_BIN_MIC1_10
+701    0x1010    //TX_PREEQ_BIN_MIC1_11
+702    0x1010    //TX_PREEQ_BIN_MIC1_12
+703    0x1010    //TX_PREEQ_BIN_MIC1_13
+704    0x1010    //TX_PREEQ_BIN_MIC1_14
+705    0x0200    //TX_PREEQ_BIN_MIC1_15
+706    0x0000    //TX_PREEQ_BIN_MIC1_16
+707    0x0000    //TX_PREEQ_BIN_MIC1_17
+708    0x0000    //TX_PREEQ_BIN_MIC1_18
+709    0x0000    //TX_PREEQ_BIN_MIC1_19
+710    0x0000    //TX_PREEQ_BIN_MIC1_20
+711    0x0000    //TX_PREEQ_BIN_MIC1_21
+712    0x0000    //TX_PREEQ_BIN_MIC1_22
+713    0x0000    //TX_PREEQ_BIN_MIC1_23
+714    0x0020    //TX_PREEQ_SUBNUM_MIC2
+715    0x4848    //TX_PREEQ_GAIN_MIC2_0
+716    0x4848    //TX_PREEQ_GAIN_MIC2_1
+717    0x4848    //TX_PREEQ_GAIN_MIC2_2
+718    0x4848    //TX_PREEQ_GAIN_MIC2_3
+719    0x4848    //TX_PREEQ_GAIN_MIC2_4
+720    0x4848    //TX_PREEQ_GAIN_MIC2_5
+721    0x4848    //TX_PREEQ_GAIN_MIC2_6
+722    0x4848    //TX_PREEQ_GAIN_MIC2_7
+723    0x4848    //TX_PREEQ_GAIN_MIC2_8
+724    0x4848    //TX_PREEQ_GAIN_MIC2_9
+725    0x4848    //TX_PREEQ_GAIN_MIC2_10
+726    0x4848    //TX_PREEQ_GAIN_MIC2_11
+727    0x4848    //TX_PREEQ_GAIN_MIC2_12
+728    0x4848    //TX_PREEQ_GAIN_MIC2_13
+729    0x4848    //TX_PREEQ_GAIN_MIC2_14
+730    0x4848    //TX_PREEQ_GAIN_MIC2_15
+731    0x4848    //TX_PREEQ_GAIN_MIC2_16
+732    0x4848    //TX_PREEQ_GAIN_MIC2_17
+733    0x4848    //TX_PREEQ_GAIN_MIC2_18
+734    0x4848    //TX_PREEQ_GAIN_MIC2_19
+735    0x4848    //TX_PREEQ_GAIN_MIC2_20
+736    0x4848    //TX_PREEQ_GAIN_MIC2_21
+737    0x4848    //TX_PREEQ_GAIN_MIC2_22
+738    0x4848    //TX_PREEQ_GAIN_MIC2_23
+739    0x0E10    //TX_PREEQ_BIN_MIC2_0
+740    0x1010    //TX_PREEQ_BIN_MIC2_1
+741    0x1010    //TX_PREEQ_BIN_MIC2_2
+742    0x1010    //TX_PREEQ_BIN_MIC2_3
+743    0x1010    //TX_PREEQ_BIN_MIC2_4
+744    0x1010    //TX_PREEQ_BIN_MIC2_5
+745    0x1010    //TX_PREEQ_BIN_MIC2_6
+746    0x1010    //TX_PREEQ_BIN_MIC2_7
+747    0x1010    //TX_PREEQ_BIN_MIC2_8
+748    0x1010    //TX_PREEQ_BIN_MIC2_9
+749    0x1010    //TX_PREEQ_BIN_MIC2_10
+750    0x1010    //TX_PREEQ_BIN_MIC2_11
+751    0x1010    //TX_PREEQ_BIN_MIC2_12
+752    0x1010    //TX_PREEQ_BIN_MIC2_13
+753    0x1010    //TX_PREEQ_BIN_MIC2_14
+754    0x0200    //TX_PREEQ_BIN_MIC2_15
+755    0x0000    //TX_PREEQ_BIN_MIC2_16
+756    0x0000    //TX_PREEQ_BIN_MIC2_17
+757    0x0000    //TX_PREEQ_BIN_MIC2_18
+758    0x0000    //TX_PREEQ_BIN_MIC2_19
+759    0x0000    //TX_PREEQ_BIN_MIC2_20
+760    0x0000    //TX_PREEQ_BIN_MIC2_21
+761    0x0000    //TX_PREEQ_BIN_MIC2_22
+762    0x0000    //TX_PREEQ_BIN_MIC2_23
+763    0x0006    //TX_MASKING_ABILITY
+764    0x0800    //TX_NND_WEIGHT
+765    0x0062    //TX_MIC_CALIBRATION_0
+766    0x0062    //TX_MIC_CALIBRATION_1
+767    0x0062    //TX_MIC_CALIBRATION_2
+768    0x0062    //TX_MIC_CALIBRATION_3
+769    0x0046    //TX_MIC_PWR_BIAS_0
+770    0x0046    //TX_MIC_PWR_BIAS_1
+771    0x0046    //TX_MIC_PWR_BIAS_2
+772    0x0046    //TX_MIC_PWR_BIAS_3
+773    0x000C    //TX_GAIN_LIMIT_0
+774    0x000C    //TX_GAIN_LIMIT_1
+775    0x000C    //TX_GAIN_LIMIT_2
+776    0x000C    //TX_GAIN_LIMIT_3
+777    0x7F5B    //TX_BVE_NOVAD0_ALPHADOWN
+778    0x7FDE    //TX_BVE_VAD0_ALPHAUP
+779    0x7F3A    //TX_BVE_VAD0_ALPHADOWN
+780    0x2000    //TX_BVE_GAINWEIGHT_NOFEVADLI
+781    0x7F5B    //TX_BVE_FEVADLI_ALPHA
+782    0x7F19    //TX_BVE_NOVAD0_ALPHAUP
+783    0x3000    //TX_TDDRC_ALPHA_UP_01
+784    0x3000    //TX_TDDRC_ALPHA_UP_02
+785    0x3000    //TX_TDDRC_ALPHA_UP_03
+786    0x3000    //TX_TDDRC_ALPHA_UP_04
+787    0x7EB8    //TX_TDDRC_ALPHA_DWN_01
+788    0x7EB8    //TX_TDDRC_ALPHA_DWN_02
+789    0x7EB8    //TX_TDDRC_ALPHA_DWN_03
+790    0x7EB8    //TX_TDDRC_ALPHA_DWN_04
+791    0x78D6    //TX_TDDRC_TD_DRC_LIMIT
+792    0x0800    //TX_TDDRC_POST_LIMIT_GAIN
+793    0x0000    //TX_TDDRC_RESRV_0
+794    0x0000    //TX_TDDRC_RESRV_1
+795    0x0018    //TX_FDDRC_BAND_MARGIN_0
+796    0x0030    //TX_FDDRC_BAND_MARGIN_1
+797    0x0050    //TX_FDDRC_BAND_MARGIN_2
+798    0x0080    //TX_FDDRC_BAND_MARGIN_3
+799    0x0007    //TX_FDDRC_BLOCK_EXP
+800    0x5000    //TX_FDDRC_THRD_2_0
+801    0x5000    //TX_FDDRC_THRD_2_1
+802    0x5000    //TX_FDDRC_THRD_2_2
+803    0x5000    //TX_FDDRC_THRD_2_3
+804    0x6400    //TX_FDDRC_THRD_3_0
+805    0x6400    //TX_FDDRC_THRD_3_1
+806    0x6400    //TX_FDDRC_THRD_3_2
+807    0x6400    //TX_FDDRC_THRD_3_3
+808    0x2000    //TX_FDDRC_SLANT_0_0
+809    0x2000    //TX_FDDRC_SLANT_0_1
+810    0x2000    //TX_FDDRC_SLANT_0_2
+811    0x2000    //TX_FDDRC_SLANT_0_3
+812    0x5333    //TX_FDDRC_SLANT_1_0
+813    0x5333    //TX_FDDRC_SLANT_1_1
+814    0x5333    //TX_FDDRC_SLANT_1_2
+815    0x5333    //TX_FDDRC_SLANT_1_3
+816    0x0000    //TX_DEADMIC_SILENCE_TH
+817    0x0000    //TX_MIC_DEGRADE_TH
+818    0x0000    //TX_DEADMIC_CNT
+819    0x0000    //TX_MIC_DEGRADE_CNT
+820    0x0000    //TX_FDDRC_RESRV_4
+821    0x0000    //TX_FDDRC_RESRV_5
+822    0x0000    //TX_FDDRC_RESRV_6
+823    0x7FFF    //TX_NOISE_FLOOR_TH
+824    0x0001    //TX_NOISE_TH_BGN_LEVEL_1
+825    0x7FFF    //TX_NOISE_TH_BGN_LEVEL_2
+826    0x0000    //TX_NOISE_TH_BGN_LEVEL_3
+827    0x0000    //TX_NOISE_IN_N
+828    0x0000    //TX_NOISE_OUT_N
+829    0x7C00    //TX_LAMBDA_PKA_FP
+830    0x2000    //TX_TPKA_FP
+831    0x0080    //TX_MIN_G_FP
+832    0x2000    //TX_MAX_G_FP
+833    0x4848    //TX_FFP_FP_K_METAL
+834    0x4000    //TX_A_POST_FLT_FP
+835    0x0F5C    //TX_RTO_OUTBEAM_TH
+836    0x4CCD    //TX_TPKA_FP_THD
+837    0x0000    //TX_MAX_G_FP_BLK
+838    0x0000    //TX_FFP_FADEIN
+839    0x0000    //TX_FFP_FADEOUT
+840    0x0000    //TX_WHISPERCTH
+841    0x0000    //TX_WHISPERHOLDT
+842    0x0000    //TX_WHISP_ENTHH
+843    0x0000    //TX_WHISP_ENTHL
+844    0x0000    //TX_WHISP_RTOTH
+845    0x0000    //TX_WHISP_RTOTH2
+846    0x0000    //TX_MUTE_PERIOD
+847    0x0000    //TX_FADE_IN_PERIOD
+848    0x0100    //TX_FFP_RESRV_2
+849    0x0020    //TX_FFP_RESRV_3
+850    0x0000    //TX_FFP_RESRV_4
+851    0x0000    //TX_FFP_RESRV_5
+852    0x0000    //TX_FFP_RESRV_6
+853    0x0000    //TX_FILTINDX
+854    0x0000    //TX_TDDRC_THRD_0
+855    0x0000    //TX_TDDRC_THRD_1
+856    0x2000    //TX_TDDRC_THRD_2
+857    0x2000    //TX_TDDRC_THRD_3
+858    0x3000    //TX_TDDRC_SLANT_0
+859    0x6E00    //TX_TDDRC_SLANT_1
+860    0x3000    //TX_TDDRC_ALPHA_UP_00
+861    0x7EB8    //TX_TDDRC_ALPHA_DWN_00
+862    0x0000    //TX_TDDRC_HMNC_FLAG
+863    0x199A    //TX_TDDRC_HMNC_GAIN
+864    0x0000    //TX_TDDRC_SMT_FLAG
+865    0x0CCD    //TX_TDDRC_SMT_W
+866    0x0503    //TX_TDDRC_DRC_GAIN
+867    0x78D6    //TX_TDDRC_LMT_THRD
+868    0x0000    //TX_TDDRC_LMT_ALPHA
+869    0x0000    //TX_TFMASKLTH
+870    0x0000    //TX_TFMASKLTHL
+871    0x0CCD    //TX_TFMASKHTH
+872    0x0CCD    //TX_TFMASKLTH_BINVAD
+873    0xF333    //TX_TFMASKLTH_NS_EST
+874    0x2CCD    //TX_TFMASKLTH_DOA
+875    0xECCD    //TX_TFMASKTH_BLESSCUT
+876    0x1000    //TX_B_LESSCUT_RTO_MASK
+877    0x3800    //TX_SB_RHO_MEAN_TH_ABN
+878    0x2000    //TX_B_POST_FLT_MASK
+879    0x0000    //TX_B_POST_FLT_MASK1
+880    0x5333    //TX_GAIN_WIND_MASK
+881    0x7FFF    //TX_TFMASK_BFSTRICT_MUSIC
+882    0x0000    //TX_TFMASK_BFSTRICT_NOMUSIC
+883    0x7333    //TX_FASTNS_OUTIN_TH
+884    0x0CCD    //TX_FASTNS_TFMASK_TH
+885    0x0CCD    //TX_FASTNS_TFMASKBIN_TH1
+886    0x0CCD    //TX_FASTNS_TFMASKBIN_TH2
+887    0x0CCD    //TX_FASTNS_TFMASKBIN_TH3
+888    0x0028    //TX_FASTNS_ARSPC_TH
+889    0x8000    //TX_FASTNS_MASK5_TH
+890    0x4848    //TX_POSTSSA_MIN_G_VR_MASK
+891    0x4000    //TX_A_LESSCUT_RTO_MASK
+892    0x1770    //TX_FASTNS_NOISETH
+893    0xC000    //TX_FASTNS_SSA_THLFL
+894    0xC000    //TX_FASTNS_SSA_THHFL
+895    0xCCCC    //TX_FASTNS_SSA_THLFH
+896    0xD999    //TX_FASTNS_SSA_THHFH
+897    0x2339    //TX_SENDFUNC_REG_MICMUTE
+898    0x0021    //TX_SENDFUNC_REG_MICMUTE1
+899    0x02BC    //TX_MICMUTE_RATIO_THR
+900    0x0140    //TX_MICMUTE_AMP_THR
+901    0x0004    //TX_MICMUTE_HPF_IND
+902    0x00C0    //TX_MICMUTE_LOG_EYR_TH
+903    0x0008    //TX_MICMUTE_CVG_TIME
+904    0x0008    //TX_MICMUTE_RELEASE_TIME
+905    0x01FE    //TX_MIC_VOLUME_MIC0MUTE
+906    0x0020    //TX_MICMUTE_DIST2REF_1
+907    0x001E    //TX_MICMUTE_FRQ_AEC_L
+908    0x7999    //TX_MICMUTE_EAD_THR
+909    0x7FFF    //TX_MICMUTE_LAMBDA_CB_NLE
+910    0x7FFF    //TX_MICMUTE_LAMBDA_RE_EST
+911    0x4000    //TX_DTD_THR1_MICMUTE_0
+912    0x7000    //TX_DTD_THR1_MICMUTE_1
+913    0x7FFF    //TX_DTD_THR1_MICMUTE_2
+914    0x7FFF    //TX_DTD_THR1_MICMUTE_3
+915    0x6CCC    //TX_DTD_THR2_MICMUTE_0
+916    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_0
+917    0x0400    //TX_MICMUTE_MIN_EQ_RE_EST_1
+918    0x1000    //TX_MICMUTE_MIN_EQ_RE_EST_2
+919    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_3
+920    0x7FFF    //TX_MICMUTE_MIN_EQ_RE_EST_4
+921    0x4000    //TX_MICMUTE_C_POST_FLT
+922    0x03E8    //TX_MICMUTE_DT_CUT_K
+923    0x0001    //TX_MICMUTE_DT_CUT_THR
+924    0x03E8    //TX_MICMUTE_DT_CUT_K2
+925    0x0001    //TX_MICMUTE_DT_CUT_THR2
+926    0x0064    //TX_MICMUTE_DT2_HOLD_N
+927    0x1000    //TX_MICMUTE_RATIODTH_THCUT
+928    0x1000    //TX_MICMUTE_B_POST_FLT_ECHOL
+929    0x7FFF    //TX_MICMUTE_B_POST_FLT_ECHOH
+930    0x0400    //TX_MICMUTE_C_POST_FLT_MASK
+931    0x7999    //TX_MICMUTE_RATIODTL_CUT_TH
+932    0x0258    //TX_MICMUTE_DT_CUT_K1
+933    0x0800    //TX_MICMUTE_POST_MASK_SUP
+934    0xFC00    //TX_MICMUTE_PRE_MASK_SUP
+935    0x001C    //TX_MICMUTE_SDPCRN_GAIN
+936    0x6000    //TX_MICMUTE_NSSAMASK_MORENS
+937    0x7000    //TX_MICMUTE_CGMMMASK_MORENS
+938    0x2710    //TX_MIC1RUB_AMP_THR
+939    0x0010    //TX_MIC1MUTE_RATIO_THR
+940    0x0450    //TX_MIC1MUTE_AMP_THR
+941    0x0008    //TX_MIC1MUTE_CVG_TIME
+942    0x0008    //TX_MIC1MUTE_RELEASE_TIME
+943    0x0000    //TX_MIC_VOLUME_MIC1MUTE
+944    0x0000    //TX_TFMASKM4_2_DT_THR
+945    0x0000    //TX_MEAN_GAIN500HZ_DT_THR
+946    0x0000    //TX_MUTE_REF_POW_TH
+947    0x0000    //TX_MIC0_MUTE_INITECHO_CUT_LEN
+948    0x0000    //TX_MIC1_MUTE_INITECHO_CUT_LEN
+949    0x0000    //TX_PRE_MASK_SUP
+950    0x0000    //TX_SDPCRN_GAIN
+951    0x0000    //TX_EASSA_CUT_GAINTH
+952    0x0000    //TX_DT_HARME_ENDF
+953    0x0000    //TX_NSSAMASK_MORENS
+954    0x0000    //TX_CGMMMASK_MORENS
+955    0x0000    //TX_DPCRN_MASK_MORENS_ECHO
+956    0x0000    //TX_PRE_EASSAMASK_SUP
+957    0x0000    //TX_NSSAMASK_MORENS_TYPE1
+958    0x0000    //TX_NSSAMASK_MORENS_TYPE2
+959    0x0000    //TX_CGMMMASK_MORENS_TYPE1
+960    0x0000    //TX_CGMMMASK_MORENS_TYPE2
+961    0x0000    //TX_SSA30_RESRV_0
+962    0x0100    //TX_EASSA_AEC_NSSA_REFG_0
+963    0x0200    //TX_EASSA_AEC_NSSA_REFG_1
+964    0x0200    //TX_EASSA_AEC_NSSA_REFG_2
+965    0x0200    //TX_EASSA_AEC_NSSA_REFG_3
+966    0x0200    //TX_EASSA_AEC_NSSA_REFG_4
+967    0x0C00    //TX_EASSA_AEC_NSSA_REFG_5
+968    0x0000    //TX_EASSA_AEC_NSSA_GAIN
+969    0x2710    //TX_EASSA_BIG_NONLINEAR_TH
+970    0x0000    //TX_EASSA_AEC_REFG_STNONL_0
+971    0x0200    //TX_EASSA_AEC_REFG_STNONL_1
+972    0x0400    //TX_EASSA_AEC_REFG_STNONL_2
+973    0x0400    //TX_EASSA_AEC_REFG_STNONL_3
+974    0x0400    //TX_EASSA_AEC_REFG_STNONL_4
+975    0x0C00    //TX_EASSA_AEC_REFG_STNONL_5
+976    0x00A0    //TX_EASSA_AEC_FEMALE_ECHO_TH
+977    0x0032    //TX_EASSA_NONLECHO_TH
+978    0x4E20    //TX_EASSA_NONLECHO_ECHOENTH
+979    0x0000    //TX_EASSA_NNG
+980    0x0800    //TX_EASSA_NONLHFG
+981    0x1000    //TX_EASSA_DT2000HZ_REFG
+982    0x0C00    //TX_EASSA_DT400HZ_MAING
+983    0x3A98    //TX_EASSA_RATIODTH_THCUT_NSSA
+984    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_0
+985    0x0000    //TX_EASSA_AEC_NSSA_REFG_MAINBLK_1
+986    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_0
+987    0x0000    //TX_EASSA_AEC_NSSA_REFG_REFBLK_1
+#RX
+0    0x8024    //RX_RECVFUNC_MODE_0
+1    0x0000    //RX_RECVFUNC_MODE_1
+2    0x0003    //RX_SAMPLINGFREQ_SIG
+3    0x0003    //RX_SAMPLINGFREQ_PROC
+4    0x000A    //RX_FRAME_SZ
+5    0x0000    //RX_DELAY_OPT
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+10    0x0800    //RX_PGA
+11    0x7FFF    //RX_A_HP
+12    0x0000    //RX_B_PE
+13    0x1800    //RX_THR_PITCH_DET_0
+14    0x1000    //RX_THR_PITCH_DET_1
+15    0x0800    //RX_THR_PITCH_DET_2
+16    0x0008    //RX_PITCH_BFR_LEN
+17    0x0003    //RX_SBD_PITCH_DET
+18    0x0100    //RX_PP_RESRV_0
+19    0x0020    //RX_PP_RESRV_1
+20    0x0400    //RX_N_SN_EST
+21    0x000C    //RX_N2_SN_EST
+22    0x0006    //RX_NS_LVL_CTRL
+23    0x9000    //RX_THR_SN_EST
+24    0x7CCD    //RX_LAMBDA_PFILT
+25    0x000A    //RX_MUTE_PERIOD
+26    0x0190    //RX_FADE_IN_PERIOD
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+30    0x0002    //RX_EXTRA_NS_L
+31    0x0800    //RX_EXTRA_NS_A
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+35    0x199A    //RX_A_POST_FLT
+36    0x0000    //RX_LMT_THRD
+37    0x4000    //RX_LMT_ALPHA
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+111    0x0002    //RX_FILTINDX
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+125    0x7C00    //RX_LAMBDA_PKA_FP
+126    0x2000    //RX_TPKA_FP
+127    0x2000    //RX_MIN_G_FP
+128    0x0080    //RX_MAX_G_FP
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+131    0x0000    //RX_MAXLEVEL_CNG
+132    0x3000    //RX_BWE_UV_TH
+133    0x3000    //RX_BWE_UV_TH2
+134    0x1800    //RX_BWE_UV_TH3
+135    0x1000    //RX_BWE_V_TH
+136    0x04CD    //RX_BWE_GAIN1_V_TH1
+137    0x0F33    //RX_BWE_GAIN1_V_TH2
+138    0x7333    //RX_BWE_UV_EQ
+139    0x199A    //RX_BWE_V_EQ
+140    0x7333    //RX_BWE_TONE_TH
+141    0x0004    //RX_BWE_UV_HOLD_T
+142    0x6CCD    //RX_BWE_GAIN2_ALPHA
+143    0x799A    //RX_BWE_GAIN3_ALPHA
+144    0x001E    //RX_BWE_CUTOFF
+145    0x3000    //RX_BWE_GAINFILL
+146    0x3200    //RX_BWE_MAXTH_TONE
+147    0x2000    //RX_BWE_EQ_0
+148    0x2000    //RX_BWE_EQ_1
+149    0x2000    //RX_BWE_EQ_2
+150    0x2000    //RX_BWE_EQ_3
+151    0x2000    //RX_BWE_EQ_4
+152    0x2000    //RX_BWE_EQ_5
+153    0x2000    //RX_BWE_EQ_6
+154    0x0000    //RX_BWE_RESRV_0
+155    0x0000    //RX_BWE_RESRV_1
+156    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x000B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0013    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0020    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0036    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x005B    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0099    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+6    0x5000    //RX_TDDRC_ALPHA_UP_1
+7    0x5000    //RX_TDDRC_ALPHA_UP_2
+8    0x5000    //RX_TDDRC_ALPHA_UP_3
+9    0x2000    //RX_TDDRC_ALPHA_UP_4
+27    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+28    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+29    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+32    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+33    0x65AD    //RX_TDDRC_LIMITER_THRD
+34    0x0800    //RX_TDDRC_LIMITER_GAIN
+112    0x0000    //RX_TDDRC_THRD_0
+113    0x0000    //RX_TDDRC_THRD_1
+114    0x1A00    //RX_TDDRC_THRD_2
+115    0x1A00    //RX_TDDRC_THRD_3
+116    0x3000    //RX_TDDRC_SLANT_0
+117    0x7EB8    //RX_TDDRC_SLANT_1
+118    0x5000    //RX_TDDRC_ALPHA_UP_0
+119    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+120    0x0000    //RX_TDDRC_HMNC_FLAG
+121    0x199A    //RX_TDDRC_HMNC_GAIN
+122    0x0001    //RX_TDDRC_SMT_FLAG
+123    0x0CCD    //RX_TDDRC_SMT_W
+124    0x01C8    //RX_TDDRC_DRC_GAIN
+38    0x0020    //RX_FDEQ_SUBNUM
+39    0x4848    //RX_FDEQ_GAIN_0
+40    0x4848    //RX_FDEQ_GAIN_1
+41    0x4848    //RX_FDEQ_GAIN_2
+42    0x4848    //RX_FDEQ_GAIN_3
+43    0x4848    //RX_FDEQ_GAIN_4
+44    0x4848    //RX_FDEQ_GAIN_5
+45    0x4848    //RX_FDEQ_GAIN_6
+46    0x4848    //RX_FDEQ_GAIN_7
+47    0x4848    //RX_FDEQ_GAIN_8
+48    0x4848    //RX_FDEQ_GAIN_9
+49    0x4848    //RX_FDEQ_GAIN_10
+50    0x4848    //RX_FDEQ_GAIN_11
+51    0x4848    //RX_FDEQ_GAIN_12
+52    0x4848    //RX_FDEQ_GAIN_13
+53    0x4848    //RX_FDEQ_GAIN_14
+54    0x4848    //RX_FDEQ_GAIN_15
+55    0x4848    //RX_FDEQ_GAIN_16
+56    0x4848    //RX_FDEQ_GAIN_17
+57    0x4848    //RX_FDEQ_GAIN_18
+58    0x4848    //RX_FDEQ_GAIN_19
+59    0x4848    //RX_FDEQ_GAIN_20
+60    0x4848    //RX_FDEQ_GAIN_21
+61    0x4848    //RX_FDEQ_GAIN_22
+62    0x4848    //RX_FDEQ_GAIN_23
+63    0x0202    //RX_FDEQ_BIN_0
+64    0x0203    //RX_FDEQ_BIN_1
+65    0x0303    //RX_FDEQ_BIN_2
+66    0x0304    //RX_FDEQ_BIN_3
+67    0x0405    //RX_FDEQ_BIN_4
+68    0x0506    //RX_FDEQ_BIN_5
+69    0x0708    //RX_FDEQ_BIN_6
+70    0x090A    //RX_FDEQ_BIN_7
+71    0x0B0C    //RX_FDEQ_BIN_8
+72    0x0D0E    //RX_FDEQ_BIN_9
+73    0x1013    //RX_FDEQ_BIN_10
+74    0x1719    //RX_FDEQ_BIN_11
+75    0x1B1E    //RX_FDEQ_BIN_12
+76    0x1E1E    //RX_FDEQ_BIN_13
+77    0x1E28    //RX_FDEQ_BIN_14
+78    0x282C    //RX_FDEQ_BIN_15
+79    0x0000    //RX_FDEQ_BIN_16
+80    0x0000    //RX_FDEQ_BIN_17
+81    0x0000    //RX_FDEQ_BIN_18
+82    0x0000    //RX_FDEQ_BIN_19
+83    0x0000    //RX_FDEQ_BIN_20
+84    0x0000    //RX_FDEQ_BIN_21
+85    0x0000    //RX_FDEQ_BIN_22
+86    0x0000    //RX_FDEQ_BIN_23
+87    0x4000    //RX_FDEQ_RESRV_0
+88    0x0320    //RX_FDEQ_RESRV_1
+89    0x0018    //RX_FDDRC_BAND_MARGIN_0
+90    0x0030    //RX_FDDRC_BAND_MARGIN_1
+91    0x0050    //RX_FDDRC_BAND_MARGIN_2
+92    0x0080    //RX_FDDRC_BAND_MARGIN_3
+93    0x0007    //RX_FDDRC_BLOCK_EXP
+94    0x5000    //RX_FDDRC_THRD_2_0
+95    0x5000    //RX_FDDRC_THRD_2_1
+96    0x5000    //RX_FDDRC_THRD_2_2
+97    0x5000    //RX_FDDRC_THRD_2_3
+98    0x6400    //RX_FDDRC_THRD_3_0
+99    0x6400    //RX_FDDRC_THRD_3_1
+100    0x6400    //RX_FDDRC_THRD_3_2
+101    0x6400    //RX_FDDRC_THRD_3_3
+102    0x2000    //RX_FDDRC_SLANT_0_0
+103    0x2000    //RX_FDDRC_SLANT_0_1
+104    0x2000    //RX_FDDRC_SLANT_0_2
+105    0x2000    //RX_FDDRC_SLANT_0_3
+106    0x5333    //RX_FDDRC_SLANT_1_0
+107    0x5333    //RX_FDDRC_SLANT_1_1
+108    0x5333    //RX_FDDRC_SLANT_1_2
+109    0x5333    //RX_FDDRC_SLANT_1_3
+110    0x0000    //RX_FDDRC_RESRV_0
+129    0x0100    //RX_SPK_VOL
+130    0x0000    //RX_VOL_RESRV_0
+#RX 2
+157    0x8024    //RX_RECVFUNC_MODE_0
+158    0x0000    //RX_RECVFUNC_MODE_1
+159    0x0003    //RX_SAMPLINGFREQ_SIG
+160    0x0003    //RX_SAMPLINGFREQ_PROC
+161    0x000A    //RX_FRAME_SZ
+162    0x0000    //RX_DELAY_OPT
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+167    0x0800    //RX_PGA
+168    0x7FFF    //RX_A_HP
+169    0x0000    //RX_B_PE
+170    0x1800    //RX_THR_PITCH_DET_0
+171    0x1000    //RX_THR_PITCH_DET_1
+172    0x0800    //RX_THR_PITCH_DET_2
+173    0x0008    //RX_PITCH_BFR_LEN
+174    0x0003    //RX_SBD_PITCH_DET
+175    0x0100    //RX_PP_RESRV_0
+176    0x0020    //RX_PP_RESRV_1
+177    0x0400    //RX_N_SN_EST
+178    0x000C    //RX_N2_SN_EST
+179    0x0006    //RX_NS_LVL_CTRL
+180    0x9000    //RX_THR_SN_EST
+181    0x7CCD    //RX_LAMBDA_PFILT
+182    0x000A    //RX_MUTE_PERIOD
+183    0x0190    //RX_FADE_IN_PERIOD
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+187    0x0002    //RX_EXTRA_NS_L
+188    0x0800    //RX_EXTRA_NS_A
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+192    0x199A    //RX_A_POST_FLT
+193    0x0000    //RX_LMT_THRD
+194    0x4000    //RX_LMT_ALPHA
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+268    0x0002    //RX_FILTINDX
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+282    0x7C00    //RX_LAMBDA_PKA_FP
+283    0x2000    //RX_TPKA_FP
+284    0x2000    //RX_MIN_G_FP
+285    0x0080    //RX_MAX_G_FP
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+288    0x0000    //RX_MAXLEVEL_CNG
+289    0x3000    //RX_BWE_UV_TH
+290    0x3000    //RX_BWE_UV_TH2
+291    0x1800    //RX_BWE_UV_TH3
+292    0x1000    //RX_BWE_V_TH
+293    0x04CD    //RX_BWE_GAIN1_V_TH1
+294    0x0F33    //RX_BWE_GAIN1_V_TH2
+295    0x7333    //RX_BWE_UV_EQ
+296    0x199A    //RX_BWE_V_EQ
+297    0x7333    //RX_BWE_TONE_TH
+298    0x0004    //RX_BWE_UV_HOLD_T
+299    0x6CCD    //RX_BWE_GAIN2_ALPHA
+300    0x799A    //RX_BWE_GAIN3_ALPHA
+301    0x001E    //RX_BWE_CUTOFF
+302    0x3000    //RX_BWE_GAINFILL
+303    0x3200    //RX_BWE_MAXTH_TONE
+304    0x2000    //RX_BWE_EQ_0
+305    0x2000    //RX_BWE_EQ_1
+306    0x2000    //RX_BWE_EQ_2
+307    0x2000    //RX_BWE_EQ_3
+308    0x2000    //RX_BWE_EQ_4
+309    0x2000    //RX_BWE_EQ_5
+310    0x2000    //RX_BWE_EQ_6
+311    0x0000    //RX_BWE_RESRV_0
+312    0x0000    //RX_BWE_RESRV_1
+313    0x0000    //RX_BWE_RESRV_2
+#VOL    0
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x000B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    1
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0013    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    2
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0020    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    3
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0036    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    4
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x005B    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    5
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0099    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+#VOL    6
+163    0x5000    //RX_TDDRC_ALPHA_UP_1
+164    0x5000    //RX_TDDRC_ALPHA_UP_2
+165    0x5000    //RX_TDDRC_ALPHA_UP_3
+166    0x2000    //RX_TDDRC_ALPHA_UP_4
+184    0x7EB8    //RX_TDDRC_ALPHA_DWN_1
+185    0x7EB8    //RX_TDDRC_ALPHA_DWN_2
+186    0x7EB8    //RX_TDDRC_ALPHA_DWN_3
+189    0x7EB8    //RX_TDDRC_ALPHA_DWN_4
+190    0x65AD    //RX_TDDRC_LIMITER_THRD
+191    0x0800    //RX_TDDRC_LIMITER_GAIN
+269    0x0000    //RX_TDDRC_THRD_0
+270    0x0000    //RX_TDDRC_THRD_1
+271    0x1A00    //RX_TDDRC_THRD_2
+272    0x1A00    //RX_TDDRC_THRD_3
+273    0x3000    //RX_TDDRC_SLANT_0
+274    0x7EB8    //RX_TDDRC_SLANT_1
+275    0x5000    //RX_TDDRC_ALPHA_UP_0
+276    0x7EB8    //RX_TDDRC_ALPHA_DWN_0
+277    0x0000    //RX_TDDRC_HMNC_FLAG
+278    0x199A    //RX_TDDRC_HMNC_GAIN
+279    0x0001    //RX_TDDRC_SMT_FLAG
+280    0x0CCD    //RX_TDDRC_SMT_W
+281    0x01C8    //RX_TDDRC_DRC_GAIN
+195    0x0020    //RX_FDEQ_SUBNUM
+196    0x4848    //RX_FDEQ_GAIN_0
+197    0x4848    //RX_FDEQ_GAIN_1
+198    0x4848    //RX_FDEQ_GAIN_2
+199    0x4848    //RX_FDEQ_GAIN_3
+200    0x4848    //RX_FDEQ_GAIN_4
+201    0x4848    //RX_FDEQ_GAIN_5
+202    0x4848    //RX_FDEQ_GAIN_6
+203    0x4848    //RX_FDEQ_GAIN_7
+204    0x4848    //RX_FDEQ_GAIN_8
+205    0x4848    //RX_FDEQ_GAIN_9
+206    0x4848    //RX_FDEQ_GAIN_10
+207    0x4848    //RX_FDEQ_GAIN_11
+208    0x4848    //RX_FDEQ_GAIN_12
+209    0x4848    //RX_FDEQ_GAIN_13
+210    0x4848    //RX_FDEQ_GAIN_14
+211    0x4848    //RX_FDEQ_GAIN_15
+212    0x4848    //RX_FDEQ_GAIN_16
+213    0x4848    //RX_FDEQ_GAIN_17
+214    0x4848    //RX_FDEQ_GAIN_18
+215    0x4848    //RX_FDEQ_GAIN_19
+216    0x4848    //RX_FDEQ_GAIN_20
+217    0x4848    //RX_FDEQ_GAIN_21
+218    0x4848    //RX_FDEQ_GAIN_22
+219    0x4848    //RX_FDEQ_GAIN_23
+220    0x0202    //RX_FDEQ_BIN_0
+221    0x0203    //RX_FDEQ_BIN_1
+222    0x0303    //RX_FDEQ_BIN_2
+223    0x0304    //RX_FDEQ_BIN_3
+224    0x0405    //RX_FDEQ_BIN_4
+225    0x0506    //RX_FDEQ_BIN_5
+226    0x0708    //RX_FDEQ_BIN_6
+227    0x090A    //RX_FDEQ_BIN_7
+228    0x0B0C    //RX_FDEQ_BIN_8
+229    0x0D0E    //RX_FDEQ_BIN_9
+230    0x1013    //RX_FDEQ_BIN_10
+231    0x1719    //RX_FDEQ_BIN_11
+232    0x1B1E    //RX_FDEQ_BIN_12
+233    0x1E1E    //RX_FDEQ_BIN_13
+234    0x1E28    //RX_FDEQ_BIN_14
+235    0x282C    //RX_FDEQ_BIN_15
+236    0x0000    //RX_FDEQ_BIN_16
+237    0x0000    //RX_FDEQ_BIN_17
+238    0x0000    //RX_FDEQ_BIN_18
+239    0x0000    //RX_FDEQ_BIN_19
+240    0x0000    //RX_FDEQ_BIN_20
+241    0x0000    //RX_FDEQ_BIN_21
+242    0x0000    //RX_FDEQ_BIN_22
+243    0x0000    //RX_FDEQ_BIN_23
+244    0x4000    //RX_FDEQ_RESRV_0
+245    0x0320    //RX_FDEQ_RESRV_1
+246    0x0018    //RX_FDDRC_BAND_MARGIN_0
+247    0x0030    //RX_FDDRC_BAND_MARGIN_1
+248    0x0050    //RX_FDDRC_BAND_MARGIN_2
+249    0x0080    //RX_FDDRC_BAND_MARGIN_3
+250    0x0007    //RX_FDDRC_BLOCK_EXP
+251    0x5000    //RX_FDDRC_THRD_2_0
+252    0x5000    //RX_FDDRC_THRD_2_1
+253    0x5000    //RX_FDDRC_THRD_2_2
+254    0x5000    //RX_FDDRC_THRD_2_3
+255    0x6400    //RX_FDDRC_THRD_3_0
+256    0x6400    //RX_FDDRC_THRD_3_1
+257    0x6400    //RX_FDDRC_THRD_3_2
+258    0x6400    //RX_FDDRC_THRD_3_3
+259    0x2000    //RX_FDDRC_SLANT_0_0
+260    0x2000    //RX_FDDRC_SLANT_0_1
+261    0x2000    //RX_FDDRC_SLANT_0_2
+262    0x2000    //RX_FDDRC_SLANT_0_3
+263    0x5333    //RX_FDDRC_SLANT_1_0
+264    0x5333    //RX_FDDRC_SLANT_1_1
+265    0x5333    //RX_FDDRC_SLANT_1_2
+266    0x5333    //RX_FDDRC_SLANT_1_3
+267    0x0000    //RX_FDDRC_RESRV_0
+286    0x0100    //RX_SPK_VOL
+287    0x0000    //RX_VOL_RESRV_0
+
diff --git a/audio/tegu/tuning/fortemedia/mcps.dat b/audio/tegu/tuning/fortemedia/mcps.dat
index 04fc100..bdb0b94 100644
Binary files a/audio/tegu/tuning/fortemedia/mcps.dat and b/audio/tegu/tuning/fortemedia/mcps.dat differ
diff --git a/conf/init.tegu.rc b/conf/init.tegu.rc
index f18bd8c..fbbd999 100644
--- a/conf/init.tegu.rc
+++ b/conf/init.tegu.rc
@@ -35,3 +35,14 @@ on post-fs-data
 # Bluetooth
 on post-fs-data
     chown bluetooth system /proc/bluetooth/timesync
+
+# ODPM
+on early-boot && property:ro.boot.hardware.sku=GXQ96
+    write /sys/bus/iio/devices/iio:device0/enabled_rails "CH11=BUCK12S"
+on early-boot && property:ro.boot.hardware.sku=G3Y12
+    write /sys/bus/iio/devices/iio:device0/enabled_rails "CH11=BUCK12S"
+
+# Fingerprint
+on property:init.svc.vendor.fingerprint-goodix=running && \
+   property:vendor.fingerprint.allowed.running=""
+    stop vendor.fingerprint-goodix
diff --git a/device-tegu.mk b/device-tegu.mk
index c7e17ef..682155b 100644
--- a/device-tegu.mk
+++ b/device-tegu.mk
@@ -129,6 +129,11 @@ PRODUCT_PACKAGES += \
 	libspatialaudio \
 	librondo
 
+# Sound Dose
+PRODUCT_PACKAGES += \
+	android.hardware.audio.sounddose-vendor-impl \
+	audio_sounddose_aoc
+
 # Bluetooth LE Audio
 PRODUCT_PRODUCT_PROPERTIES += \
 	ro.bluetooth.leaudio_switcher.supported=true \
@@ -196,9 +201,7 @@ PRODUCT_SOONG_NAMESPACES += \
 # Location
 include device/google/tegu/location/gnssd/device-gnss.mk
 
-# Set zram size
 PRODUCT_VENDOR_PROPERTIES += \
-	vendor.zram.size=3g \
 	persist.device_config.configuration.disable_rescue_party=true
 
 PRODUCT_VENDOR_PROPERTIES += \
@@ -211,12 +214,27 @@ PRODUCT_DEFAULT_PROPERTY_OVERRIDES += persist.vendor.display.primary.boot_config
 PRODUCT_DEFAULT_PROPERTY_OVERRIDES += vendor.display.preferred_mode=960x2142@120
 
 # Vibrator HAL
-ACTUATOR_MODEL := luxshare_ict_081545
+ADAPTIVE_HAPTICS_FEATURE := adaptive_haptics_v1
 PRODUCT_VENDOR_PROPERTIES += \
-    ro.vendor.vibrator.hal.chirp.enabled=1 \
-    ro.vendor.vibrator.hal.device.mass=0.222 \
-    ro.vendor.vibrator.hal.loc.coeff=2.8
+    ro.vendor.vibrator.hal.supported_primitives=243 \
+    ro.vendor.vibrator.hal.f0.comp.enabled=1 \
+    ro.vendor.vibrator.hal.redc.comp.enabled=0 \
+    persist.vendor.vibrator.hal.context.enable=false \
+    persist.vendor.vibrator.hal.context.scale=40 \
+    persist.vendor.vibrator.hal.context.fade=true \
+    persist.vendor.vibrator.hal.context.cooldowntime=1600 \
+    persist.vendor.vibrator.hal.context.settlingtime=5000
 
 # PKVM Memory Reclaim
 PRODUCT_VENDOR_PROPERTIES += \
     hypervisor.memory_reclaim.supported=1
+
+# Fingerprint HAL
+GOODIX_CONFIG_BUILD_VERSION := g7_trusty
+PRODUCT_SOONG_NAMESPACES += vendor/google_devices/tegu/prebuilts/firmware/fingerprint
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_common.mk)
+ifeq ($(filter factory%, $(TARGET_PRODUCT)),)
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_shipping.mk)
+else
+$(call inherit-product-if-exists, vendor/goodix/udfps/configuration/udfps_factory.mk)
+endif
diff --git a/factory_tegu.mk b/factory_tegu.mk
index ad60b38..063b388 100644
--- a/factory_tegu.mk
+++ b/factory_tegu.mk
@@ -35,6 +35,6 @@ $(call soong_config_set, gpssdk, sdkv1, True)
 $(call soong_config_set, gpssdk, gpsmcuversion, gpsv1_$(TARGET_BUILD_VARIANT))
 
 # Factory binaries of camera
-PRODUCT_PACKAGES += fatp_km4cm4tk4_wide_hat_tool fatp_km4cm4_tele_hat_tool fatp_km4cm4tk4_ultrawide_hat_tool fatp_km4cm4_front_hat_tool
+PRODUCT_PACKAGES += fatp_tg4_wide_hat_tool
 
 PRODUCT_WITHOUT_TTS_VOICE_PACKS := true
diff --git a/location/gnssd/Android.bp b/location/gnssd/Android.bp
index 3c6c06d..60acd41 100644
--- a/location/gnssd/Android.bp
+++ b/location/gnssd/Android.bp
@@ -4,6 +4,7 @@ soong_namespace {
 package {
     default_applicable_licenses: ["vendor_samsung_slsi_gnss_license"],
 }
+
 license {
     name: "vendor_samsung_slsi_gnss_license",
     visibility: [":__subpackages__"],
@@ -41,8 +42,16 @@ cc_prebuilt_binary {
     // Bypass because libhidltransport is deprecated
     // Bypass because libhwbinder is deprecated
     check_elf_files: false,
-    vintf_fragments: ["android.hardware.gnss@lassen.xml"],
+    product_variables: {
+        debuggable: {
+            required: [
+                "libsighandler",
+            ],
+        },
+    },
+
     init_rc: ["init.gnss.rc"],
+    vintf_fragments: ["android.hardware.gnss@default.xml"],
 }
 
 cc_prebuilt_binary {
@@ -77,6 +86,13 @@ cc_prebuilt_binary {
     },
     // Bypass because libsitril-gps is Android.mk module
     check_elf_files: false,
+    product_variables: {
+        debuggable: {
+            required: [
+                "libsighandler",
+            ],
+        },
+    },
 }
 
 // factory daemon and libraries
@@ -211,7 +227,6 @@ cc_prebuilt_library_shared {
     },
     // Bypass because libhidltransport is deprecated
     check_elf_files: false,
-    //vintf_fragments: ["android.hardware.gnss@2.1-service-lass.xml"]
 }
 
 cc_prebuilt_library_shared {
@@ -245,7 +260,6 @@ cc_prebuilt_library_shared {
     },
     // Bypass because libhidltransport is deprecated
     check_elf_files: false,
-    //vintf_fragments: ["android.hardware.gnss@2.1-service-lass.xml"]
 }
 
 cc_prebuilt_library_shared {
@@ -279,7 +293,6 @@ cc_prebuilt_library_shared {
     },
     // Bypass because libhidltransport is deprecated
     check_elf_files: false,
-    //vintf_fragments: ["android.hardware.gnss@2.1-service-lass.xml"]
 }
 
 cc_prebuilt_library_shared {
@@ -313,5 +326,4 @@ cc_prebuilt_library_shared {
     },
     // Bypass because libhidltransport is deprecated
     check_elf_files: false,
-    //vintf_fragments: ["android.hardware.gnss@2.1-service-lass.xml"]
 }
diff --git a/location/gnssd/android.hardware.gnss@lassen.xml b/location/gnssd/android.hardware.gnss@default.xml
similarity index 100%
rename from location/gnssd/android.hardware.gnss@lassen.xml
rename to location/gnssd/android.hardware.gnss@default.xml
diff --git a/location/gnssd/device_framework_matrix_product.xml b/location/gnssd/device_framework_matrix_product.xml
new file mode 100644
index 0000000..2c93444
--- /dev/null
+++ b/location/gnssd/device_framework_matrix_product.xml
@@ -0,0 +1,10 @@
+<compatibility-matrix version="1.0" type="framework" level="8">
+    <hal format="aidl" optional="true">
+        <name>android.hardware.gnss</name>
+        <version>3</version>
+        <interface>
+            <name>IGnss</name>
+            <instance>vendor</instance>
+        </interface>
+    </hal>
+</compatibility-matrix>
diff --git a/location/gnssd/gnss_release.mk b/location/gnssd/gnss_release.mk
index 70198d4..4ce9cde 100644
--- a/location/gnssd/gnss_release.mk
+++ b/location/gnssd/gnss_release.mk
@@ -1,27 +1,49 @@
 # only GPS libraries and binaries to the target directory
 GPS_ROOT := device/google/tegu/location/gnssd
 
+# Enable pixel gnss hal service
+include device/google/gs-common/gps/pixel/pixel_gnss_hal.mk
+
+
 PRODUCT_PACKAGES += \
-    android.hardware.gnss@2.1-impl \
     gnssd \
-    sctd \
-    spad \
-    swcnd \
-    libmptool_json \
-    libmptool_log \
-    libmptool_utils \
-    gnss-aidl-service_IGnssV2_ISlsiGnssV1 \
     android.hardware.gnss-service \
     android.hardware.location.gps.prebuilt.xml
 
 PRODUCT_COPY_FILES += \
     $(GPS_ROOT)/release/ca.pem:vendor/etc/gnss/ca.pem \
+    $(GPS_ROOT)/release/kepler.bin:vendor/firmware/kepler.bin
+
+
+# factory libraries
+PRODUCT_PACKAGES += \
+    android.hardware.gnss@2.1-impl \
+    sctd \
+    spad \
+    swcnd \
+    libmptool_json \
+    libmptool_log \
+    libmptool_utils
+
+# factory libraries
+PRODUCT_COPY_FILES += \
     $(GPS_ROOT)/release/sctd.json:vendor/etc/sctd.json \
     $(GPS_ROOT)/release/spad.json:vendor/etc/spad.json \
-    $(GPS_ROOT)/release/swcnd.json:vendor/etc/swcnd.json \
+    $(GPS_ROOT)/release/swcnd.json:vendor/etc/swcnd.json
+
 
 PRODUCT_SOONG_NAMESPACES += \
     $(GPS_ROOT)
 
-PRODUCT_COPY_FILES += \
-    $(GPS_ROOT)/release/gps.cfg:vendor/etc/gnss/gps.cfg
+ifneq (,$(filter userdebug eng, $(TARGET_BUILD_VARIANT)))
+    PRODUCT_COPY_FILES += \
+        $(GPS_ROOT)/release/gps.cfg:vendor/etc/gnss/gps.cfg
+    PRODUCT_VENDOR_PROPERTIES += \
+        vendor.gps.aol.enabled=true
+else
+    PRODUCT_COPY_FILES += \
+        $(GPS_ROOT)/release/gps_user.cfg:vendor/etc/gnss/gps.cfg
+endif
+
+BOARD_VENDOR_SEPOLICY_DIRS += device/google/gs-common/gps/brcm/sepolicy
+BOARD_VENDOR_SEPOLICY_DIRS += device/google/gs-common/gps/lsi/sepolicy
diff --git a/location/gnssd/init.gnss.rc b/location/gnssd/init.gnss.rc
index 1ead72a..3f311e1 100644
--- a/location/gnssd/init.gnss.rc
+++ b/location/gnssd/init.gnss.rc
@@ -17,6 +17,8 @@ on post-fs-data
     chown system system /dev/gnss_dump
     chmod 0660 /dev/gnss_boot
     chown system system /dev/gnss_boot
+    chmod 0660 /sys/devices/platform/gnssif/coredump
+    chown system system /sys/devices/platform/gnssif/coredump
 
 # GPS daemon
 service gnssd /vendor/bin/hw/gnssd
diff --git a/location/gnssd/pixel_gnss_hal.mk b/location/gnssd/pixel_gnss_hal.mk
new file mode 100644
index 0000000..977ba47
--- /dev/null
+++ b/location/gnssd/pixel_gnss_hal.mk
@@ -0,0 +1,12 @@
+# Enable aidl service
+$(call soong_config_set, pixel_gnss, enable_pixel_gnss_aidl_service, true)
+
+PRODUCT_PACKAGES += \
+    android.hardware.gnss-service.pixel
+
+PRODUCT_VENDOR_PROPERTIES += \
+    persist.vendor.gps.hal.service.name=vendor
+
+# Compatibility matrix
+DEVICE_PRODUCT_COMPATIBILITY_MATRIX_FILE += \
+    device/google/tegu/location/gnssd/device_framework_matrix_product.xml
diff --git a/location/gnssd/release/android.hardware.gnss-service b/location/gnssd/release/android.hardware.gnss-service
index 4790fd7..867f055 100644
Binary files a/location/gnssd/release/android.hardware.gnss-service and b/location/gnssd/release/android.hardware.gnss-service differ
diff --git a/location/gnssd/release/gnssd b/location/gnssd/release/gnssd
index 88fe6d7..20cc957 100644
Binary files a/location/gnssd/release/gnssd and b/location/gnssd/release/gnssd differ
diff --git a/location/gnssd/release/gps.cfg b/location/gnssd/release/gps.cfg
index 99b9fa0..41e474d 100644
--- a/location/gnssd/release/gps.cfg
+++ b/location/gnssd/release/gps.cfg
@@ -1,28 +1,40 @@
 ############################################
 GlueLayer_ToolConfigSelection=3
+debug_console=1
+debug_enable=4
+mem_dump_to_node=1
+force_instant_logging=0
 user_ports_tcp_name=Autotest
 user_ports_tcp_port=7555
-debug_console=1
 debug_dir=/data/vendor/gps/logs
 ############################################
 GlueLayer_IsGedKeyExist=1
-GlueLayer_isForceIPV6=0
 GlueLayer_EnableGnssCfgInterface=1
-debug_enable=1
+
 
 uni_log_max_file_count=5
 uni_log_max_size_mb=20
 uni_log_total_max_size_mb=100
 
+# to enable ism stream for GAAM
+ism_stream_enable=1
+caplay_port_tcp_port=@GNSS_ISM_CAPTURE_PLAYBACK
+
 gnss_device_type=K041
+gnss_device_patch_address=0
+gnss_device_patch_file=/vendor/firmware/kepler.bin
 
 # send debug req on MCW oddity
 #Chip_Configuration_Io_Options=0x85
 
+# Disable dynamic HSI
+Chip_Configuration_Dynamic_HSI=0
+
 # borrow this field to force CP crash on GAL bad ISM
 #Chip_Configuration_WT1=1
 
 # Chip_Configuration_TrackerDebugMode = 0x10
+GlueLayer_IsPlatformRefTimeEnable=1
 
 # enables CHPP for SPI port
 # uncomment the *chpp* lines below (and comment gnss_device-data_port_kepslim_present above) to use SPI+CHPP
@@ -39,6 +51,12 @@ scheduling_enabled=1
 ### temporarily disable precise time aiding ###
 Chip_Configuration_AidingConfiguration=0x00020046
 
+# VDR End condition (meter, meter, sec, sec)
+ChipCfg_VDR_high_end_Distance = 200
+ChipCfg_VDR_low_end_Distance = 200
+ChipCfg_VDR_high_end_Time = 20
+ChipCfg_VDR_low_end_Time = 20
+
 # set shared reference clock for freq aiding (0x20)
 # enable dcxo (0x04)
 Chip_Configuration_RefClkControl=0x24
@@ -79,12 +97,17 @@ Chip_Configuration_WatchdogPeriod = 0
 # GPS= 0x0001 GLO= 0x0002 GALILEO=0x0004 BEIDOU=0x0008 SBAS=0x0010 QZSS=0x0020
 # MEMS Static Detect=0x4000 MEMS Heading=0x2000
 ### 2C48 L1 only MCW ###
-Chip_Configuration_GNSSConstConstraintDef=0x603F
+Chip_Configuration_GNSSConstConstraintDef=0x602F
 Chip_Configuration_RfMiscCtrl=0x80008001
 
+# Disable BDS in the U.S.
+bdsUsedInUSPolicy=2
+sbasUsedInUSPolicy=2
+qzssUsedInUSPolicy=2
+navicUsedInUSPolicy=2
+
 # DVS: 0 = Disabled (default), 1 = Enabled
 # DFS: 0 = Disabled (default), 1 = Enabled
-# JJM: disabling due to suspicion that DVFS is contributing to GAL BAD ISM
 Chip_Configuration_FeatureCfg_DVS = 1
 Chip_Configuration_FeatureCfg_DFS = 1
 
@@ -120,7 +143,7 @@ rtc_min_num_of_fixes=10
 additional_rtc_uncertainty_ms=10
 
 # set to 1 for FW SGEE download - Requires Android FW to be properly configured
-Sif_UseFwXtraInterface=0
+Sif_UseFwXtraInterface=1
 
 # Low power configurations
 # ACT C/No loss limit: 0dB to 15dB (0 = ACT is disabled by default) 3dB = 50% Duty Cycle, 6dB = 25% Duty Cycle, 9dB = 12.5% Duty Cycle
@@ -128,6 +151,39 @@ Chip_Configuration_FeatureCfg_ACT = 5
 
 ChipCfg_DspMemdumpEnable=1
 
+Agnss_IsGloAidingEnable=0
+Agnss_SuplUseCpNi=1
+SETCaps_IsOtdoa=1
+SETCaps_IsLpp=1
+PosReq_Supl2Params_SuplNiUdpPort=7275
+GlueLayer_LPPCpBitmask=0x17
+GlueLayer_IsCpLteNeighborCellEnable=1
+GlueLayer_isReqDBHFromFwRefLoc=1
+GlueLayer_isReqUBPFromPressureSensor=1
+GlueLayer_IsMemsEnable=1
+GlueLayer_MeasCorrCap=7
+Chip_Configuration_mems_data_Configuration=5
+Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
+CP_LocTech_PrimaryConst=0
+CP_LocTech_Constraints=1
+CP_LocTech_Requirements=0
+UP_LocTech_PrimaryConst=0
+UP_LocTech_Constraints=1
+UP_LocTech_Requirements=0
+SpotLogger_Allowed=0
+
+RfPathLossDb_Ap=3500
+RfPathLossDb_Cp=3500
+NmeaBitmask=0x010003fff
+
+# force engine to use entire response time for emergency session; default 0
+IsUseEntireRespTime911=1
+# force engine to engage high accuracy if entire response time used; default 0
+isForceHighAccuracyMode=1
+
+# 0: Use calibrated Accel data 1: Use uncalibrated Accel data
+isUseUncalAccel=1
+
 GNSS_CARRIER_CONFIG_BEGIN
 # DEFAULT
 GNSS_CARRIER_ID=0
@@ -147,60 +203,57 @@ ENABLE_4G_UP_CAPS_MSA=1
 ENABLE_4G_UP_CAPS_MSB=1
 ENABLE_5G_UP_CAPS_MSA=0
 ENABLE_5G_UP_CAPS_MSB=0
+SUPL_SSL_METHOD=TLSv1_1
+SUPL_HMAC_HASH=SHA256
 SUPL_UT2_SEC=20
 SUPL_UT3_SEC=20
 ENABLE_LPP_CP=1
 ENABLE_LPP_UP=0
 ENABLE_LPPE_CP=3
 ENABLE_LPPE_UP=0
+ENABLE_NLP_IN_LPPE=1
+ENABLE_NLP_IN_AGNSS=0
+ENABLE_LPP_HA_GAD_SHAPE=0
+USE_EMER_PDN_FOR_EMER_SUPL=1
 # ATT
 GNSS_CARRIER_ID=1
 # TMO
 GNSS_CARRIER_ID=2
 ENABLE_3G_CP_CAPS_MSA=0
 ENABLE_4G_CP_CAPS_MSA=0
+ENABLE_NLP_IN_LPPE=0
+ENABLE_NLP_IN_AGNSS=1
+ENABLE_LPP_HA_GAD_SHAPE=1
 # VZW
 GNSS_CARRIER_ID=3
 ENABLE_LPP_UP=1
 ENABLE_LPPE_UP=3
-# VISIBLE
-GNSS_CARRIER_ID=4
-ENABLE_LPP_UP=1
-ENABLE_LPPE_UP=3
+SUPL_UT2_SEC=10
+SUPL_UT3_SEC=30
+SUPL_SSL_METHOD=TLSv1_2
 # AIRTEL
-GNSS_CARRIER_ID=5
+GNSS_CARRIER_ID=4
 # RAKUTEN
-GNSS_CARRIER_ID=6
+GNSS_CARRIER_ID=5
 ENABLE_LPP_UP=1
 ENABLE_LPPE_UP=3
 # KDDI
-GNSS_CARRIER_ID=7
+GNSS_CARRIER_ID=6
 ENABLE_LPP_CP=0
 ENABLE_LPP_UP=1
 ENABLE_LPPE_CP=0
 ENABLE_LPPE_UP=3
 # SBM
-GNSS_CARRIER_ID=8
+GNSS_CARRIER_ID=7
 ENABLE_LPP_CP=0
-ENABLE_LPP_UP=0
 ENABLE_LPPE_CP=0
-ENABLE_LPPE_UP=0
 ENABLE_5G_CP_CAPS_MSA=0
 ENABLE_5G_CP_CAPS_MSB=0
+USE_EMER_PDN_FOR_EMER_SUPL=0
+# DOCOMO
+GNSS_CARRIER_ID=8
+# LAB
+GNSS_CARRIER_ID=9
+ENABLE_LPP_UP=1
+ENABLE_LPPE_UP=3
 GNSS_CARRIER_CONFIG_END
-
-bdsUsedInUSPolicy=2
-sbasUsedInUSPolicy=2
-qzssUsedInUSPolicy=2
-navicUsedInUSPolicy=2
-
-Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
-GlueLayer_MeasCorrCap=7
-
-RfPathLossDb_Ap=3.5
-RfPathLossDb_Cp=3.5
-
-Agnss_SuplUseCpNi=1
-PosReq_Supl2Params_SuplNiUdpPort=7275
-
-NmeaBitmask=0x010003fff
diff --git a/location/gnssd/release/gps_user.cfg b/location/gnssd/release/gps_user.cfg
new file mode 100644
index 0000000..70b4f52
--- /dev/null
+++ b/location/gnssd/release/gps_user.cfg
@@ -0,0 +1,133 @@
+GlueLayer_ToolConfigSelection=3
+debug_console=0
+debug_enable=0
+mem_dump_to_node=0
+GlueLayer_IsGedKeyExist=1
+GlueLayer_EnableGnssCfgInterface=1
+ism_stream_enable=1
+caplay_port_tcp_port=@GNSS_ISM_CAPTURE_PLAYBACK
+gnss_device_type=K041
+gnss_device_patch_address=0
+gnss_device_patch_file=/vendor/firmware/kepler.bin
+Chip_Configuration_Dynamic_HSI=0
+GlueLayer_IsPlatformRefTimeEnable=1
+chpp_betp_client=1
+chpp_log_level=0
+gnss_device_data_port_chpp_spi_device=/dev/gnss_ipc
+gnss_device_data_port_chpp_present=1
+GlueLayer_YearOfHW=2023
+scheduling_enabled=1
+Chip_Configuration_AidingConfiguration=0x00020046
+ChipCfg_VDR_high_end_Distance = 200
+ChipCfg_VDR_low_end_Distance = 200
+ChipCfg_VDR_high_end_Time = 20
+ChipCfg_VDR_low_end_Time = 20
+Chip_Configuration_RefClkControl=0x24
+Chip_Configuration_DCXO_CrystalType=0x11
+spam_dog_ms=0
+Chip_Configuration_WatchdogPeriod = 0
+Chip_Configuration_GNSSConstConstraintDef=0x602F
+Chip_Configuration_RfMiscCtrl=0x80008001
+bdsUsedInUSPolicy=2
+sbasUsedInUSPolicy=2
+qzssUsedInUSPolicy=2
+navicUsedInUSPolicy=2
+Chip_Configuration_FeatureCfg_DVS = 1
+Chip_Configuration_FeatureCfg_DFS = 1
+mailboxDisabled=0x8
+gnss_rfic_chip_id=55200001
+UseRtcForAiding=1
+rtc_min_num_of_fixes=10
+additional_rtc_uncertainty_ms=10
+Sif_UseFwXtraInterface=1
+Chip_Configuration_FeatureCfg_ACT = 5
+ChipCfg_DspMemdumpEnable=1
+Agnss_IsGloAidingEnable=0
+Agnss_SuplUseCpNi=1
+SETCaps_IsOtdoa=1
+SETCaps_IsLpp=1
+PosReq_Supl2Params_SuplNiUdpPort=7275
+GlueLayer_LPPCpBitmask=0x17
+GlueLayer_IsCpLteNeighborCellEnable=1
+GlueLayer_isReqDBHFromFwRefLoc=1
+GlueLayer_isReqUBPFromPressureSensor=1
+GlueLayer_IsMemsEnable=1
+GlueLayer_MeasCorrCap=7
+Chip_Configuration_mems_data_Configuration=5
+Chip_Configuration_FeatureCfg_ANDRD_MEAS_CORR_ENABLE=1
+CP_LocTech_PrimaryConst=0
+CP_LocTech_Constraints=1
+CP_LocTech_Requirements=0
+UP_LocTech_PrimaryConst=0
+UP_LocTech_Constraints=1
+UP_LocTech_Requirements=0
+SpotLogger_Allowed=0
+RfPathLossDb_Ap=3500
+RfPathLossDb_Cp=3500
+NmeaBitmask=0x010003fff
+IsUseEntireRespTime911=1
+isForceHighAccuracyMode=1
+isUseUncalAccel=1
+GNSS_CARRIER_CONFIG_BEGIN
+GNSS_CARRIER_ID=0
+ENABLE_2G_CP_CAPS_MSA=1
+ENABLE_2G_CP_CAPS_MSB=1
+ENABLE_3G_CP_CAPS_MSA=1
+ENABLE_3G_CP_CAPS_MSB=1
+ENABLE_4G_CP_CAPS_MSA=1
+ENABLE_4G_CP_CAPS_MSB=1
+ENABLE_5G_CP_CAPS_MSA=1
+ENABLE_5G_CP_CAPS_MSB=1
+ENABLE_2G_UP_CAPS_MSA=1
+ENABLE_2G_UP_CAPS_MSB=1
+ENABLE_3G_UP_CAPS_MSA=1
+ENABLE_3G_UP_CAPS_MSB=1
+ENABLE_4G_UP_CAPS_MSA=1
+ENABLE_4G_UP_CAPS_MSB=1
+ENABLE_5G_UP_CAPS_MSA=0
+ENABLE_5G_UP_CAPS_MSB=0
+SUPL_SSL_METHOD=TLSv1_1
+SUPL_HMAC_HASH=SHA256
+SUPL_UT2_SEC=20
+SUPL_UT3_SEC=20
+ENABLE_LPP_CP=1
+ENABLE_LPP_UP=0
+ENABLE_LPPE_CP=3
+ENABLE_LPPE_UP=0
+ENABLE_NLP_IN_LPPE=1
+ENABLE_NLP_IN_AGNSS=0
+ENABLE_LPP_HA_GAD_SHAPE=0
+USE_EMER_PDN_FOR_EMER_SUPL=1
+GNSS_CARRIER_ID=1
+GNSS_CARRIER_ID=2
+ENABLE_3G_CP_CAPS_MSA=0
+ENABLE_4G_CP_CAPS_MSA=0
+ENABLE_NLP_IN_LPPE=0
+ENABLE_NLP_IN_AGNSS=1
+ENABLE_LPP_HA_GAD_SHAPE=1
+GNSS_CARRIER_ID=3
+ENABLE_LPP_UP=1
+ENABLE_LPPE_UP=3
+SUPL_UT2_SEC=10
+SUPL_UT3_SEC=30
+SUPL_SSL_METHOD=TLSv1_2
+GNSS_CARRIER_ID=4
+GNSS_CARRIER_ID=5
+ENABLE_LPP_UP=1
+ENABLE_LPPE_UP=3
+GNSS_CARRIER_ID=6
+ENABLE_LPP_CP=0
+ENABLE_LPP_UP=1
+ENABLE_LPPE_CP=0
+ENABLE_LPPE_UP=3
+GNSS_CARRIER_ID=7
+ENABLE_LPP_CP=0
+ENABLE_LPPE_CP=0
+ENABLE_5G_CP_CAPS_MSA=0
+ENABLE_5G_CP_CAPS_MSB=0
+USE_EMER_PDN_FOR_EMER_SUPL=0
+GNSS_CARRIER_ID=8
+GNSS_CARRIER_ID=9
+ENABLE_LPP_UP=1
+ENABLE_LPPE_UP=3
+GNSS_CARRIER_CONFIG_END
diff --git a/location/gnssd/release/kepler.bin b/location/gnssd/release/kepler.bin
new file mode 100644
index 0000000..971378c
Binary files /dev/null and b/location/gnssd/release/kepler.bin differ
diff --git a/perf/powerhint-tegu.json b/perf/powerhint-tegu.json
index 382cda6..0e39482 100644
--- a/perf/powerhint-tegu.json
+++ b/perf/powerhint-tegu.json
@@ -1,129 +1,13 @@
 {
   "Nodes": [
     {
-      "Name": "MemFreq",
-      "Path": "/sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/min_freq",
+      "Name": "GPUPowerOn",
+      "Path": "/sys/devices/platform/1f000000.mali/hint_power_on",
       "Values": [
-        "3744000",
-        "1352000",
-        "1014000",
-        "421000"
-      ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "IntFreq",
-      "Path": "/sys/devices/platform/17000020.devfreq_int/devfreq/17000020.devfreq_int/min_freq",
-      "Values": [
-        "533000",
-        "100000"
-      ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "DsuFreq",
-      "Path": "/sys/devices/platform/17000090.devfreq_dsu/devfreq/17000090.devfreq_dsu/min_freq",
-      "Values": [
-        "2150000",
-        "1328000",
-        "820000",
-        "324000"
-      ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "BCIFreq",
-      "Path": "/sys/devices/platform/170000a0.devfreq_bci/devfreq/170000a0.devfreq_bci/min_freq",
-      "Values": [
-        "1850000",
-        "1205000",
-        "840000",
-        "315000"
-      ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "CPULittleClusterMaxFreq",
-      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq",
-      "Values": [
-        "9999999",
-        "1098000",
-        "1475000",
-        "975000",
-        "1197000",
-        "1328000",
-        "1548000",
-        "1844000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": true
-    },
-    {
-      "Name": "CPULittleClusterMinFreq",
-      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq",
-      "Values": [
-        "9999999",
-        "1475000",
-        "1197000",
+        "1",
         "0"
       ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "CPUMidClusterMaxFreq",
-      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/scaling_max_freq",
-      "Values": [
-        "9999999",
-        "1082000",
-        "1221000",
-        "1418000",
-        "910000",
-        "1328000",
-        "1622000",
-        "1836000",
-        "1999000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": true
-    },
-    {
-      "Name": "CPUMidClusterMinFreq",
-      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/scaling_min_freq",
-      "Values": [
-        "9999999",
-        "1836000",
-        "1221000",
-        "0"
-      ],
-      "ResetOnInit": true
-    },
-    {
-      "Name": "CPUBigClusterMaxFreq",
-      "Path": "/sys/devices/system/cpu/cpu8/cpufreq/scaling_max_freq",
-      "Values": [
-        "9999999",
-        "893000",
-        "1328000",
-        "1852000",
-        "1164000",
-        "1557000",
-        "1745000",
-        "2049000",
-        "2409000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": true
-    },
-    {
-      "Name": "CPUBigClusterMinFreq",
-      "Path": "/sys/devices/system/cpu/cpu8/cpufreq/scaling_min_freq",
-      "Values": [
-        "9999999",
-        "1852000",
-        "1164000",
-        "0"
-      ],
-      "ResetOnInit": true
+      "WriteOnly": true
     },
     {
       "Name": "GPUMinFreq",
@@ -133,12 +17,192 @@
         "580000",
         "521000",
         "467000",
+        "419000",
         "376000",
         "302000",
         "150000"
       ],
       "ResetOnInit": true
     },
+    {
+      "Name": "MemFreq",
+      "Path": "/sys/devices/platform/17000010.devfreq_mif/devfreq/17000010.devfreq_mif/min_freq",
+      "Values": [
+        "9999999",
+        "1352000",
+        "1014000",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "IntFreq",
+      "Path": "/sys/devices/platform/17000020.devfreq_int/devfreq/17000020.devfreq_int/min_freq",
+      "Values": [
+        "9999999",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "DsuMinFreq",
+      "Path": "/sys/devices/platform/17000090.devfreq_dsu/devfreq/17000090.devfreq_dsu/min_freq",
+      "Values": [
+        "9999999",
+        "1800000",
+        "1548000",
+        "820000",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "DsuMaxFreq",
+      "Path": "/sys/devices/platform/17000090.devfreq_dsu/devfreq/17000090.devfreq_dsu/max_freq",
+      "Values": [
+        "9999999"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "BCIMinFreq",
+      "Path": "/sys/devices/platform/170000a0.devfreq_bci/devfreq/170000a0.devfreq_bci/min_freq",
+      "Values": [
+        "9999999",
+        "1401000",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPULittleClusterMaxFreq",
+      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/scaling_max_freq",
+      "Values": [
+        "9999999",
+        "1696000",
+        "1548000",
+        "1425000",
+        "1328000",
+        "1197000",
+        "955000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPULittleClusterMinFreq",
+      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/scaling_min_freq",
+      "Values": [
+        "9999999",
+        "1425000",
+        "1197000",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPULittleClusterDownRateLimitUs",
+      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/down_rate_limit_us",
+      "Values": [
+        "5000",
+        "2000",
+        "500"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUMidClusterMaxFreq",
+      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/scaling_max_freq",
+      "Values": [
+        "9999999",
+        "2367000",
+        "2245000",
+        "2130000",
+        "1945000",
+        "1795000",
+        "1549000",
+        "1328000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUMidClusterMinFreq",
+      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/scaling_min_freq",
+      "Values": [
+        "9999999",
+        "2245000",
+        "2130000",
+        "1795000",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUMidClusterDownRateLimitUs",
+      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/down_rate_limit_us",
+      "Values": [
+        "20000",
+        "3000",
+        "2000",
+        "500"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUBigClusterMaxFreq",
+      "Path": "/sys/devices/system/cpu/cpu7/cpufreq/scaling_max_freq",
+      "Values": [
+        "9999999",
+        "2802000",
+        "2687000",
+        "2499000",
+        "2294000",
+        "2147000",
+        "1999000",
+        "1885000",
+        "1557000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUBigClusterMinFreq",
+      "Path": "/sys/devices/system/cpu/cpu7/cpufreq/scaling_min_freq",
+      "Values": [
+        "9999999",
+        "2687000",
+        "2499000",
+        "2294000",
+        "1885000",
+        "0"
+      ],
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUBigClusterDownRateLimitUs",
+      "Path": "/sys/devices/system/cpu/cpu7/cpufreq/sched_pixel/down_rate_limit_us",
+      "Values": [
+        "20000",
+        "3000",
+        "2000",
+        "500"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "GPUDvfsPeriod",
+      "Path": "/sys/devices/platform/1f000000.mali/dvfs_period",
+      "Values": [
+        "10",
+        "20"
+      ],
+      "ResetOnInit": true
+    },
     {
       "Name": "ReducePreferIdle",
       "Path": "/proc/vendor_sched/reduce_prefer_idle",
@@ -148,6 +212,26 @@
       ],
       "ResetOnInit": true
     },
+    {
+      "Name": "BigClusterPowerDownTargetResidency",
+      "Path": "/sys/devices/platform/cpupm/cpupm/cpd_cl2_target_residency",
+      "Values": [
+        "750000",
+        "10000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "MidClusterPowerDownTargetResidency",
+      "Path": "/sys/devices/platform/cpupm/cpupm/cpd_cl1_target_residency",
+      "Values": [
+        "750000",
+        "10000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
     {
       "Name": "CPUUtilThreshold",
       "Path": "/proc/vendor_sched/util_threshold",
@@ -158,11 +242,51 @@
       "DefaultIndex": 0,
       "ResetOnInit": true
     },
+    {
+      "Name": "CPUDVFSHeadroom",
+      "Path": "/proc/vendor_sched/dvfs_headroom",
+      "Values": [
+        "1280",
+        "1100"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUTaperedDVFSHeadroomEnable",
+      "Path": "/proc/vendor_sched/tapered_dvfs_headroom_enable",
+      "Values": [
+        "0",
+        "1"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "CPUUClampMaxFilterEnable",
+      "Path": "/proc/vendor_sched/uclamp_max_filter_enable",
+      "Values": [
+        "1",
+        "0"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "BGUClampMaxBoost",
+      "Path": "/proc/vendor_sched/groups/bg/uclamp_max",
+      "Values": [
+        "130",
+        "512"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
     {
       "Name": "CAMUClampBoost",
       "Path": "/proc/vendor_sched/groups/cam/uclamp_min",
       "Values": [
-        "612",
+        "765",
         "0"
       ],
       "ResetOnInit": true
@@ -171,7 +295,7 @@
       "Name": "TAUClampBoost",
       "Path": "/proc/vendor_sched/groups/ta/uclamp_min",
       "Values": [
-        "612",
+        "765",
         "1"
       ],
       "ResetOnInit": true
@@ -189,8 +313,8 @@
       "Name": "MLUclampBoost",
       "Path": "/proc/vendor_sched/groups/nnapi/uclamp_min",
       "Values": [
-          "180",
-          "650"
+          "225",
+          "812"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": true
@@ -208,8 +332,18 @@
       "Name": "CDPreferIdle",
       "Path": "/proc/vendor_sched/groups/cam/prefer_idle",
       "Values": [
-        "0",
-        "1"
+        "1",
+        "0"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "FGCpuset",
+      "Path": "/dev/cpuset/foreground/cpus",
+      "Values": [
+        "0-5",
+        "0-6"
       ],
       "ResetOnInit": true
     },
@@ -218,9 +352,10 @@
       "Path": "/dev/cpuset/camera-daemon/cpus",
       "Values": [
         "0-3",
-        "4-8",
-        "0-7",
-        "0-8"
+        "4-7",
+        "4-6",
+        "0-6",
+        "0-7"
       ],
       "ResetOnInit": true
     },
@@ -229,8 +364,8 @@
       "Path": "/dev/cpuset/camera-daemon-high-group/cpus",
       "Values": [
         "0-3",
-        "8",
-        "0-8"
+        "7",
+        "0-7"
       ],
       "ResetOnInit": true
     },
@@ -239,8 +374,9 @@
       "Path": "/dev/cpuset/camera-daemon-mid-group/cpus",
       "Values": [
         "0-3",
+        "4-6",
         "4-7",
-        "0-8"
+        "0-7"
       ],
       "ResetOnInit": true
     },
@@ -249,8 +385,9 @@
       "Path": "/dev/cpuset/camera-daemon-mid-high-group/cpus",
       "Values": [
         "0-3",
-        "4-8",
-        "0-8"
+        "4-6",
+        "4-7",
+        "0-7"
       ],
       "ResetOnInit": true
     },
@@ -267,9 +404,10 @@
       "Name": "TAPreferIdle",
       "Path": "/proc/vendor_sched/groups/ta/prefer_idle",
       "Values": [
-        "0",
-        "1"
+        "1",
+        "0"
       ],
+      "DefaultIndex": 0,
       "ResetOnInit": true
     },
     {
@@ -295,8 +433,8 @@
       "Name": "NPITaskPacking",
       "Path": "/proc/vendor_sched/npi_packing",
       "Values": [
-        "0",
-        "1"
+        "1",
+        "0"
       ],
       "ResetOnInit": true
     },
@@ -342,135 +480,87 @@
       "Path": "/sys/devices/platform/17000030.devfreq_intcam/devfreq/17000030.devfreq_intcam/min_freq",
       "Values": [
         "664000",
+        "233000",
         "67000"
       ],
       "ResetOnInit": true
     },
+    {
+      "Name": "TNRMaxFreq",
+      "Path": "/sys/devices/platform/17000060.devfreq_tnr/devfreq/17000060.devfreq_tnr/max_freq",
+      "Values": [
+        "664000",
+        "111000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
     {
       "Name": "TNRFreq",
       "Path": "/sys/devices/platform/17000060.devfreq_tnr/devfreq/17000060.devfreq_tnr/min_freq",
       "Values": [
         "664000",
+        "233000",
         "67000"
       ],
       "ResetOnInit": true
     },
     {
-      "Name": "BigControlTempSet",
-      "Path": "/dev/thermal/tz-by-name/BIG/trip_point_2_temp",
+      "Name": "BigTjOffset",
+      "Path": "/sys/devices/platform/100a0000.BIG/offset_enabled",
       "Values": [
-        "100000",
-        "80000"
+        "0",
+        "1"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": false
     },
     {
-      "Name": "MidControlTempSet",
-      "Path": "/dev/thermal/tz-by-name/MID/trip_point_2_temp",
+      "Name": "MidTjOffset",
+      "Path": "/sys/devices/platform/100a0000.MID/offset_enabled",
       "Values": [
-        "100000",
-        "80000"
+        "0",
+        "1"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": false
     },
     {
-      "Name": "LittleControlTempSet",
-      "Path": "/dev/thermal/tz-by-name/LITTLE/trip_point_2_temp",
+      "Name": "LittleTjOffset",
+      "Path": "/sys/devices/platform/100a0000.LITTLE/offset_enabled",
       "Values": [
-        "100000",
-        "80000"
+        "0",
+        "1"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": false
     },
     {
-      "Name": "G3dControlTempSet",
-      "Path": "/dev/thermal/tz-by-name/G3D/trip_point_2_temp",
+      "Name": "G3dTjOffset",
+      "Path": "/sys/devices/platform/100b0000.G3D/offset_enabled",
       "Values": [
-        "100000",
-        "80000"
+        "0",
+        "1"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": false
     },
     {
-      "Name": "TpuControlTempSet",
-      "Path": "/dev/thermal/tz-by-name/TPU/trip_point_2_temp",
+      "Name": "TpuTjOffset",
+      "Path": "/sys/devices/platform/100b0000.TPU/offset_enabled",
       "Values": [
-        "100000",
-        "80000"
+        "0",
+        "1"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": false
     },
     {
-      "Name": "AurControlTempSet",
-      "Path": "/dev/thermal/tz-by-name/AUR/trip_point_2_temp",
+      "Name": "AurTjOffset",
+      "Path": "/sys/devices/platform/100b0000.AUR/offset_enabled",
       "Values": [
-        "100000",
-        "80000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": false
-    },
-    {
-      "Name": "BigSwitchOnTempSet",
-      "Path": "/dev/thermal/tz-by-name/BIG/trip_point_1_temp",
-      "Values": [
-        "80000",
-        "60000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": false
-    },
-    {
-      "Name": "MidSwitchOnTempSet",
-      "Path": "/dev/thermal/tz-by-name/MID/trip_point_1_temp",
-      "Values": [
-        "80000",
-        "60000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": false
-    },
-    {
-      "Name": "LittleSwitchOnTempSet",
-      "Path": "/dev/thermal/tz-by-name/LITTLE/trip_point_1_temp",
-      "Values": [
-        "80000",
-        "60000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": false
-    },
-    {
-      "Name": "G3dSwitchOnTempSet",
-      "Path": "/dev/thermal/tz-by-name/G3D/trip_point_1_temp",
-      "Values": [
-        "80000",
-        "60000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": false
-    },
-    {
-      "Name": "TpuSwitchOnTempSet",
-      "Path": "/dev/thermal/tz-by-name/TPU/trip_point_1_temp",
-      "Values": [
-        "80000",
-        "60000"
-      ],
-      "DefaultIndex": 0,
-      "ResetOnInit": false
-    },
-    {
-      "Name": "AurSwitchOnTempSet",
-      "Path": "/dev/thermal/tz-by-name/AUR/trip_point_1_temp",
-      "Values": [
-        "80000",
-        "60000"
+        "0",
+        "1"
       ],
       "DefaultIndex": 0,
       "ResetOnInit": false
@@ -532,13 +622,24 @@
       "Path": "/sys/kernel/pixel_em/active_profile",
       "Values": [
         "default",
-        "cam1"
+        "cam1",
+        "cam2"
       ],
       "DefaultIndex": 0
     },
+    {
+      "Name": "PMU_LIT_LIMIT_FREQ",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy0/sched_pixel/limit_frequency",
+      "Values": [
+        "1328000",
+        "1098000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
     {
       "Name": "PMU_LIT_LCPI_THRESHOLD",
-      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/lcpi_threshold",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy0/sched_pixel/lcpi_threshold",
       "Values": [
         "2",
         "0"
@@ -547,55 +648,71 @@
     },
     {
       "Name": "PMU_LIT_SPC_THRESHOLD",
-      "Path": "/sys/devices/system/cpu/cpu0/cpufreq/sched_pixel/spc_threshold",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy0/sched_pixel/spc_threshold",
       "Values": [
         "70",
+        "42",
+        "35",
+        "30",
+        "20",
         "0"
       ],
       "DefaultIndex": 0
     },
     {
-      "Name": "PMU_MID_LCPI_THRESHOLD",
-      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/lcpi_threshold",
+      "Name": "PMU_MID_LIMIT_FREQ",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/limit_frequency",
+      "Values": [
+        "1795000",
+        "1328000"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "PMU_MID_LCPI_THRESHOLD",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/lcpi_threshold",
       "Values": [
-        "6",
         "3"
       ],
       "DefaultIndex": 0
     },
     {
       "Name": "PMU_MID_SPC_THRESHOLD",
-      "Path": "/sys/devices/system/cpu/cpu4/cpufreq/sched_pixel/spc_threshold",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy4/sched_pixel/spc_threshold",
       "Values": [
-        "65",
-        "50"
+        "50",
+        "30",
+        "20",
+        "18"
       ],
       "DefaultIndex": 0
     },
     {
       "Name": "PMU_BIG_LIMIT_FREQ",
-      "Path": "/sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/limit_frequency",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy7/sched_pixel/limit_frequency",
       "Values": [
-        "2556000",
-        "1852000"
+        "2363000",
+        "1885000",
+        "1298000"
       ],
       "DefaultIndex": 0
     },
     {
       "Name": "PMU_BIG_LCPI_THRESHOLD",
-      "Path": "/sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/lcpi_threshold",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy7/sched_pixel/lcpi_threshold",
       "Values": [
-        "5",
         "3"
       ],
       "DefaultIndex": 0
     },
     {
       "Name": "PMU_BIG_SPC_THRESHOLD",
-      "Path": "/sys/devices/system/cpu/cpu8/cpufreq/sched_pixel/spc_threshold",
+      "Path": "/sys/devices/system/cpu/cpufreq/policy7/sched_pixel/spc_threshold",
       "Values": [
-        "69",
-        "50"
+        "50",
+        "22",
+        "20"
       ],
       "DefaultIndex": 0
     },
@@ -616,10 +733,53 @@
       "Path": "vendor.powerhal.dalvik.vm.dex2oat-cpu-set",
       "Values": [
         "0,1,2,3",
-        "0,1,2,3,4,5,6,7",
-        "0,1,2,3,4,5,6,7,8"
+        "0,1,2,3,4,5,6",
+        "0,1,2,3,4,5,6,7"
       ],
       "Type": "Property"
+    },
+    {
+      "Name": "Dex2oatGroup",
+      "Path": "/proc/vendor_sched/groups/dex2oat/ug",
+      "Values": [
+        "1",
+        "0"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true
+    },
+    {
+      "Name": "VIRTUAL-SKIN-CPU-MID",
+      "Path": "vendor.thermal.VIRTUAL-SKIN-CPU-MID.profile",
+      "Values": [
+        "",
+        "game",
+        "camera"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true,
+      "Type": "Property"
+    },
+    {
+      "Name": "VIRTUAL-SKIN-CPU-HIGH",
+      "Path": "vendor.thermal.VIRTUAL-SKIN-CPU-HIGH.profile",
+      "Values": [
+        "",
+        "game",
+        "camera"
+      ],
+      "DefaultIndex": 0,
+      "ResetOnInit": true,
+      "Type": "Property"
+    },
+    {
+      "Name": "MIFTargetLoad",
+      "Path": "/sys/class/devfreq/17000010.devfreq_mif/interactive/target_load",
+      "Values": [
+        "20 80",
+        "20 40"
+      ],
+      "ResetOnInit": true
     }
   ],
   "Actions": [
@@ -653,11 +813,16 @@
       "Duration": 5000,
       "Value": "0"
     },
+    {
+      "PowerHint": "LAUNCH_GPU",
+      "Node": "GPUDvfsPeriod",
+      "Duration": 1000,
+      "Value": "10"
+    },
     {
       "PowerHint": "LAUNCH",
-      "Node": "FGPreferIdle",
-      "Duration": 5000,
-      "Value": "1"
+      "Type": "DoHint",
+      "Value": "LAUNCH_GPU"
     },
     {
       "PowerHint": "LAUNCH",
@@ -677,11 +842,23 @@
       "Duration": 5000,
       "Value": "9999999"
     },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "CPUUClampMaxFilterEnable",
+      "Duration": 5000,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "BGUClampMaxBoost",
+      "Duration": 5000,
+      "Value": "512"
+    },
     {
       "PowerHint": "LAUNCH",
       "Node": "TAUClampBoost",
       "Duration": 5000,
-      "Value": "612"
+      "Value": "765"
     },
     {
       "PowerHint": "LAUNCH",
@@ -693,13 +870,19 @@
       "PowerHint": "LAUNCH",
       "Node": "MemFreq",
       "Duration": 5000,
-      "Value": "3744000"
+      "Value": "9999999"
     },
     {
       "PowerHint": "LAUNCH",
-      "Node": "NPITaskPacking",
+      "Node": "DsuMinFreq",
       "Duration": 5000,
-      "Value": "0"
+      "Value": "1800000"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "BCIMinFreq",
+      "Duration": 5000,
+      "Value": "1401000"
     },
     {
       "PowerHint": "LAUNCH",
@@ -709,26 +892,109 @@
     {
       "PowerHint": "LAUNCH",
       "Type": "DoHint",
-      "EnableProperty": "vendor.powerhal.camerarunning",
-      "Value": "CDCPUSET_RESTRICTED"
+      "Value": "LAUNCH_EXTEND"
     },
     {
       "PowerHint": "LAUNCH",
-      "Type": "DoHint",
-      "EnableProperty": "vendor.powerhal.camerarunning",
-      "Value": "CDHIGHCPUSETCPUS_RESTRICTED"
+      "Node": "CPUDVFSHeadroom",
+      "Duration": 5000,
+      "Value": "1280"
     },
     {
       "PowerHint": "LAUNCH",
-      "Type": "DoHint",
-      "EnableProperty": "vendor.powerhal.camerarunning",
-      "Value": "CDMIDCPUSETCPUS_RESTRICTED"
+      "Node": "CPUTaperedDVFSHeadroomEnable",
+      "Duration": 5000,
+      "Value": "0"
     },
     {
       "PowerHint": "LAUNCH",
-      "Type": "DoHint",
-      "EnableProperty": "vendor.powerhal.camerarunning",
-      "Value": "CDMIDHIGHCPUSETCPUS_RESTRICTED"
+      "Node": "CPULittleClusterDownRateLimitUs",
+      "Duration": 5000,
+      "Value": "5000"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "CPUMidClusterDownRateLimitUs",
+      "Duration": 5000,
+      "Value": "20000"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "CPUBigClusterDownRateLimitUs",
+      "Duration": 5000,
+      "Value": "20000"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "TAPreferIdle",
+      "Duration": 5000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LAUNCH",
+      "Node": "FGPreferIdle",
+      "Duration": 5000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 2000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 2000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPULittleClusterMaxFreq",
+      "Duration": 2000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUDVFSHeadroom",
+      "Duration": 2000,
+      "Value": "1280"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUTaperedDVFSHeadroomEnable",
+      "Duration": 2000,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPULittleClusterDownRateLimitUs",
+      "Duration": 2000,
+      "Value": "5000"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUMidClusterDownRateLimitUs",
+      "Duration": 2000,
+      "Value": "20000"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "CPUBigClusterDownRateLimitUs",
+      "Duration": 2000,
+      "Value": "20000"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "TAPreferIdle",
+      "Duration": 2000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LAUNCH_EXTEND",
+      "Node": "FGPreferIdle",
+      "Duration": 2000,
+      "Value": "1"
     },
     {
       "PowerHint": "LAUNCH_PMU",
@@ -736,6 +1002,18 @@
       "Duration": 3000,
       "Value": "0"
     },
+    {
+      "PowerHint": "CPU_LOAD_RESET",
+      "Node": "GPUPowerOn",
+      "Duration": 10,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CPU_LOAD_RESET",
+      "Node": "GPUMinFreq",
+      "Duration": 50,
+      "Value": "302000"
+    },
     {
       "PowerHint": "CPU_LOAD_RESET",
       "Node": "MemFreq",
@@ -744,15 +1022,86 @@
     },
     {
       "PowerHint": "CPU_LOAD_RESET",
-      "Node": "DsuFreq",
+      "Node": "DsuMaxFreq",
+      "Duration": 33,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "CPU_LOAD_RESET",
+      "Node": "DsuMinFreq",
       "Duration": 33,
       "Value": "820000"
     },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "CPULittleClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "500"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "CPUMidClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "500"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "CPUBigClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "500"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Type": "EndHint",
+      "Value": "DISPLAY_UPDATE_IMMINENT"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "BigClusterPowerDownTargetResidency",
+      "Duration": 0,
+      "Value": "10000"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "MidClusterPowerDownTargetResidency",
+      "Duration": 0,
+      "Value": "10000"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "TAPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "DISPLAY_INACTIVE",
+      "Node": "FGPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH",
+      "Node": "CPU_BIG_TSKIN_BYPASS",
+      "Duration": 1000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH",
+      "Node": "CPU_MID_TSKIN_BYPASS",
+      "Duration": 1000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH",
+      "Node": "CPU_LITTLE_TSKIN_BYPASS",
+      "Duration": 1000,
+      "Value": "1"
+    },
     {
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "MemFreq",
       "Duration": 1000,
-      "Value": "3744000"
+      "Value": "9999999"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -764,7 +1113,7 @@
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CPUBigClusterMinFreq",
       "Duration": 1000,
-      "Value": "1852000"
+      "Value": "1885000"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -776,7 +1125,7 @@
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CPUMidClusterMinFreq",
       "Duration": 1000,
-      "Value": "1836000"
+      "Value": "1795000"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -788,25 +1137,19 @@
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CPULittleClusterMinFreq",
       "Duration": 1000,
-      "Value": "1475000"
+      "Value": "1425000"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CAMUClampBoost",
       "Duration": 1000,
-      "Value": "612"
+      "Value": "765"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
       "Node": "CDCpuset",
       "Duration": 1000,
-      "Value": "4-8"
-    },
-    {
-      "PowerHint": "CAMERA_LAUNCH",
-      "Node": "NPITaskPacking",
-      "Duration": 1000,
-      "Value": "0"
+      "Value": "4-7"
     },
     {
       "PowerHint": "CAMERA_LAUNCH",
@@ -814,6 +1157,36 @@
       "Duration": 1000,
       "Value": "0"
     },
+    {
+      "PowerHint": "CAMERA_LAUNCH",
+      "Node": "CDPreferIdle",
+      "Duration": 1000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH",
+      "Node": "FGCpuset",
+      "Duration": 1000,
+      "Value": "0-5"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH_EXTENDED",
+      "Node": "CPU_BIG_TSKIN_BYPASS",
+      "Duration": 2000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH_EXTENDED",
+      "Node": "CPU_MID_TSKIN_BYPASS",
+      "Duration": 2000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_LAUNCH_EXTENDED",
+      "Node": "CPU_LITTLE_TSKIN_BYPASS",
+      "Duration": 2000,
+      "Value": "1"
+    },
     {
       "PowerHint": "CAMERA_LAUNCH_EXTENDED",
       "Node": "CPUBigClusterMaxFreq",
@@ -832,12 +1205,6 @@
       "Duration": 2000,
       "Value": "9999999"
     },
-    {
-      "PowerHint": "CAMERA_LAUNCH_EXTENDED",
-      "Node": "NPITaskPacking",
-      "Duration": 2000,
-      "Value": "0"
-    },
     {
       "PowerHint": "CAMERA_LAUNCH_EXTENDED",
       "Node": "PMU_POLL",
@@ -845,94 +1212,58 @@
       "Value": "0"
     },
     {
-      "PowerHint": "CAMERA_THERMAL_CPU_THROTTLE",
-      "Node": "CPUBigClusterMaxFreq",
-      "Duration": 1000,
-      "Value": "893000"
-    },
-    {
-      "PowerHint": "CAMERA_THERMAL_CPU_THROTTLE",
-      "Node": "CPUMidClusterMaxFreq",
-      "Duration": 1000,
-      "Value": "1082000"
-    },
-    {
-      "PowerHint": "CAMERA_THERMAL_CPU_THROTTLE",
-      "Node": "CPULittleClusterMaxFreq",
-      "Duration": 1000,
-      "Value": "1098000"
+      "PowerHint": "CAMERA_LAUNCH_EXTENDED",
+      "Node": "FGCpuset",
+      "Duration": 2000,
+      "Value": "0-5"
     },
     {
       "PowerHint": "CAMERA_CAPTURE_CPU_THROTTLE",
       "Node": "CPUBigClusterMaxFreq",
-      "Duration": 2500,
-      "Value": "1557000"
+      "Duration": 3000,
+      "Value": "1885000"
     },
     {
       "PowerHint": "CAMERA_CAPTURE_CPU_THROTTLE",
       "Node": "CPUMidClusterMaxFreq",
-      "Duration": 2500,
-      "Value": "1221000"
+      "Duration": 3000,
+      "Value": "1549000"
     },
     {
       "PowerHint": "CAMERA_CAPTURE_CPU_THROTTLE",
       "Node": "CPULittleClusterMaxFreq",
-      "Duration": 2500,
-      "Value": "1475000"
+      "Duration": 3000,
+      "Value": "1425000"
     },
     {
       "PowerHint": "CAMERA_CAPTURE_CPU_THROTTLE",
       "Node": "PMU_POLL",
-      "Duration": 2500,
+      "Duration": 3000,
       "Value": "0"
     },
     {
-      "PowerHint": "CAMERA_CAPTURE_CPU_THROTTLE",
-      "Node": "EM_Profile",
-      "Duration": 2500,
-      "Value": "default"
+      "PowerHint": "CAMERA_SHOT",
+      "Node": "PMU_POLL",
+      "Duration": 100,
+      "Value": "0"
     },
     {
       "PowerHint": "CAMERA_SHOT",
-      "Node": "MemFreq",
-      "Duration": 300,
-      "Value": "3744000"
-    },
-    {
-      "PowerHint": "CAMERA_SHOT",
-      "Node": "CPUBigClusterMaxFreq",
-      "Duration": 300,
-      "Value": "9999999"
-    },
-    {
-      "PowerHint": "CAMERA_SHOT",
-      "Node": "CPUBigClusterMinFreq",
-      "Duration": 300,
-      "Value": "9999999"
-    },
-    {
-      "PowerHint": "CAMERA_SHOT",
-      "Node": "CPUMidClusterMaxFreq",
-      "Duration": 300,
-      "Value": "9999999"
-    },
-    {
-      "PowerHint": "CAMERA_SHOT",
-      "Node": "CPUMidClusterMinFreq",
-      "Duration": 300,
-      "Value": "9999999"
+      "Node": "CAMUClampBoost",
+      "Duration": 100,
+      "Value": "765"
     },
     {
       "PowerHint": "CAMERA_BACKEND_BOOST",
       "Node": "MemFreq",
       "Duration": 1000,
-      "Value": "3744000"
+      "Value": "9999999"
     },
     {
       "PowerHint": "CAMERA_BACKEND_BOOST",
       "Node": "IntFreq",
       "Duration": 1000,
-      "Value": "533000"
+      "Value": "9999999"
     },
     {
       "PowerHint": "CAMERA_BACKEND_BOOST",
@@ -946,6 +1277,120 @@
       "Duration": 1000,
       "Value": "664000"
     },
+    {
+      "PowerHint": "CAMERA_ZOOMING_BOOST",
+      "Node": "CDPreferIdle",
+      "Duration": 100,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_ZOOMING_BOOST",
+      "Node": "PMU_POLL",
+      "Duration": 100,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK1",
+      "Node": "TAPreferHighCap",
+      "Duration": 3000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK1",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "2687000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK1",
+      "Node": "CPUBigClusterMinFreq",
+      "Duration": 3000,
+      "Value": "2687000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK2",
+      "Node": "TAPreferHighCap",
+      "Duration": 3000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK2",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "2499000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK2",
+      "Node": "CPUBigClusterMinFreq",
+      "Duration": 3000,
+      "Value": "2499000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK3",
+      "Node": "TAPreferHighCap",
+      "Duration": 3000,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK3",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "2294000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_BIGCPU_RANK3",
+      "Node": "CPUBigClusterMinFreq",
+      "Duration": 3000,
+      "Value": "2294000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_MIDCPU_RANK1",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_MIDCPU_RANK1",
+      "Node": "CPUMidClusterMinFreq",
+      "Duration": 3000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_MIDCPU_RANK2",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "2245000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_MIDCPU_RANK2",
+      "Node": "CPUMidClusterMinFreq",
+      "Duration": 3000,
+      "Value": "2245000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_MIDCPU_RANK3",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "2130000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_MIDCPU_RANK3",
+      "Node": "CPUMidClusterMinFreq",
+      "Duration": 3000,
+      "Value": "2130000"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_LITTLECPU_RANK1",
+      "Node": "CPULittleClusterMaxFreq",
+      "Duration": 3000,
+      "Value": "9999999"
+    },
+    {
+      "PowerHint": "GCA_CAMERA_SHOT_LITTLECPU_RANK1",
+      "Node": "CPULittleClusterMinFreq",
+      "Duration": 3000,
+      "Value": "9999999"
+    },
     {
       "PowerHint": "GCA_CAMERA_SHOT_BIGCPU",
       "Node": "TAPreferHighCap",
@@ -1050,28 +1495,82 @@
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CPULittleClusterMaxFreq",
+      "Node": "PMU_LIT_LIMIT_FREQ",
       "Duration": 0,
-      "Value": "1475000"
+      "Value": "1098000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CPUMidClusterMaxFreq",
+      "Node": "PMU_LIT_LCPI_THRESHOLD",
       "Duration": 0,
-      "Value": "1622000"
+      "Value": "0"
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CPUBigClusterMaxFreq",
+      "Node": "PMU_LIT_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "1852000"
+      "Value": "20"
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "CDPreferHighCap",
+      "Node": "PMU_MID_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1328000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PMU_MID_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "3"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PMU_MID_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "30"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PMU_BIG_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1298000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PMU_BIG_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "3"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PMU_BIG_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "20"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "PMU_POLL",
       "Duration": 0,
       "Value": "1"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "EM_Profile",
+      "Duration": 0,
+      "Value": "cam2"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "CPUDVFSHeadroom",
+      "Duration": 0,
+      "Value": "1100"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "CPUUtilThreshold",
+      "Duration": 0,
+      "Value": "1100"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
       "Node": "MemFreq",
@@ -1094,7 +1593,7 @@
       "PowerHint": "CAMERA_STREAMING_EXTREME",
       "Node": "CDHighCpusetCpus",
       "Duration": 0,
-      "Value": "8"
+      "Value": "7"
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
@@ -1106,7 +1605,7 @@
       "PowerHint": "CAMERA_STREAMING_EXTREME",
       "Node": "CDMidHighCpusetCpus",
       "Duration": 0,
-      "Value": "4-8"
+      "Value": "4-7"
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
@@ -1116,9 +1615,15 @@
     },
     {
       "PowerHint": "CAMERA_STREAMING_EXTREME",
-      "Node": "NPITaskPacking",
+      "Node": "VIRTUAL-SKIN-CPU-MID",
       "Duration": 0,
-      "Value": "0"
+      "Value": "camera"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_EXTREME",
+      "Node": "VIRTUAL-SKIN-CPU-HIGH",
+      "Duration": 0,
+      "Value": "camera"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
@@ -1126,6 +1631,18 @@
       "Duration": 0,
       "Value": "1"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "DsuMinFreq",
+      "Duration": 0,
+      "Value": "820000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_LIT_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1098000"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "PMU_LIT_LCPI_THRESHOLD",
@@ -1136,7 +1653,13 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "PMU_LIT_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "0"
+      "Value": "35"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "PMU_MID_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1328000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
@@ -1148,13 +1671,13 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "PMU_MID_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "50"
+      "Value": "20"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "PMU_BIG_LIMIT_FREQ",
       "Duration": 0,
-      "Value": "1852000"
+      "Value": "1298000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
@@ -1166,19 +1689,19 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "PMU_BIG_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "50"
+      "Value": "20"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "PMU_POLL",
       "Duration": 0,
-      "Value": "0"
+      "Value": "1"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "EM_Profile",
       "Duration": 0,
-      "Value": "cam1"
+      "Value": "cam2"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
@@ -1186,29 +1709,29 @@
       "Duration": 0,
       "Value": "1100"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_HIGH",
+      "Node": "CPUDVFSHeadroom",
+      "Duration": 0,
+      "Value": "1100"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "CDPreferHighCap",
       "Duration": 0,
-      "Value": "1"
+      "Value": "0"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CPUBigClusterMaxFreq",
+      "Node": "CDPreferIdle",
       "Duration": 0,
-      "Value": "1852000"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CPUMidClusterMaxFreq",
-      "Duration": 0,
-      "Value": "1622000"
+      "Value": "0"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "CPULittleClusterMaxFreq",
       "Duration": 0,
-      "Value": "1475000"
+      "Value": "1548000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
@@ -1232,7 +1755,7 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "CDHighCpusetCpus",
       "Duration": 0,
-      "Value": "8"
+      "Value": "7"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
@@ -1244,19 +1767,19 @@
       "PowerHint": "CAMERA_STREAMING_HIGH",
       "Node": "CDMidHighCpusetCpus",
       "Duration": 0,
-      "Value": "4-8"
+      "Value": "4-6"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "CDCpuset",
+      "Node": "VIRTUAL-SKIN-CPU-MID",
       "Duration": 0,
-      "Value": "0-7"
+      "Value": "camera"
     },
     {
       "PowerHint": "CAMERA_STREAMING_HIGH",
-      "Node": "NPITaskPacking",
+      "Node": "VIRTUAL-SKIN-CPU-HIGH",
       "Duration": 0,
-      "Value": "0"
+      "Value": "camera"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
@@ -1264,6 +1787,12 @@
       "Duration": 0,
       "Value": "1"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "PMU_LIT_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1098000"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "PMU_LIT_LCPI_THRESHOLD",
@@ -1274,7 +1803,13 @@
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "PMU_LIT_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "0"
+      "Value": "42"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "PMU_MID_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1328000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
@@ -1286,13 +1821,13 @@
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "PMU_MID_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "50"
+      "Value": "18"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "PMU_BIG_LIMIT_FREQ",
       "Duration": 0,
-      "Value": "1852000"
+      "Value": "1298000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
@@ -1304,13 +1839,13 @@
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "PMU_BIG_SPC_THRESHOLD",
       "Duration": 0,
-      "Value": "50"
+      "Value": "22"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "PMU_POLL",
       "Duration": 0,
-      "Value": "0"
+      "Value": "1"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
@@ -1324,36 +1859,42 @@
       "Duration": 0,
       "Value": "1"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "CDPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "TAPreferHighCap",
       "Duration": 0,
       "Value": "1"
     },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CPUBigClusterMaxFreq",
-      "Duration": 0,
-      "Value": "1852000"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CPUMidClusterMaxFreq",
-      "Duration": 0,
-      "Value": "1622000"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CPULittleClusterMaxFreq",
-      "Duration": 0,
-      "Value": "1475000"
-    },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "MemFreq",
       "Duration": 0,
       "Value": "1352000"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "CDHighCpusetCpus",
+      "Duration": 0,
+      "Value": "7"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "CDMidCpusetCpus",
+      "Duration": 0,
+      "Value": "4-6"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_STANDARD",
+      "Node": "CDMidHighCpusetCpus",
+      "Duration": 0,
+      "Value": "4-7"
+    },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
       "Node": "CDCpuset",
@@ -1362,27 +1903,15 @@
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CDHighCpusetCpus",
+      "Node": "VIRTUAL-SKIN-CPU-MID",
       "Duration": 0,
-      "Value": "8"
+      "Value": "camera"
     },
     {
       "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CDMidCpusetCpus",
+      "Node": "VIRTUAL-SKIN-CPU-HIGH",
       "Duration": 0,
-      "Value": "4-7"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "CDMidHighCpusetCpus",
-      "Duration": 0,
-      "Value": "4-8"
-    },
-    {
-      "PowerHint": "CAMERA_STREAMING_STANDARD",
-      "Node": "NPITaskPacking",
-      "Duration": 0,
-      "Value": "0"
+      "Value": "camera"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
@@ -1412,19 +1941,19 @@
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CPUBigClusterMaxFreq",
       "Duration": 0,
-      "Value": "1852000"
+      "Value": "1885000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CPUMidClusterMaxFreq",
       "Duration": 0,
-      "Value": "1622000"
+      "Value": "1549000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CPULittleClusterMaxFreq",
       "Duration": 0,
-      "Value": "1475000"
+      "Value": "1425000"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
@@ -1436,32 +1965,164 @@
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CDCpuset",
       "Duration": 0,
-      "Value": "0-7"
+      "Value": "4-7"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CDHighCpusetCpus",
       "Duration": 0,
-      "Value": "8"
+      "Value": "7"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CDMidCpusetCpus",
       "Duration": 0,
-      "Value": "4-7"
+      "Value": "4-6"
     },
     {
       "PowerHint": "CAMERA_STREAMING_LOW",
       "Node": "CDMidHighCpusetCpus",
       "Duration": 0,
-      "Value": "4-8"
+      "Value": "4-7"
     },
     {
-      "PowerHint": "CAMERA_STREAMING_LOW",
-      "Node": "NPITaskPacking",
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "PowerHALCameraRunning",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "EM_Profile",
+      "Duration": 0,
+      "Value": "cam1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CDPreferHighCap",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "TAPreferHighCap",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "TAPreferIdle",
       "Duration": 0,
       "Value": "0"
     },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CDPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 0,
+      "Value": "1999000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 0,
+      "Value": "1795000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPULittleClusterMaxFreq",
+      "Duration": 0,
+      "Value": "1696000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPUBigClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "2000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPUMidClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "2000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPULittleClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "2000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "MemFreq",
+      "Duration": 0,
+      "Value": "1352000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CDHighCpusetCpus",
+      "Duration": 0,
+      "Value": "7"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CDMidCpusetCpus",
+      "Duration": 0,
+      "Value": "4-6"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CDMidHighCpusetCpus",
+      "Duration": 0,
+      "Value": "4-7"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CDCpuset",
+      "Duration": 0,
+      "Value": "0-6"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPUUtilThreshold",
+      "Duration": 0,
+      "Value": "1100"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "CPUDVFSHeadroom",
+      "Duration": 0,
+      "Value": "1100"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "PMU_POLL",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "PMU_LIT_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1328000"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "PMU_LIT_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "2"
+    },
+    {
+      "PowerHint": "CAMERA_STREAMING_VIDEO_CALL",
+      "Node": "PMU_LIT_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "30"
+    },
     {
       "PowerHint": "CAMERA_VIDEO_RECORDING",
       "Type": "MaskHint",
@@ -1494,6 +2155,24 @@
       "Duration": 0,
       "Value": "302000"
     },
+    {
+      "PowerHint": "CAMERA_TNR_LOW",
+      "Node": "TNRMaxFreq",
+      "Duration": 0,
+      "Value": "111000"
+    },
+    {
+      "PowerHint": "CAMERA_ADJUST_BACKEND_MIN_FREQ",
+      "Node": "INTCAMFreq",
+      "Duration": 0,
+      "Value": "233000"
+    },
+    {
+      "PowerHint": "CAMERA_ADJUST_BACKEND_MIN_FREQ",
+      "Node": "TNRFreq",
+      "Duration": 0,
+      "Value": "233000"
+    },
     {
       "PowerHint": "FIXED_PERFORMANCE",
       "Node": "CPUBigClusterMaxFreq",
@@ -1534,7 +2213,7 @@
       "PowerHint": "LOW_POWER_LITTLE_CLUSTER_50",
       "Node": "CPULittleClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "975000"
+      "Value": "955000"
     },
     {
       "PowerHint": "LOW_POWER_LITTLE_CLUSTER_60",
@@ -1558,73 +2237,115 @@
       "PowerHint": "LOW_POWER_LITTLE_CLUSTER_90",
       "Node": "CPULittleClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1844000"
+      "Value": "1696000"
     },
     {
       "PowerHint": "LOW_POWER_MID_CLUSTER_50",
       "Node": "CPUMidClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "910000"
+      "Value": "1328000"
     },
     {
       "PowerHint": "LOW_POWER_MID_CLUSTER_60",
       "Node": "CPUMidClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1328000"
+      "Value": "1549000"
     },
     {
       "PowerHint": "LOW_POWER_MID_CLUSTER_70",
       "Node": "CPUMidClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1622000"
+      "Value": "1795000"
     },
     {
       "PowerHint": "LOW_POWER_MID_CLUSTER_80",
       "Node": "CPUMidClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1836000"
+      "Value": "1945000"
     },
     {
       "PowerHint": "LOW_POWER_MID_CLUSTER_90",
       "Node": "CPUMidClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1999000"
+      "Value": "2367000"
     },
     {
       "PowerHint": "LOW_POWER_CPU_50",
       "Node": "CPUBigClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1328000"
+      "Value": "1557000"
     },
     {
       "PowerHint": "LOW_POWER_CPU_60",
       "Node": "CPUBigClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1557000"
+      "Value": "1885000"
     },
     {
       "PowerHint": "LOW_POWER_CPU_70",
       "Node": "CPUBigClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "1745000"
+      "Value": "2147000"
     },
     {
       "PowerHint": "LOW_POWER_CPU_80",
       "Node": "CPUBigClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "2049000"
+      "Value": "2499000"
     },
     {
       "PowerHint": "LOW_POWER_CPU_90",
       "Node": "CPUBigClusterMaxFreq",
       "Duration": 3600000,
-      "Value": "2409000"
+      "Value": "2802000"
     },
     {
       "PowerHint": "LOW_POWER",
       "Node": "PMU_POLL",
       "Duration": 0,
-      "Value": "0"
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "BigTjOffset",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "MidTjOffset",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "LittleTjOffset",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "G3dTjOffset",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "TpuTjOffset",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "AurTjOffset",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "LOW_POWER",
+      "Node": "CPUTaperedDVFSHeadroomEnable",
+      "Duration": 0,
+      "Value": "1"
     },
     {
       "PowerHint": "REFRESH_120FPS",
@@ -1650,17 +2371,29 @@
       "Duration": 0,
       "Value": "0"
     },
-    {
-      "PowerHint": "DISPLAY_IDLE",
-      "Node": "TAUClampBoost",
-      "Duration": 0,
-      "Value": "1"
-    },
     {
       "PowerHint": "DISPLAY_IDLE",
       "Type": "EndHint",
       "Value": "DISPLAY_UPDATE_IMMINENT"
     },
+    {
+      "PowerHint": "DISPLAY_UPDATE_IMMINENT",
+      "Node": "CPULittleClusterDownRateLimitUs",
+      "Duration": 50,
+      "Value": "5000"
+    },
+    {
+      "PowerHint": "DISPLAY_UPDATE_IMMINENT",
+      "Node": "CPUMidClusterDownRateLimitUs",
+      "Duration": 50,
+      "Value": "20000"
+    },
+    {
+      "PowerHint": "DISPLAY_UPDATE_IMMINENT",
+      "Node": "CPUBigClusterDownRateLimitUs",
+      "Duration": 50,
+      "Value": "20000"
+    },
     {
       "PowerHint": "DISPLAY_UPDATE_IMMINENT",
       "Node": "DisplayWakeup",
@@ -1689,85 +2422,109 @@
       "PowerHint": "EXPENSIVE_RENDERING",
       "Node": "GPUMinFreq",
       "Duration": 0,
-      "Value": "521000"
+      "Value": "419000"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "VIRTUAL-SKIN-CPU-MID",
+      "Duration": 0,
+      "Value": "game"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "VIRTUAL-SKIN-CPU-HIGH",
+      "Duration": 0,
+      "Value": "game"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "CPUDVFSHeadroom",
+      "Duration": 0,
+      "Value": "1100"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "CPUTaperedDVFSHeadroomEnable",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "CPULittleClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "500"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "CPUMidClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "3000"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "CPUBigClusterDownRateLimitUs",
+      "Duration": 0,
+      "Value": "3000"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "TAPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "FGPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "GAME",
+      "Node": "NPITaskPacking",
+      "Duration": 0,
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "PMU_POLL",
       "Duration": 0,
-      "Value": "0"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "BigControlTempSet",
+      "Node": "BigTjOffset",
       "Duration": 0,
-      "Value": "80000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "MidControlTempSet",
+      "Node": "MidTjOffset",
       "Duration": 0,
-      "Value": "80000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "LittleControlTempSet",
+      "Node": "LittleTjOffset",
       "Duration": 0,
-      "Value": "80000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "G3dControlTempSet",
+      "Node": "G3dTjOffset",
       "Duration": 0,
-      "Value": "80000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "TpuControlTempSet",
+      "Node": "TpuTjOffset",
       "Duration": 0,
-      "Value": "80000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "AurControlTempSet",
+      "Node": "AurTjOffset",
       "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "BigSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "MidSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "LittleSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "G3dSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "TpuSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
-      "Node": "AurSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
@@ -1779,85 +2536,19 @@
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
       "Node": "Dex2oatCPUSet",
       "Duration": 0,
-      "Value": "0,1,2,3,4,5,6,7"
+      "Value": "0,1,2,3,4,5,6"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "PMU_POLL",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
+      "Node": "Dex2oatGroup",
       "Duration": 0,
       "Value": "0"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "BigControlTempSet",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_LIGHT",
+      "Node": "CPUTaperedDVFSHeadroomEnable",
       "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "MidControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "LittleControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "G3dControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "TpuControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "AurControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "BigSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "MidSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "LittleSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "G3dSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "TpuSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
-      "Node": "AurSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
+      "Value": "1"
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_MODERATE",
@@ -1871,174 +2562,6 @@
       "Duration": 0,
       "Value": "0,1,2,3"
     },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "PMU_POLL",
-      "Duration": 0,
-      "Value": "0"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "BigControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "MidControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "LittleControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "G3dControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "TpuControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "AurControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "BigSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "MidSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "LittleSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "G3dSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "TpuSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "AurSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "Dex2oatThreads",
-      "Duration": 0,
-      "Value": "4"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_SEVERE",
-      "Node": "Dex2oatCPUSet",
-      "Duration": 0,
-      "Value": "0,1,2,3"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "PMU_POLL",
-      "Duration": 0,
-      "Value": "0"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "BigControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "MidControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "LittleControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "G3dControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "TpuControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "AurControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "BigSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "MidSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "LittleSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "G3dSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "TpuSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "AurSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
       "Node": "Dex2oatThreads",
@@ -2047,118 +2570,28 @@
     },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
-      "Node": "Dex2oatCPUSet",
-      "Duration": 0,
-      "Value": "0,1,2,3"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "PMU_POLL",
-      "Duration": 0,
-      "Value": "0"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
       "Node": "CPU_LITTLE_TSKIN_BYPASS",
       "Duration": 0,
       "Value": "0"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
       "Node": "CPU_MID_TSKIN_BYPASS",
       "Duration": 0,
       "Value": "0"
     },
     {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
+      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_CRITICAL",
       "Node": "CPU_BIG_TSKIN_BYPASS",
       "Duration": 0,
       "Value": "0"
     },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "BigControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "MidControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "LittleControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "G3dControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "TpuControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "AurControlTempSet",
-      "Duration": 0,
-      "Value": "80000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "BigSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "MidSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "LittleSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "G3dSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "TpuSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "AurSwitchOnTempSet",
-      "Duration": 0,
-      "Value": "60000"
-    },
     {
       "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
       "Node": "Dex2oatThreads",
       "Duration": 0,
       "Value": "1"
     },
-    {
-      "PowerHint": "THERMAL_VIRTUAL-SKIN-HINT_EMERGENCY",
-      "Node": "Dex2oatCPUSet",
-      "Duration": 0,
-      "Value": "0,1,2,3"
-    },
     {
       "PowerHint": "FACE_UNLOCK_BOOST",
       "Node": "CPUBigClusterMaxFreq",
@@ -2225,17 +2658,155 @@
       "Duration": 1000,
       "Value": "1"
     },
+    {
+      "PowerHint": "FP_STORAGE_ACCESS",
+      "Node": "TAUClampBoost",
+      "Duration": 1000,
+      "Value": "765"
+    },
     {
       "PowerHint": "ML_ACC",
       "Node": "MLUclampBoost",
       "Duration": 2000,
-      "Value": "650"
+      "Value": "812"
     },
     {
       "PowerHint": "ML_ACC",
       "Node": "PMQoSCpuDmaLatency",
       "Duration": 2000,
       "Value": "44"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PowerHALCameraRunning",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_LIT_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_LIT_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_MID_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "3"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_MID_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "50"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_BIG_LIMIT_FREQ",
+      "Duration": 0,
+      "Value": "1885000"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_BIG_LCPI_THRESHOLD",
+      "Duration": 0,
+      "Value": "3"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_BIG_SPC_THRESHOLD",
+      "Duration": 0,
+      "Value": "50"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "PMU_POLL",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "EM_Profile",
+      "Duration": 0,
+      "Value": "cam1"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CDPreferHighCap",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CDPreferIdle",
+      "Duration": 0,
+      "Value": "0"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "TAPreferHighCap",
+      "Duration": 0,
+      "Value": "1"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CPUBigClusterMaxFreq",
+      "Duration": 0,
+      "Value": "1885000"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CPUMidClusterMaxFreq",
+      "Duration": 0,
+      "Value": "1549000"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CPULittleClusterMaxFreq",
+      "Duration": 0,
+      "Value": "1425000"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "MemFreq",
+      "Duration": 0,
+      "Value": "1352000"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CDHighCpusetCpus",
+      "Duration": 0,
+      "Value": "7"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CDMidCpusetCpus",
+      "Duration": 0,
+      "Value": "4-6"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CDMidHighCpusetCpus",
+      "Duration": 0,
+      "Value": "4-7"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "CDCpuset",
+      "Duration": 0,
+      "Value": "0-7"
+    },
+    {
+      "PowerHint": "CAMERA_PROJECT11",
+      "Node": "MIFTargetLoad",
+      "Duration": 0,
+      "Value": "20 80"
     }
   ],
   "AdpfConfig": [
@@ -2251,8 +2822,8 @@
       "PID_Do": 500.0,
       "PID_Du": 0.0,
       "UclampMin_On": true,
-      "UclampMin_Init": 185,
-      "UclampMin_High": 384,
+      "UclampMin_Init": 231,
+      "UclampMin_High": 480,
       "UclampMin_Low": 2,
       "SamplingWindow_P": 1,
       "SamplingWindow_I": 0,
@@ -2261,13 +2832,13 @@
       "EarlyBoost_On": false,
       "EarlyBoost_TimeFactor": 0.0,
       "TargetTimeFactor": 1.0,
-      "StaleTimeFactor": 20.0
+      "StaleTimeFactor": 15.0
     },
     {
       "Name": "REFRESH_90FPS",
       "PID_On": true,
       "PID_Po": 2.0,
-      "PID_Pu": 1.0,
+      "PID_Pu": 0.7,
       "PID_I": 0.0,
       "PID_I_Init": 200,
       "PID_I_High": 512,
@@ -2275,8 +2846,8 @@
       "PID_Do": 500.0,
       "PID_Du": 0.0,
       "UclampMin_On": true,
-      "UclampMin_Init": 129,
-      "UclampMin_High": 384,
+      "UclampMin_Init": 231,
+      "UclampMin_High": 480,
       "UclampMin_Low": 2,
       "SamplingWindow_P": 1,
       "SamplingWindow_I": 0,
@@ -2285,13 +2856,13 @@
       "EarlyBoost_On": false,
       "EarlyBoost_TimeFactor": 0.0,
       "TargetTimeFactor": 1.0,
-      "StaleTimeFactor": 20.0
+      "StaleTimeFactor": 15.0
     },
     {
       "Name": "REFRESH_60FPS",
       "PID_On": true,
       "PID_Po": 2.0,
-      "PID_Pu": 1.0,
+      "PID_Pu": 0.5,
       "PID_I": 0.0,
       "PID_I_Init": 200,
       "PID_I_High": 512,
@@ -2299,8 +2870,8 @@
       "PID_Do": 500.0,
       "PID_Du": 0.0,
       "UclampMin_On": true,
-      "UclampMin_Init": 129,
-      "UclampMin_High": 384,
+      "UclampMin_Init": 231,
+      "UclampMin_High": 480,
       "UclampMin_Low": 2,
       "SamplingWindow_P": 1,
       "SamplingWindow_I": 0,
@@ -2309,7 +2880,7 @@
       "EarlyBoost_On": false,
       "EarlyBoost_TimeFactor": 0.0,
       "TargetTimeFactor": 1.0,
-      "StaleTimeFactor": 20.0
+      "StaleTimeFactor": 15.0
     },
     {
       "Name": "UiHighBoostWithoutPid",
@@ -2326,9 +2897,9 @@
       "SamplingWindow_I": 1,
       "SamplingWindow_D": 1,
       "UclampMin_On": true,
-      "UclampMin_Init": 200,
-      "UclampMin_High": 157,
-      "UclampMin_Low": 157,
+      "UclampMin_Init": 250,
+      "UclampMin_High": 196,
+      "UclampMin_Low": 196,
       "ReportingRateLimitNs": 1,
       "EarlyBoost_On": false,
       "EarlyBoost_TimeFactor": 0.0,
@@ -2350,9 +2921,9 @@
       "SamplingWindow_I": 1,
       "SamplingWindow_D": 1,
       "UclampMin_On": true,
-      "UclampMin_Init": 200,
-      "UclampMin_High": 42,
-      "UclampMin_Low": 42,
+      "UclampMin_Init": 250,
+      "UclampMin_High": 52,
+      "UclampMin_Low": 52,
       "ReportingRateLimitNs": 1,
       "EarlyBoost_On": false,
       "EarlyBoost_TimeFactor": 0.0,
@@ -2374,7 +2945,7 @@
       "SamplingWindow_I": 1,
       "SamplingWindow_D": 1,
       "UclampMin_On": true,
-      "UclampMin_Init": 200,
+      "UclampMin_Init": 250,
       "UclampMin_High": 0,
       "UclampMin_Low": 0,
       "ReportingRateLimitNs": 1,
diff --git a/rro_overlays/NfcOverlay/res/values/config.xml b/rro_overlays/NfcOverlay/res/values/config.xml
index 5058cfa..2036ad5 100644
--- a/rro_overlays/NfcOverlay/res/values/config.xml
+++ b/rro_overlays/NfcOverlay/res/values/config.xml
@@ -22,4 +22,5 @@
     <item>GWVK6</item>
   </string-array>
   <bool name="tag_intent_app_pref_supported">true</bool>
+  <bool name="nfc_observe_mode_supported">true</bool>
 </resources>
diff --git a/tegu/BoardConfig.mk b/tegu/BoardConfig.mk
index adb6485..17255a4 100644
--- a/tegu/BoardConfig.mk
+++ b/tegu/BoardConfig.mk
@@ -16,7 +16,7 @@
 
 TARGET_BOARD_INFO_FILE := device/google/tegu/board-info.txt
 TARGET_BOOTLOADER_BOARD_NAME := tegu
-TARGET_SCREEN_DENSITY := 480
+TARGET_SCREEN_DENSITY := 420
 BOARD_USES_GENERIC_AUDIO := true
 USES_DEVICE_GOOGLE_TEGU := true
 
diff --git a/tegu/overlay/frameworks/base/core/res/res/values/config.xml b/tegu/overlay/frameworks/base/core/res/res/values/config.xml
index 88809ba..d0af953 100644
--- a/tegu/overlay/frameworks/base/core/res/res/values/config.xml
+++ b/tegu/overlay/frameworks/base/core/res/res/values/config.xml
@@ -256,4 +256,7 @@
 
     <!-- The max vibration strength allowed in audio haptic channels. -->
     <item name="config_hapticChannelMaxVibrationAmplitude" format="float" type="dimen">0.335</item>
+
+    <!-- Type of the udfps long press sensor. Empty if long press is not supported. -->
+    <string name="config_dozeUdfpsLongPressSensorType" translatable="false">com.google.sensor.long_press</string>
 </resources>
diff --git a/thermal/thermal_info_config_charge_komodo.json b/thermal/thermal_info_config_charge_komodo.json
deleted file mode 100644
index 111db7a..0000000
--- a/thermal/thermal_info_config_charge_komodo.json
+++ /dev/null
@@ -1,197 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"north_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 42.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"rfpa_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 43.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/rfpa_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"soc_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 57.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"charging_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 58.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/charging_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"disp_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 41.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
-            "Multiplier":0.001
-        },
-        {
-            "Name":"btmspkr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 54.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/btmspkr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"quiet_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 44.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"usb_pwr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 45.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.04, 0.16, 0.19, 0.16, 0.17, 0, 0.01, 0.24, 0],
-            "Offset":-820,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.02, 0.01, 0.04, 0.04, 0.4, 0.14, 0.1, 0.02, 0.12],
-            "Offset":1840,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.18, 0.1, 0.15, 0.13, 0.22, 0.16, 0.02, 0.04, 0.01],
-            "Offset":-2810,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-3",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.1, 0.16, 0.11, 0.19, 0.26, 0, 0, 0.11, 0],
-            "Offset":1140,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE",
-            "Type":"UNKNOWN",
-            "Version":"4.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-CHARGE-SUB-0", "VIRTUAL-SKIN-CHARGE-SUB-1", "VIRTUAL-SKIN-CHARGE-SUB-2", "VIRTUAL-SKIN-CHARGE-SUB-3"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0],
-            "HotThreshold":["NAN", 44.0, 48.0, 51.0, 55.0, 57.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 25, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1302, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 2527, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 6219, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 6, "NAN", "NAN", "NAN", "NAN"],
-                "I_Default":1302
-            },
-            "ExcludedPowerInfo": [
-                {
-                    "PowerRail": "PARTIAL_SYSTEM_POWER",
-                    "PowerWeight": [0.12, 0.12, 0.06, 0.06, 0.24, 0.24, 0.24]
-                }
-            ],
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "chg_mdis",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "CdevCeiling": [0, 25, 25, 25, 26, 26, 26],
-                    "LimitInfo": [0, 0, 1, 1, 1, 26, 26]
-                }
-            ]
-        }
-    ],
-    "CoolingDevices":[
-        {
-            "Name":"chg_mdis",
-            "Type":"BATTERY"
-        },
-        {
-            "Name":"usbc-port",
-            "Type":"BATTERY"
-        }
-    ],
-    "PowerRails":[
-       {
-            "Name":"PARTIAL_SYSTEM_POWER",
-            "VirtualRails":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["S1S_VDD_CAM", "S4S_VDD2H_MEM", "S5S_VDDQ_MEM", "S8S_VDD_G3D_L2", "S9S_VDD_AOC", "L2S_PLL_MIPI_UFS", "L9S_GNSS_CORE", "L21S_VDD2L_MEM", "VSYS_PWR_DISPLAY", "VSYS_PWR_WLAN_BT", "S1M_VDD_MIF", "S5M_VDD_INT", "S6M_LLDO1", "S7M_VDD_TPU", "S8M_LLDO2", "VSYS_PWR_MODEM"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":5
-        }
-    ]
-}
diff --git a/thermal/thermal_info_config_charge_ripcurrent24.json b/thermal/thermal_info_config_charge_ripcurrent24.json
deleted file mode 100644
index 4e7eecb..0000000
--- a/thermal/thermal_info_config_charge_ripcurrent24.json
+++ /dev/null
@@ -1,19 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "60.0"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        }
-    ]
-}
diff --git a/thermal/thermal_info_config_charge_ripcurrentpro.json b/thermal/thermal_info_config_charge_ripcurrentpro.json
deleted file mode 100644
index 4e7eecb..0000000
--- a/thermal/thermal_info_config_charge_ripcurrentpro.json
+++ /dev/null
@@ -1,19 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "60.0"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        }
-    ]
-}
diff --git a/thermal/thermal_info_config_charge_tokay.json b/thermal/thermal_info_config_charge_tokay.json
deleted file mode 100644
index 642c942..0000000
--- a/thermal/thermal_info_config_charge_tokay.json
+++ /dev/null
@@ -1,197 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"north_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 42.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"rfpa_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 43.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/rfpa_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"soc_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 57.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"charging_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 58.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/charging_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"disp_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 41.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
-            "Multiplier":0.001
-        },
-        {
-            "Name":"btmspkr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 54.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/btmspkr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"quiet_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 44.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"usb_pwr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 45.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.04, 0.16, 0.19, 0.16, 0.17, 0, 0.01, 0.24, 0],
-            "Offset":-820,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.02, 0.01, 0.04, 0.04, 0.4, 0.14, 0.1, 0.02, 0.12],
-            "Offset":1840,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.18, 0.1, 0.15, 0.13, 0.22, 0.16, 0.02, 0.04, 0.01],
-            "Offset":-2810,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE-SUB-3",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.1, 0.16, 0.11, 0.19, 0.26, 0, 0, 0.11, 0],
-            "Offset":1140,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CHARGE",
-            "Type":"UNKNOWN",
-            "Version":"4.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-CHARGE-SUB-0", "VIRTUAL-SKIN-CHARGE-SUB-1", "VIRTUAL-SKIN-CHARGE-SUB-2", "VIRTUAL-SKIN-CHARGE-SUB-3"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0],
-            "HotThreshold":["NAN", 44.0, 48.0, 51.0, 55.0, 57.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 3.9, 2.9, 3.9, 1.9, 1.9],
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 119, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 25, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1302, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 2527, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 6219, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 6, "NAN", "NAN", "NAN", "NAN"],
-                "I_Default":1302
-            },
-            "ExcludedPowerInfo": [
-                {
-                    "PowerRail": "PARTIAL_SYSTEM_POWER",
-                    "PowerWeight": [0.12, 0.12, 0.06, 0.06, 0.24, 0.24, 0.24]
-                }
-            ],
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "chg_mdis",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "CdevCeiling": [0, 25, 25, 25, 26, 26, 26],
-                    "LimitInfo": [0, 0, 1, 1, 1, 26, 26]
-                }
-            ]
-        }
-    ],
-    "CoolingDevices":[
-        {
-            "Name":"chg_mdis",
-            "Type":"BATTERY"
-        },
-        {
-            "Name":"usbc-port",
-            "Type":"BATTERY"
-        }
-    ],
-    "PowerRails":[
-        {
-            "Name":"PARTIAL_SYSTEM_POWER",
-            "VirtualRails":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["S1S_VDD_CAM", "S4S_VDD2H_MEM", "S5S_VDDQ_MEM", "S8S_VDD_G3D_L2", "S9S_VDD_AOC", "L2S_PLL_MIPI_UFS", "L9S_GNSS_CORE", "L21S_VDD2L_MEM", "VSYS_PWR_DISPLAY", "VSYS_PWR_WLAN_BT", "S1M_VDD_MIF", "S5M_VDD_INT", "S6M_LLDO1", "S7M_VDD_TPU", "S8M_LLDO2", "VSYS_PWR_MODEM"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":5
-        }
-    ]
-}
diff --git a/thermal/thermal_info_config_komodo.json b/thermal/thermal_info_config_komodo.json
deleted file mode 100644
index 0b06f84..0000000
--- a/thermal/thermal_info_config_komodo.json
+++ /dev/null
@@ -1,926 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"north_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 42.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"rfpa_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 43.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/rfpa_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"soc_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 57.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"charging_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 58.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/charging_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"disp_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 41.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
-            "Multiplier":0.001
-        },
-        {
-            "Name":"btmspkr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 54.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/btmspkr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"quiet_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 44.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"usb_pwr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 45.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"battery_cycle",
-            "Type":"BCL_VOLTAGE"
-        },
-        {
-            "Name":"critical-battery-cell",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":["battery", "battery_cycle", "vdroop1"],
-            "Coefficient":[-10000, 400, 1000],
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 3.00, "NAN"],
-            "Multiplier":1,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "SendCallback":true
-        },
-        {
-            "Name":"FLASH_LED_REDUCE",
-            "Type":"UNKNOWN",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":["battery", "battery_cycle", "vdroop1"],
-            "Coefficient":[-10000, 400, 1000],
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 3.00, "NAN", "NAN"],
-            "Multiplier":1,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "SendCallback":true,
-            "SendPowerHint":true
-        },
-        {
-            "Name":"soc",
-            "Type":"BCL_PERCENTAGE",
-            "HotThreshold":["NAN", "NAN", 80, "NAN", "NAN", "NAN", "NAN"],
-            "Multiplier":1
-        },
-        {
-            "Name":"batoilo",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 5000, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"BCL_AUDIO_BAACL",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "soc",
-            "Combination":["battery", "soc"],
-            "Coefficient":[-25000, 80],
-            "HotThreshold":["NAN", "NAN",  "NAN", "NAN", 2.0, "NAN", "NAN"],
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "Multiplier":1,
-            "SendCallback":true
-        },
-        {
-            "Name":"vdroop1",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1000, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"vdroop2",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1200, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"smpl_gm",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1100, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"VIRTUAL-BTS-WINDOW-PARTIAL",
-            "Type":"UNKNOWN",
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["rfpa_therm", "north_therm"],
-            "Coefficient":[0.05, 0.14],
-            "Offset":560,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.27, 0.17, 0.11, 0, 0.2, 0.01, 0.06, 0.08],
-            "Offset":2110,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.46, 0, 0.14, 0.28, 0, 0.06, 0.02, 0.14, 0],
-            "Offset":-7280,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.07, 0, 0, 0, 0, 0.28, 0.15, 0.02, 0.3],
-            "Offset":4010,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-3",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.27, 0.06, 0.3, 0, 0, 0.2, 0.03, 0.02, 0.04],
-            "Offset":10,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-4",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.9, 0, 0.05, 0, 0, 0, 0.01, 0, 0],
-            "Offset":730,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-5",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.08, 0.02, 0.24, 0.23, 0, 0.29, 0.01, 0, 0],
-            "Offset":1870,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-6",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0, 0, 0.04, 0.2, 0.07, 0.15, 0.3, 0.16],
-            "Offset":-440,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-7",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.01, 0, 0, 0.07, 0.28, 0.25, 0.02, 0.08],
-            "Offset":9170,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-8",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.1, 0.16, 0.11, 0.19, 0.26, 0, 0, 0.11, 0],
-            "Offset":1140,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-9",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.02, 0.05, 0.21, 0.13, 0.02, 0.29, 0.09, 0, 0],
-            "Offset":5160,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-10",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0, 0.16, 0, 0.49, 0.35, 0, 0, 0],
-            "Offset":-1500,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN",
-            "Type":"SKIN",
-            "Version":"5.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-SUB-0", "VIRTUAL-SKIN-SUB-1", "VIRTUAL-SKIN-SUB-2",
-                    "VIRTUAL-SKIN-SUB-3", "VIRTUAL-SKIN-SUB-4", "VIRTUAL-SKIN-SUB-5",
-                    "VIRTUAL-SKIN-SUB-6", "VIRTUAL-SKIN-SUB-7", "VIRTUAL-SKIN-SUB-8", "VIRTUAL-SKIN-SUB-9", "VIRTUAL-SKIN-SUB-10"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
-            "HotThreshold":["NAN", 49.0, 53.0, 55.0, 56.5, 62.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
-            "Multiplier":0.001,
-            "SendCallback":true,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "tpu_cooling",
-                    "LimitInfo": [0, 2, 3, 4, 5, 5, 5]
-                },
-                {
-                    "CdevRequest": "gxp-cooling",
-                    "LimitInfo": [0, 0, 0, 0, 0, 6, 6]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-HINT",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 47.0, 53.0, 55.0, 56.5, 62.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
-            "Multiplier":0.001,
-            "SendPowerHint":true,
-            "PollingDelay":300000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-LIGHT-ODPM",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 47.0, 49.0, "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 1.9, 1.9, 0.0, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 2200, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 4600, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "BindedPowerRail": "S4M_VDD_CPUCL0",
-                    "CdevCeiling": [0, 2, 2, 2, 2, 2, 2]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S3M_VDD_CPUCL1",
-                    "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S2M_VDD_CPUCL2",
-                    "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-MID",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 49.0, 51.0, "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 1.9, 0.0, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 2800, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 9, 9, 9, 9, 9, 9]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
-                }
-            ],
-            "Profile": [
-                {
-                    "Mode": "game",
-                    "BindedCdevInfo": [
-                        {
-                           "CdevRequest": "thermal-cpufreq-0",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-1",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-2",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        }
-                    ]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-HIGH",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 51.0, 53.0, 62.0, "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 1.9, 1.9, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1000, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 600, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 1600, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [0.252, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 13, 13, 13, 13, 13, 13]
-                }
-            ],
-            "Profile": [
-                {
-                    "Mode": "game",
-                    "BindedCdevInfo": [
-                        {
-                           "CdevRequest": "thermal-cpufreq-0",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-1",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-2",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        }
-                    ]
-                },
-                {
-                    "Mode": "camera",
-                    "BindedCdevInfo": [
-                        {
-                           "CdevRequest": "thermal-cpufreq-0",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-1",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-2",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        }
-                    ]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-GPU",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 47.0, 53.0, 55.0, 56.5, 62.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", "NAN", 2600, "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", "NAN", 8, "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "BindedPowerRail": "S4M_VDD_CPUCL0",
-                    "CdevCeiling": [0, 8, 8, 8, 8, 9, 9],
-                    "LimitInfo": [0, 0, 0, 0, 0, 9, 9]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S3M_VDD_CPUCL1",
-                    "CdevCeiling": [0, 11, 11, 11, 11, 14, 14],
-                    "LimitInfo": [0, 0, 0, 0, 0, 14, 14]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S2M_VDD_CPUCL2",
-                    "CdevCeiling": [0, 13, 13, 13, 13, 14, 14],
-                    "LimitInfo": [0, 0, 0, 0, 0, 14, 14]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "BindedPowerRail": "S2S_VDD_G3D",
-                    "CdevCeiling": [0, 8, 8, 8, 9, 11, 11],
-                    "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-GPU",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 53.0, 55.0, 56.5, 62.0, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.4, 1.9, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1723, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 473, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 2500, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "CdevCeiling": [0, 8, 8, 9, 11, 11, 11]
-                }
-            ]
-        },
-        {
-            "Name":"cellular-emergency",
-            "Type":"POWER_AMPLIFIER",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 64.0, "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0],
-            "Multiplier":0.001,
-            "SendCallback":true,
-            "PollingDelay":300000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.14, 0, 0.15, 0, 0, 0, 0.88, 0],
-            "Offset":-11750,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.01, 0.18, 0, 0, 0, 0.24, 0, 0.01, 0.35],
-            "Offset":3600,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.01, 0, 0, 0.13, 0.31, 0.11, 0.18, 0.09],
-            "Offset":2140,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER",
-            "Type":"UNKNOWN",
-            "Version":"2.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-SPEAKER-SUB-0", "VIRTUAL-SKIN-SPEAKER-SUB-1", "VIRTUAL-SKIN-SPEAKER-SUB-2"],
-            "Coefficient":[1, 1, 1],
-            "HotThreshold":["NAN", 47.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 1.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "SendCallback":true
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.04, 0.03, 0.1, 0.05, 0.35, 0.3, 0, 0, 0.04],
-            "Offset":1850,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0, 0.35, 0.22, 0.22, 0.07, 0.03, 0, 0],
-            "Offset":-560,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.05, 0.13, 0.12, 0.07, 0.37, 0.06, 0.01, 0.01, 0],
-            "Offset":5070,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT",
-            "Type":"UNKNOWN",
-            "Version":"1.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-FRONT-SUB-0", "VIRTUAL-SKIN-FRONT-SUB-1", "VIRTUAL-SKIN-FRONT-SUB-2"],
-            "Coefficient":[1, 1, 1],
-            "Multiplier":0.001
-        },
-        {
-            "Name":"LITTLE",
-            "Type":"CPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"MID",
-            "Type":"CPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"BIG",
-            "Type":"CPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"G3D",
-            "Type":"GPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"TPU",
-            "Type":"NPU",
-            "Multiplier":0.001
-        }
-    ],
-    "CoolingDevices":[
-        {
-            "Name":"thermal-cpufreq-0",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote"
-        },
-        {
-            "Name":"thermal-cpufreq-1",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote"
-        },
-        {
-            "Name":"thermal-cpufreq-2",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote"
-        },
-        {
-            "Name":"thermal-gpufreq-0",
-            "Type":"GPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote"
-        },
-        {
-            "Name":"chg_mdis",
-            "Type":"BATTERY"
-        },
-        {
-            "Name":"usbc-port",
-            "Type":"BATTERY"
-        },
-        {
-            "Name":"tpu_cooling",
-            "Type":"NPU",
-            "WritePath":"/dev/thermal/cdev-by-name/tpu_cooling/user_vote"
-        },
-        {
-            "Name":"gxp-cooling",
-            "Type":"NPU",
-            "WritePath":"/dev/thermal/cdev-by-name/gxp-cooling/user_vote"
-        }
-    ],
-    "PowerRails":[
-        {
-            "Name":"S2M_VDD_CPUCL2",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"S3M_VDD_CPUCL1",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"S4M_VDD_CPUCL0",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"S2S_VDD_G3D",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"PARTIAL_SYSTEM_POWER",
-            "VirtualRails":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["S1S_VDD_CAM", "S2S_VDD_G3D", "S4S_VDD2H_MEM", "S5S_VDDQ_MEM", "S8S_VDD_G3D_L2", "S9S_VDD_AOC", "L2S_PLL_MIPI_UFS", "L9S_GNSS_CORE", "L21S_VDD2L_MEM", "VSYS_PWR_DISPLAY", "VSYS_PWR_WLAN_BT", "S1M_VDD_MIF", "S2M_VDD_CPUCL2", "S3M_VDD_CPUCL1", "S4M_VDD_CPUCL0", "S5M_VDD_INT", "S6M_LLDO1", "S7M_VDD_TPU", "S8M_LLDO2", "VSYS_PWR_MODEM"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":5
-        }
-    ],
-    "Stats": {
-        "Sensors": {
-            "RecordWithDefaultThreshold": ["VIRTUAL-SKIN"],
-            "RecordWithThreshold": [
-                {
-                    "Name": "VIRTUAL-BTS-WINDOW-PARTIAL",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SPEAKER",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-0",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-1",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-2",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-3",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-4",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-5",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-6",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-7",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                }
-            ]
-        },
-        "CoolingDevices": {
-            "RecordVotePerSensor": {
-                "DefaultThresholdEnableAll": true
-            }
-        }
-    }
-}
diff --git a/thermal/thermal_info_config_ripcurrent24.json b/thermal/thermal_info_config_ripcurrent24.json
deleted file mode 100644
index 72fb124..0000000
--- a/thermal/thermal_info_config_ripcurrent24.json
+++ /dev/null
@@ -1,561 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "60.0"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"LITTLE",
-            "Type":"CPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"MID",
-            "Type":"CPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"G3D",
-            "Type":"GPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"battery_cycle",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":false
-        },
-        {
-            "Name":"critical-battery-cell",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":[
-                "battery",
-                "battery_cycle",
-                "vdroop1"
-            ],
-            "Coefficient":[
-                "-10000",
-                "400",
-                "1000"
-            ],
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                3.00,
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true
-        },
-        {
-            "Name":"FLASH_LED_REDUCE",
-            "Type":"UNKNOWN",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":[
-                "battery",
-                "battery_cycle",
-                "vdroop1"
-            ],
-            "Coefficient":[
-                "-10000",
-                "400",
-                "1000"
-            ],
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                3.00,
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "SendPowerHint":true
-        },
-        {
-            "Name":"soc",
-            "Type":"BCL_PERCENTAGE",
-            "HotThreshold":[
-                "NAN",
-                80,
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"batoilo",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                5000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 7, 7]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 3, 3, 3]
-                }
-            ]
-        },
-        {
-            "Name":"BCL_AUDIO_BAACL",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "soc",
-            "Combination":[
-                "battery",
-                "soc"
-            ],
-            "Coefficient":[
-                "-25000",
-                "80"
-            ],
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                2.0,
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true
-        },
-        {
-            "Name":"vdroop1",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                1000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 2, 2, 2]
-                }
-            ]
-        },
-        {
-            "Name":"vdroop2",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                1200,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
-                }
-            ]
-        },
-        {
-            "Name":"smpl_gm",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                1100,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 3, 3, 3]
-                }
-            ]
-        },
-        {
-            "Name":"ocp_cpu1",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                7000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"ocp_cpu2",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                12000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"ocp_tpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                10500,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"ocp_gpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                12000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_cpu2",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                9000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_cpu1",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                7000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_tpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                8500,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_gpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                9000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"TPU",
-            "Type":"NPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        }
-    ],
-    "CoolingDevices":[
-        {
-            "Name":"thermal-cpufreq-0",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote",
-            "State2Power":["1100", "1050", "1000", "950", "900", "850", "800", "750", "700", "650", "600"]
-        },
-        {
-            "Name":"thermal-cpufreq-1",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote",
-            "State2Power":["1400", "1350", "1300", "1250", "1200", "1150", "1100", "1050", "1000", "950", "900", "850", "800", "750"]
-        },
-        {
-            "Name":"thermal-cpufreq-2",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote",
-            "State2Power":["1450", "1400", "1350", "1300", "1250", "1200", "1150", "1100", "1050", "1000", "950", "900", "850", "800", "750"]
-        },
-        {
-            "Name":"thermal-gpufreq-0",
-            "Type":"GPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote"
-        }
-    ]
-}
diff --git a/thermal/thermal_info_config_ripcurrentpro.json b/thermal/thermal_info_config_ripcurrentpro.json
deleted file mode 100644
index 72fb124..0000000
--- a/thermal/thermal_info_config_ripcurrentpro.json
+++ /dev/null
@@ -1,561 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "60.0"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"LITTLE",
-            "Type":"CPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"MID",
-            "Type":"CPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"G3D",
-            "Type":"GPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"battery_cycle",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":false
-        },
-        {
-            "Name":"critical-battery-cell",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":[
-                "battery",
-                "battery_cycle",
-                "vdroop1"
-            ],
-            "Coefficient":[
-                "-10000",
-                "400",
-                "1000"
-            ],
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                3.00,
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true
-        },
-        {
-            "Name":"FLASH_LED_REDUCE",
-            "Type":"UNKNOWN",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":[
-                "battery",
-                "battery_cycle",
-                "vdroop1"
-            ],
-            "Coefficient":[
-                "-10000",
-                "400",
-                "1000"
-            ],
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                3.00,
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "SendPowerHint":true
-        },
-        {
-            "Name":"soc",
-            "Type":"BCL_PERCENTAGE",
-            "HotThreshold":[
-                "NAN",
-                80,
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"batoilo",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                5000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 7, 7]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 3, 3, 3]
-                }
-            ]
-        },
-        {
-            "Name":"BCL_AUDIO_BAACL",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "soc",
-            "Combination":[
-                "battery",
-                "soc"
-            ],
-            "Coefficient":[
-                "-25000",
-                "80"
-            ],
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                2.0,
-                "NAN",
-                "NAN"
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true
-        },
-        {
-            "Name":"vdroop1",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                1000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 2, 2, 2]
-                }
-            ]
-        },
-        {
-            "Name":"vdroop2",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                1200,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 4, 4, 4]
-                }
-            ]
-        },
-        {
-            "Name":"smpl_gm",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                1100,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1,
-            "Monitor":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "LimitInfo": [0, 0, 0, 0, 7, 10, 10]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "LimitInfo": [0, 0, 0, 0, 3, 3, 3]
-                }
-            ]
-        },
-        {
-            "Name":"ocp_cpu1",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                7000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"ocp_cpu2",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                12000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"ocp_tpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                10500,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"ocp_gpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                12000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_cpu2",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                9000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_cpu1",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                7000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_tpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                8500,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"soft_ocp_gpu",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                9000,
-                "NAN",
-                "NAN"
-            ],
-            "HotHysteresis":[
-                0.0,
-                0.0,
-                0.0,
-                0.0,
-                100,
-                0.0,
-                0.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":1
-        },
-        {
-            "Name":"TPU",
-            "Type":"NPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
-            "Multiplier":0.001
-        }
-    ],
-    "CoolingDevices":[
-        {
-            "Name":"thermal-cpufreq-0",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote",
-            "State2Power":["1100", "1050", "1000", "950", "900", "850", "800", "750", "700", "650", "600"]
-        },
-        {
-            "Name":"thermal-cpufreq-1",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote",
-            "State2Power":["1400", "1350", "1300", "1250", "1200", "1150", "1100", "1050", "1000", "950", "900", "850", "800", "750"]
-        },
-        {
-            "Name":"thermal-cpufreq-2",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote",
-            "State2Power":["1450", "1400", "1350", "1300", "1250", "1200", "1150", "1100", "1050", "1000", "950", "900", "850", "800", "750"]
-        },
-        {
-            "Name":"thermal-gpufreq-0",
-            "Type":"GPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote"
-        }
-    ]
-}
diff --git a/thermal/thermal_info_config_tegu.json b/thermal/thermal_info_config_tegu.json
index 03b11c3..16542cc 100644
--- a/thermal/thermal_info_config_tegu.json
+++ b/thermal/thermal_info_config_tegu.json
@@ -1,64 +1,922 @@
 {
     "Sensors":[
+        {
+            "Name":"north_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 42.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"rfpa_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 43.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/rfpa_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"soc_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 57.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"charging_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 58.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/charging_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"disp_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 41.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
         {
             "Name":"battery",
             "Type":"BATTERY",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "60.0"
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
+            "Multiplier":0.001
+        },
+        {
+            "Name":"btmspkr_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 54.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/btmspkr_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"quiet_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 44.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"usb_pwr_therm",
+            "Type":"UNKNOWN",
+            "HotThreshold":["NAN", 45.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
+            "Multiplier":0.001,
+            "PollingDelay":60000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"battery_cycle",
+            "Type":"BCL_VOLTAGE"
+        },
+        {
+            "Name":"critical-battery-cell",
+            "Type":"BCL_VOLTAGE",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "vdroop1",
+            "Combination":["battery", "battery_cycle", "vdroop1"],
+            "Coefficient":[-10000, 400, 1000],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 3.00, "NAN"],
+            "Multiplier":1,
+            "PollingDelay":0,
+            "PassiveDelay":1000,
+            "SendCallback":true
+        },
+        {
+            "Name":"FLASH_LED_REDUCE",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "vdroop1",
+            "Combination":["battery", "battery_cycle", "vdroop1"],
+            "Coefficient":[-10000, 400, 1000],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 3.00, "NAN", "NAN"],
+            "Multiplier":1,
+            "PollingDelay":0,
+            "PassiveDelay":1000,
+            "SendCallback":true,
+            "SendPowerHint":true
+        },
+        {
+            "Name":"soc",
+            "Type":"BCL_PERCENTAGE",
+            "HotThreshold":["NAN", "NAN", 80, "NAN", "NAN", "NAN", "NAN"],
+            "Multiplier":1
+        },
+        {
+            "Name":"batoilo",
+            "Type":"BCL_CURRENT",
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 5000, "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
+            "Multiplier":1,
+            "SendCallback":true,
+            "PollingDelay":0,
+            "PassiveDelay":1000
+        },
+        {
+            "Name":"BCL_AUDIO_BAACL",
+            "Type":"BCL_VOLTAGE",
+            "VirtualSensor":true,
+            "Formula":"COUNT_THRESHOLD",
+            "TriggerSensor": "soc",
+            "Combination":["battery", "soc"],
+            "Coefficient":[-25000, 80],
+            "HotThreshold":["NAN", "NAN",  "NAN", "NAN", 2.0, "NAN", "NAN"],
+            "PollingDelay":0,
+            "PassiveDelay":1000,
+            "Multiplier":1,
+            "SendCallback":true
+        },
+        {
+            "Name":"vdroop1",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1000, "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
+            "Multiplier":1,
+            "SendCallback":true,
+            "PollingDelay":0,
+            "PassiveDelay":1000
+        },
+        {
+            "Name":"vdroop2",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1200, "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
+            "Multiplier":1,
+            "SendCallback":true,
+            "PollingDelay":0,
+            "PassiveDelay":1000
+        },
+        {
+            "Name":"smpl_gm",
+            "Type":"BCL_VOLTAGE",
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1100, "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
+            "Multiplier":1,
+            "SendCallback":true,
+            "PollingDelay":0,
+            "PassiveDelay":1000
+        },
+        {
+            "Name":"VIRTUAL-BTS-WINDOW-PARTIAL",
+            "Type":"UNKNOWN",
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["rfpa_therm", "north_therm"],
+            "Coefficient":[0.05, 0.14],
+            "Offset":560,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-0",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0.27, 0.17, 0.11, 0, 0.2, 0.01, 0.06, 0.08],
+            "Offset":2110,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-1",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.46, 0, 0.14, 0.28, 0, 0.06, 0.02, 0.14, 0],
+            "Offset":-7280,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-2",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.07, 0, 0, 0, 0, 0.28, 0.15, 0.02, 0.3],
+            "Offset":4010,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-3",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.27, 0.06, 0.3, 0, 0, 0.2, 0.03, 0.02, 0.04],
+            "Offset":10,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-4",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.9, 0, 0.05, 0, 0, 0, 0.01, 0, 0],
+            "Offset":730,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-5",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.08, 0.02, 0.24, 0.23, 0, 0.29, 0.01, 0, 0],
+            "Offset":1870,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-6",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0, 0, 0.04, 0.2, 0.07, 0.15, 0.3, 0.16],
+            "Offset":-440,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-7",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0.01, 0, 0, 0.07, 0.28, 0.25, 0.02, 0.08],
+            "Offset":9170,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-8",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.1, 0.16, 0.11, 0.19, 0.26, 0, 0, 0.11, 0],
+            "Offset":1140,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-9",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.02, 0.05, 0.21, 0.13, 0.02, 0.29, 0.09, 0, 0],
+            "Offset":5160,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SUB-10",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0, 0.16, 0, 0.49, 0.35, 0, 0, 0],
+            "Offset":-1500,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN",
+            "Type":"SKIN",
+            "Version":"5.0",
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN-SUB-0", "VIRTUAL-SKIN-SUB-1", "VIRTUAL-SKIN-SUB-2",
+                    "VIRTUAL-SKIN-SUB-3", "VIRTUAL-SKIN-SUB-4", "VIRTUAL-SKIN-SUB-5",
+                    "VIRTUAL-SKIN-SUB-6", "VIRTUAL-SKIN-SUB-7", "VIRTUAL-SKIN-SUB-8", "VIRTUAL-SKIN-SUB-9", "VIRTUAL-SKIN-SUB-10"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
+            "HotThreshold":["NAN", 49.0, 53.0, 55.0, 56.5, 62.0, 75.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
+            "Multiplier":0.001,
+            "SendCallback":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "tpu_cooling",
+                    "LimitInfo": [0, 2, 3, 4, 5, 5, 5]
+                },
+                {
+                    "CdevRequest": "gxp-cooling",
+                    "LimitInfo": [0, 0, 0, 0, 0, 6, 6]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-HINT",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", 47.0, 53.0, 55.0, 56.5, 62.0, 75.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
+            "Multiplier":0.001,
+            "SendPowerHint":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CPU-LIGHT-ODPM",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", 47.0, 49.0, "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 1.9, 1.9, 0.0, 0.0, 0.0, 0.0],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 2200, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 4600, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "BindedPowerRail": "S4M_VDD_CPUCL0",
+                    "CdevCeiling": [0, 2, 2, 2, 2, 2, 2]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "BindedPowerRail": "S3M_VDD_CPUCL2",
+                    "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "BindedPowerRail": "S2M_VDD_CPUCL1",
+                    "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CPU-MID",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", 49.0, 51.0, "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.0, 1.9, 0.0, 0.0, 0.0, 0.0],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 2800, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "CdevCeiling": [0, 9, 9, 9, 9, 9, 9]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
+                }
             ],
-            "VrThreshold":"NAN",
+            "Profile": [
+                {
+                    "Mode": "game",
+                    "BindedCdevInfo": [
+                        {
+                           "CdevRequest": "thermal-cpufreq-0",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        },
+                        {
+                           "CdevRequest": "thermal-cpufreq-1",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        },
+                        {
+                           "CdevRequest": "thermal-cpufreq-2",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        }
+                    ]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CPU-HIGH",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", 51.0, 53.0, 62.0, "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 0.0, 1.9, 1.9, 0.0, 0.0, 0.0],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 1000, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 600, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 1600, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [0.252, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "CdevCeiling": [0, 13, 13, 13, 13, 13, 13]
+                }
+            ],
+            "Profile": [
+                {
+                    "Mode": "game",
+                    "BindedCdevInfo": [
+                        {
+                           "CdevRequest": "thermal-cpufreq-0",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        },
+                        {
+                           "CdevRequest": "thermal-cpufreq-1",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        },
+                        {
+                           "CdevRequest": "thermal-cpufreq-2",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        }
+                    ]
+                },
+                {
+                    "Mode": "camera",
+                    "BindedCdevInfo": [
+                        {
+                           "CdevRequest": "thermal-cpufreq-0",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        },
+                        {
+                           "CdevRequest": "thermal-cpufreq-1",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        },
+                        {
+                           "CdevRequest": "thermal-cpufreq-2",
+                           "MaxReleaseStep": 1,
+                           "Disabled":true
+                        }
+                    ]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-CPU-GPU",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", 47.0, 53.0, 55.0, 56.5, 62.0, 75.0],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", "NAN", 2600, "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", "NAN", 8, "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-cpufreq-0",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "BindedPowerRail": "S4M_VDD_CPUCL0",
+                    "CdevCeiling": [0, 8, 8, 8, 8, 9, 9],
+                    "LimitInfo": [0, 0, 0, 0, 0, 9, 9]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-1",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "BindedPowerRail": "S3M_VDD_CPUCL2",
+                    "CdevCeiling": [0, 11, 11, 11, 11, 14, 14],
+                    "LimitInfo": [0, 0, 0, 0, 0, 14, 14]
+                },
+                {
+                    "CdevRequest": "thermal-cpufreq-2",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 2,
+                    "BindedPowerRail": "S2M_VDD_CPUCL1",
+                    "CdevCeiling": [0, 13, 13, 13, 13, 14, 14],
+                    "LimitInfo": [0, 0, 0, 0, 0, 14, 14]
+                },
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "MaxReleaseStep": 1,
+                    "MaxThrottleStep": 1,
+                    "BindedPowerRail": "S2S_VDD_G3D",
+                    "CdevCeiling": [0, 8, 8, 8, 9, 11, 11],
+                    "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
+                }
+            ]
+        },
+        {
+            "Name":"VIRTUAL-SKIN-GPU",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", 53.0, 55.0, 56.5, 62.0, "NAN", "NAN"],
+            "HotHysteresis":[0.0, 1.9, 1.9, 1.4, 1.9, 0.0, 0.0],
+            "Multiplier":0.001,
+            "PollingDelay":300000,
+            "PassiveDelay":7000,
+            "PIDInfo": {
+                "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
+                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
+                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "I_Max":["NAN", "NAN", 1723, "NAN", "NAN", "NAN", "NAN"],
+                "S_Power":["NAN", "NAN", 473, "NAN", "NAN", "NAN", "NAN"],
+                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
+                "MaxAllocPower":["NAN", "NAN", 2500, "NAN", "NAN", "NAN", "NAN"],
+                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
+            },
+            "BindedCdevInfo": [
+                {
+                    "CdevRequest": "thermal-gpufreq-0",
+                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
+                    "CdevCeiling": [0, 8, 8, 9, 11, 11, 11]
+                }
+            ]
+        },
+        {
+            "Name":"cellular-emergency",
+            "Type":"POWER_AMPLIFIER",
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN"],
+            "Coefficient":[1.0],
+            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 64.0, "NAN"],
+            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0],
+            "Multiplier":0.001,
+            "SendCallback":true,
+            "PollingDelay":300000,
+            "PassiveDelay":7000
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-0",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0.14, 0, 0.15, 0, 0, 0, 0.88, 0],
+            "Offset":-11750,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-1",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.01, 0.18, 0, 0, 0, 0.24, 0, 0.01, 0.35],
+            "Offset":3600,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-2",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0.01, 0, 0, 0.13, 0.31, 0.11, 0.18, 0.09],
+            "Offset":2140,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-SPEAKER",
+            "Type":"UNKNOWN",
+            "Version":"2.0",
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN-SPEAKER-SUB-0", "VIRTUAL-SKIN-SPEAKER-SUB-1", "VIRTUAL-SKIN-SPEAKER-SUB-2"],
+            "Coefficient":[1, 1, 1],
+            "HotThreshold":["NAN", 47.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
+            "HotHysteresis":[0.0, 1.9, 0.0, 0.0, 0.0, 0.0, 0.0],
+            "Multiplier":0.001,
+            "SendCallback":true
+        },
+        {
+            "Name":"VIRTUAL-SKIN-FRONT-SUB-0",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.04, 0.03, 0.1, 0.05, 0.35, 0.3, 0, 0, 0.04],
+            "Offset":1850,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-FRONT-SUB-1",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0, 0, 0.35, 0.22, 0.22, 0.07, 0.03, 0, 0],
+            "Offset":-560,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-FRONT-SUB-2",
+            "Type":"UNKNOWN",
+            "Hidden":true,
+            "VirtualSensor":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
+            "Coefficient":[0.05, 0.13, 0.12, 0.07, 0.37, 0.06, 0.01, 0.01, 0],
+            "Offset":5070,
+            "Multiplier":0.001
+        },
+        {
+            "Name":"VIRTUAL-SKIN-FRONT",
+            "Type":"UNKNOWN",
+            "Version":"1.0",
+            "VirtualSensor":true,
+            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
+            "Formula":"MAXIMUM",
+            "Combination":["VIRTUAL-SKIN-FRONT-SUB-0", "VIRTUAL-SKIN-FRONT-SUB-1", "VIRTUAL-SKIN-FRONT-SUB-2"],
+            "Coefficient":[1, 1, 1],
             "Multiplier":0.001
         },
         {
             "Name":"LITTLE",
             "Type":"CPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
             "Multiplier":0.001
         },
         {
             "Name":"MID",
             "Type":"CPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
+            "Multiplier":0.001
+        },
+        {
+            "Name":"BIG",
+            "Type":"CPU",
             "Multiplier":0.001
         },
         {
             "Name":"G3D",
             "Type":"GPU",
-            "HotThreshold":[
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                "NAN",
-                115.0
-            ],
-            "VrThreshold":"NAN",
+           "Multiplier":0.001
+        },
+        {
+            "Name":"TPU",
+            "Type":"NPU",
             "Multiplier":0.001
         }
-    ]
-}
+    ],
+    "CoolingDevices":[
+        {
+            "Name":"thermal-cpufreq-0",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote"
+        },
+        {
+            "Name":"thermal-cpufreq-1",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote"
+        },
+        {
+            "Name":"thermal-cpufreq-2",
+            "Type":"CPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote"
+        },
+        {
+            "Name":"thermal-gpufreq-0",
+            "Type":"GPU",
+            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote"
+        },
+        {
+            "Name":"usbc-port",
+            "Type":"BATTERY"
+        },
+        {
+            "Name":"tpu_cooling",
+            "Type":"NPU",
+            "WritePath":"/dev/thermal/cdev-by-name/tpu_cooling/user_vote"
+        },
+        {
+            "Name":"gxp-cooling",
+            "Type":"NPU",
+            "WritePath":"/dev/thermal/cdev-by-name/gxp-cooling/user_vote"
+        }
+    ],
+    "PowerRails":[
+        {
+            "Name":"S2M_VDD_CPUCL1",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"S3M_VDD_CPUCL2",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"S4M_VDD_CPUCL0",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"S2S_VDD_G3D",
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":1
+        },
+        {
+            "Name":"PARTIAL_SYSTEM_POWER",
+            "VirtualRails":true,
+            "Formula":"WEIGHTED_AVG",
+            "Combination":["S1S_VDD_CAM", "S2S_VDD_G3D", "S4S_VDD2H_MEM", "S5S_VDDQ_MEM", "S8S_VDD_G3D_L2", "S9S_VDD_AOC", "L2S_PLL_MIPI_UFS", "L9S_GNSS_CORE", "L21S_VDD2L_MEM", "VSYS_PWR_DISPLAY", "VSYS_PWR_WLAN_BT", "S1M_VDD_MIF", "S2M_VDD_CPUCL1", "S3M_VDD_CPUCL2", "S4M_VDD_CPUCL0", "S5M_VDD_INT", "S6M_LLDO1", "S7M_VDD_TPU", "S8M_LLDO2", "VSYS_PWR_MODEM"],
+            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
+            "PowerSampleDelay":7000,
+            "PowerSampleCount":5
+        }
+    ],
+    "Stats": {
+        "Sensors": {
+            "RecordWithDefaultThreshold": ["VIRTUAL-SKIN"],
+            "RecordWithThreshold": [
+                {
+                    "Name": "VIRTUAL-BTS-WINDOW-PARTIAL",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SPEAKER",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-0",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-1",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-2",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-3",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-4",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-5",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-6",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                },
+                {
+                    "Name": "VIRTUAL-SKIN-SUB-7",
+                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
+                }
+            ]
+        },
+        "CoolingDevices": {
+            "RecordVotePerSensor": {
+                "DefaultThresholdEnableAll": true
+            }
+        }
+    }
+}
\ No newline at end of file
diff --git a/thermal/thermal_info_config_tokay.json b/thermal/thermal_info_config_tokay.json
deleted file mode 100644
index 4a4278a..0000000
--- a/thermal/thermal_info_config_tokay.json
+++ /dev/null
@@ -1,926 +0,0 @@
-{
-    "Sensors":[
-        {
-            "Name":"north_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 42.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/north_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"rfpa_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 43.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/rfpa_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"soc_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 57.2, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/soc_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"charging_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 58.4, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/charging_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"disp_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 41.7, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/disp_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"battery",
-            "Type":"BATTERY",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", "NAN", 60.0],
-            "Multiplier":0.001
-        },
-        {
-            "Name":"btmspkr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 54.1, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/btmspkr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"quiet_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 44.6, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "TempPath":"/dev/thermal/tz-by-name/quiet_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"usb_pwr_therm",
-            "Type":"UNKNOWN",
-            "HotThreshold":["NAN", 45.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "TempPath":"/dev/thermal/tz-by-name/usb_pwr_therm/tz_temp",
-            "Multiplier":0.001,
-            "PollingDelay":60000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"battery_cycle",
-            "Type":"BCL_VOLTAGE"
-        },
-        {
-            "Name":"critical-battery-cell",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":["battery", "battery_cycle", "vdroop1"],
-            "Coefficient":[-10000, 400, 1000],
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 3.00, "NAN"],
-            "Multiplier":1,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "SendCallback":true
-        },
-        {
-            "Name":"FLASH_LED_REDUCE",
-            "Type":"UNKNOWN",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "vdroop1",
-            "Combination":["battery", "battery_cycle", "vdroop1"],
-            "Coefficient":[-10000, 400, 1000],
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 3.00, "NAN", "NAN"],
-            "Multiplier":1,
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "SendCallback":true,
-            "SendPowerHint":true
-        },
-        {
-            "Name":"soc",
-            "Type":"BCL_PERCENTAGE",
-            "HotThreshold":["NAN", "NAN", 80, "NAN", "NAN", "NAN", "NAN"],
-            "Multiplier":1
-        },
-        {
-            "Name":"batoilo",
-            "Type":"BCL_CURRENT",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 5000, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"BCL_AUDIO_BAACL",
-            "Type":"BCL_VOLTAGE",
-            "VirtualSensor":true,
-            "Formula":"COUNT_THRESHOLD",
-            "TriggerSensor": "soc",
-            "Combination":["battery", "soc"],
-            "Coefficient":[-25000, 80],
-            "HotThreshold":["NAN", "NAN",  "NAN", "NAN", 2.0, "NAN", "NAN"],
-            "PollingDelay":0,
-            "PassiveDelay":1000,
-            "Multiplier":1,
-            "SendCallback":true
-        },
-        {
-            "Name":"vdroop1",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1000, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"vdroop2",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1200, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"smpl_gm",
-            "Type":"BCL_VOLTAGE",
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", 1100, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 100, 0.0, 0.0],
-            "Multiplier":1,
-            "SendCallback":true,
-            "PollingDelay":0,
-            "PassiveDelay":1000
-        },
-        {
-            "Name":"VIRTUAL-BTS-WINDOW-PARTIAL",
-            "Type":"UNKNOWN",
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["rfpa_therm", "north_therm"],
-            "Coefficient":[0.05, 0.14],
-            "Offset":560,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.27, 0.17, 0.11, 0, 0.2, 0.01, 0.06, 0.08],
-            "Offset":2110,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.46, 0, 0.14, 0.28, 0, 0.06, 0.02, 0.14, 0],
-            "Offset":-7280,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.07, 0, 0, 0, 0, 0.28, 0.15, 0.02, 0.3],
-            "Offset":4010,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-3",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.27, 0.06, 0.3, 0, 0, 0.2, 0.03, 0.02, 0.04],
-            "Offset":10,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-4",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.9, 0, 0.05, 0, 0, 0, 0.01, 0, 0],
-            "Offset":730,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-5",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.08, 0.02, 0.24, 0.23, 0, 0.29, 0.01, 0, 0],
-            "Offset":1870,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-6",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0, 0, 0.04, 0.2, 0.07, 0.15, 0.3, 0.16],
-            "Offset":-440,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-7",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.01, 0, 0, 0.07, 0.28, 0.25, 0.02, 0.08],
-            "Offset":9170,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-8",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.1, 0.16, 0.11, 0.19, 0.26, 0, 0, 0.11, 0],
-            "Offset":1140,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-9",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.02, 0.05, 0.21, 0.13, 0.02, 0.29, 0.09, 0, 0],
-            "Offset":5160,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SUB-10",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0, 0.16, 0, 0.49, 0.35, 0, 0, 0],
-            "Offset":-1500,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN",
-            "Type":"SKIN",
-            "Version":"5.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-SUB-0", "VIRTUAL-SKIN-SUB-1", "VIRTUAL-SKIN-SUB-2",
-                    "VIRTUAL-SKIN-SUB-3", "VIRTUAL-SKIN-SUB-4", "VIRTUAL-SKIN-SUB-5",
-                    "VIRTUAL-SKIN-SUB-6", "VIRTUAL-SKIN-SUB-7", "VIRTUAL-SKIN-SUB-8", "VIRTUAL-SKIN-SUB-9", "VIRTUAL-SKIN-SUB-10"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
-            "HotThreshold":["NAN", 49.0, 53.0, 55.0, 56.5, 62.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
-            "Multiplier":0.001,
-            "SendCallback":true,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "tpu_cooling",
-                    "LimitInfo": [0, 2, 3, 4, 5, 5, 5]
-                },
-                {
-                    "CdevRequest": "gxp-cooling",
-                    "LimitInfo": [0, 0, 0, 0, 0, 6, 6]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-HINT",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 47.0, 53.0, 55.0, 56.5, 62.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
-            "Multiplier":0.001,
-            "SendPowerHint":true,
-            "PollingDelay":300000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-LIGHT-ODPM",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 47.0, 49.0, "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 1.9, 1.9, 0.0, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 2200, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 800, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 4600, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "BindedPowerRail": "S4M_VDD_CPUCL0",
-                    "CdevCeiling": [0, 2, 2, 2, 2, 2, 2]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S3M_VDD_CPUCL1",
-                    "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S2M_VDD_CPUCL2",
-                    "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-MID",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 49.0, 51.0, "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 1.9, 0.0, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1500, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 2800, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [0.292, 0.292, 0.292, 0.292, 0.292, 0.292, 0.292],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "CdevCeiling": [0, 6, 6, 6, 6, 6, 6]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [0.804, 0.804, 0.804, 0.804, 0.804, 0.804, 0.804],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 9, 9, 9, 9, 9, 9]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [0.342, 0.342, 0.342, 0.342, 0.342, 0.342, 0.342],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 12, 12, 12, 12, 12, 12]
-                }
-            ],
-            "Profile": [
-                {
-                    "Mode": "game",
-                    "BindedCdevInfo": [
-                        {
-                           "CdevRequest": "thermal-cpufreq-0",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-1",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-2",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        }
-                    ]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-HIGH",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 51.0, 53.0, 62.0, "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 0.0, 1.9, 1.9, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 400, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1000, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 600, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 1600, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [0.156, 0.156, 0.156, 0.156, 0.156, 0.156, 0.156],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "CdevCeiling": [0, 8, 8, 8, 8, 8, 8]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [0.428, 0.428, 0.428, 0.428, 0.428, 0.428, 0.428],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 11, 11, 11, 11, 11, 11]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [0.252, 0.225, 0.225, 0.225, 0.225, 0.225, 0.225],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "CdevCeiling": [0, 13, 13, 13, 13, 13, 13]
-                }
-            ],
-            "Profile": [
-                {
-                    "Mode": "game",
-                    "BindedCdevInfo": [
-                        {
-                           "CdevRequest": "thermal-cpufreq-0",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-1",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-2",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        }
-                    ]
-                },
-                {
-                    "Mode": "camera",
-                    "BindedCdevInfo": [
-                        {
-                           "CdevRequest": "thermal-cpufreq-0",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-1",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        },
-                        {
-                           "CdevRequest": "thermal-cpufreq-2",
-                           "MaxReleaseStep": 1,
-                           "Disabled":true
-                        }
-                    ]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-CPU-GPU",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 47.0, 53.0, 55.0, 56.5, 62.0, 75.0],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.9, 1.4, 1.9, 1.9],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", "NAN", 300, "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", "NAN", 5, "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", "NAN", 2600, "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", "NAN", 800, "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", "NAN", 0, "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", "NAN", 3900, "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", "NAN", 8, "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-cpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "BindedPowerRail": "S4M_VDD_CPUCL0",
-                    "CdevCeiling": [0, 8, 8, 8, 8, 9, 9],
-                    "LimitInfo": [0, 0, 0, 0, 0, 9, 9]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-1",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S3M_VDD_CPUCL1",
-                    "CdevCeiling": [0, 11, 11, 11, 11, 14, 14],
-                    "LimitInfo": [0, 0, 0, 0, 0, 14, 14]
-                },
-                {
-                    "CdevRequest": "thermal-cpufreq-2",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 2,
-                    "BindedPowerRail": "S2M_VDD_CPUCL2",
-                    "CdevCeiling": [0, 13, 13, 13, 13, 14, 14],
-                    "LimitInfo": [0, 0, 0, 0, 0, 14, 14]
-                },
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "MaxReleaseStep": 1,
-                    "MaxThrottleStep": 1,
-                    "BindedPowerRail": "S2S_VDD_G3D",
-                    "CdevCeiling": [0, 8, 8, 8, 9, 11, 11],
-                    "LimitInfo": [0, 0, 0, 0, 0, 11, 11]
-                }
-            ]
-        },
-        {
-            "Name":"VIRTUAL-SKIN-GPU",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", 53.0, 55.0, 56.5, 62.0, "NAN", "NAN"],
-            "HotHysteresis":[0.0, 1.9, 1.9, 1.4, 1.9, 0.0, 0.0],
-            "Multiplier":0.001,
-            "PollingDelay":300000,
-            "PassiveDelay":7000,
-            "PIDInfo": {
-                "K_Po":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
-                "K_Pu":["NAN", "NAN", 700, "NAN", "NAN", "NAN", "NAN"],
-                "K_I":["NAN", "NAN", 5, "NAN", "NAN", "NAN", "NAN"],
-                "K_D":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "I_Max":["NAN", "NAN", 1723, "NAN", "NAN", "NAN", "NAN"],
-                "S_Power":["NAN", "NAN", 473, "NAN", "NAN", "NAN", "NAN"],
-                "MinAllocPower":["NAN", "NAN", 0, "NAN", "NAN", "NAN", "NAN"],
-                "MaxAllocPower":["NAN", "NAN", 2500, "NAN", "NAN", "NAN", "NAN"],
-                "I_Cutoff":["NAN", "NAN", 4, "NAN", "NAN", "NAN", "NAN"]
-            },
-            "BindedCdevInfo": [
-                {
-                    "CdevRequest": "thermal-gpufreq-0",
-                    "CdevWeightForPID": [1, 1, 1, 1, 1, 1, 1],
-                    "CdevCeiling": [0, 8, 8, 9, 11, 11, 11]
-                }
-            ]
-        },
-        {
-            "Name":"cellular-emergency",
-            "Type":"POWER_AMPLIFIER",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN"],
-            "Coefficient":[1.0],
-            "HotThreshold":["NAN", "NAN", "NAN", "NAN", "NAN", 64.0, "NAN"],
-            "HotHysteresis":[0.0, 0.0, 0.0, 0.0, 0.0, 1.9, 0.0],
-            "Multiplier":0.001,
-            "SendCallback":true,
-            "PollingDelay":300000,
-            "PassiveDelay":7000
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.14, 0, 0.15, 0, 0, 0, 0.88, 0],
-            "Offset":-11750,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.01, 0.18, 0, 0, 0, 0.24, 0, 0.01, 0.35],
-            "Offset":3600,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0.01, 0, 0, 0.13, 0.31, 0.11, 0.18, 0.09],
-            "Offset":2140,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-SPEAKER",
-            "Type":"UNKNOWN",
-            "Version":"2.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-SPEAKER-SUB-0", "VIRTUAL-SKIN-SPEAKER-SUB-1", "VIRTUAL-SKIN-SPEAKER-SUB-2"],
-            "Coefficient":[1, 1, 1],
-            "HotThreshold":["NAN", 47.0, "NAN", "NAN", "NAN", "NAN", "NAN"],
-            "HotHysteresis":[0.0, 1.9, 0.0, 0.0, 0.0, 0.0, 0.0],
-            "Multiplier":0.001,
-            "SendCallback":true
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT-SUB-0",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.04, 0.03, 0.1, 0.05, 0.35, 0.3, 0, 0, 0.04],
-            "Offset":1850,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT-SUB-1",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0, 0, 0.35, 0.22, 0.22, 0.07, 0.03, 0, 0],
-            "Offset":-560,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT-SUB-2",
-            "Type":"UNKNOWN",
-            "Hidden":true,
-            "VirtualSensor":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "battery", "btmspkr_therm", "quiet_therm", "usb_pwr_therm"],
-            "Coefficient":[0.05, 0.13, 0.12, 0.07, 0.37, 0.06, 0.01, 0.01, 0],
-            "Offset":5070,
-            "Multiplier":0.001
-        },
-        {
-            "Name":"VIRTUAL-SKIN-FRONT",
-            "Type":"UNKNOWN",
-            "Version":"1.0",
-            "VirtualSensor":true,
-            "TriggerSensor":["north_therm", "rfpa_therm", "soc_therm", "charging_therm", "disp_therm", "quiet_therm", "usb_pwr_therm"],
-            "Formula":"MAXIMUM",
-            "Combination":["VIRTUAL-SKIN-FRONT-SUB-0", "VIRTUAL-SKIN-FRONT-SUB-1", "VIRTUAL-SKIN-FRONT-SUB-2"],
-            "Coefficient":[1, 1, 1],
-            "Multiplier":0.001
-        },
-        {
-            "Name":"LITTLE",
-            "Type":"CPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"MID",
-            "Type":"CPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"BIG",
-            "Type":"CPU",
-            "Multiplier":0.001
-        },
-        {
-            "Name":"G3D",
-            "Type":"GPU",
-           "Multiplier":0.001
-        },
-        {
-            "Name":"TPU",
-            "Type":"NPU",
-            "Multiplier":0.001
-        }
-    ],
-    "CoolingDevices":[
-        {
-            "Name":"thermal-cpufreq-0",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-0/user_vote"
-        },
-        {
-            "Name":"thermal-cpufreq-1",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-1/user_vote"
-        },
-        {
-            "Name":"thermal-cpufreq-2",
-            "Type":"CPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-cpufreq-2/user_vote"
-        },
-        {
-            "Name":"thermal-gpufreq-0",
-            "Type":"GPU",
-            "WritePath":"/dev/thermal/cdev-by-name/thermal-gpufreq-0/user_vote"
-        },
-        {
-            "Name":"chg_mdis",
-            "Type":"BATTERY"
-        },
-        {
-            "Name":"usbc-port",
-            "Type":"BATTERY"
-        },
-        {
-            "Name":"tpu_cooling",
-            "Type":"NPU",
-            "WritePath":"/dev/thermal/cdev-by-name/tpu_cooling/user_vote"
-        },
-        {
-            "Name":"gxp-cooling",
-            "Type":"NPU",
-            "WritePath":"/dev/thermal/cdev-by-name/gxp-cooling/user_vote"
-        }
-    ],
-    "PowerRails":[
-        {
-            "Name":"S2M_VDD_CPUCL2",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"S3M_VDD_CPUCL1",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"S4M_VDD_CPUCL0",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"S2S_VDD_G3D",
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":1
-        },
-        {
-            "Name":"PARTIAL_SYSTEM_POWER",
-            "VirtualRails":true,
-            "Formula":"WEIGHTED_AVG",
-            "Combination":["S1S_VDD_CAM", "S2S_VDD_G3D", "S4S_VDD2H_MEM", "S5S_VDDQ_MEM", "S8S_VDD_G3D_L2", "S9S_VDD_AOC", "L2S_PLL_MIPI_UFS", "L9S_GNSS_CORE", "L21S_VDD2L_MEM", "VSYS_PWR_DISPLAY", "VSYS_PWR_WLAN_BT", "S1M_VDD_MIF", "S2M_VDD_CPUCL2", "S3M_VDD_CPUCL1", "S4M_VDD_CPUCL0", "S5M_VDD_INT", "S6M_LLDO1", "S7M_VDD_TPU", "S8M_LLDO2", "VSYS_PWR_MODEM"],
-            "Coefficient":[1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0, 1.0],
-            "PowerSampleDelay":7000,
-            "PowerSampleCount":5
-        }
-    ],
-    "Stats": {
-        "Sensors": {
-            "RecordWithDefaultThreshold": ["VIRTUAL-SKIN"],
-            "RecordWithThreshold": [
-                {
-                    "Name": "VIRTUAL-BTS-WINDOW-PARTIAL",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SPEAKER",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-0",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-1",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-2",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-3",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-4",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-5",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-6",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                },
-                {
-                    "Name": "VIRTUAL-SKIN-SUB-7",
-                    "Thresholds": [41, 43, 45, 47, 49, 51, 53, 55, 57, 59, 75]
-                }
-            ]
-        },
-        "CoolingDevices": {
-            "RecordVotePerSensor": {
-                "DefaultThresholdEnableAll": true
-            }
-        }
-    }
-}